Burn-in Procedure Research Articles

Maximization of a survival probability and its application

When a mission is assigned, it often is the case that the component used to perform the task is required to work properly during the period of the mission time. In other words, the probability of the event that this component does not fail within the allowable mission time should be as large as possible. This problem is considered for the case when the lifetime of a component has a bathtub-shaped failure rate function, and it is found that burn-in procedure is beneficial. An application of this result to the problem of minimizing the mean number of failures in a given period of mission time is also considered.

Maximization of a survival probability and its application

When a mission is assigned, it often is the case that the component used to perform the task is required to work properly during the period of the mission time. In other words, the probability of the event that this component does not fail within the allowable mission time should be as large as possible. This problem is considered for the case when the lifetime of a component has a bathtub-shaped failure rate function, and it is found that burn-in procedure is beneficial. An application of this result to the problem of minimizing the mean number of failures in a given period of mission time is also considered.

Impact of anomalous short-channel MOS transistors on VLSI circuit reliability

In VLSI and ULSI circuits, a major reliability concern is that completed, fully functional, in-specification integrated circuits may contain one or more anomalous transistors with substantially closer source-to-drain spacing than the minimum-design-rule devices, and that such transistors will be more susceptible to degradation or failure due to hot-carrier effects, total-dose-radiation effects or other instabilities. A further concern is that such vulnerable transistors will not be detected during conventional electrical testing or during typical high-reliability integrated circuit burn-in procedures such as static or dynamic burn-in at 125°C, since hot carrier effects tend to anneal out at elevated temperatures, as well as having a negative temperature acceleration factor. Experimental studies have shown that fully functional nMOS transistors with shorter-than-normal channel lengths can have many orders of magnitude greater susceptibility to hot-electron-induced threshold voltage shifts, compared to transistors with minimum-design-rule dimensions of 1.2μm. Total-dose radiation tests showed that anomalous n-channel MOS transistors can have orders-of magnitude higher post-total-dose radiation leakage than nominal devices made by the same process. Several possible types of screening techniques that can be considered for detecting integrated circuits containing anomalous transistors are discussed, including a low-dissipation dynamic stress test at room temperature or at −55°C, with parts electrically characterized before and after the stress test. A large change (delta) of certain critical parameters would be used to predict future failure. Quiescent CMOS supply-current testing could also be used to detect the presence of anomalous transistors in some types of integrated circuits.

Burn-in Time and Estimation of Change-Point with Weibull-Exponential Mixture Distribution

Many industrial products have three phases in their product lives: infant-mortality, normal, and wear-out phases. In the infant-mortality phase, the failure rate is high, but decreasing; in the normal phase, the failure rate remains constant; and in the wear-out phase, the failure rate is increasing. A burn-in procedure may be used to reduce early failures before shipping a product to consumers. A cost model is formulated to find the optimal burn-in time, which minimizes the expected sum of manufacturing cost, burn-in cost, and warranty cost incurred by failed items found during the warranty period. A mixture of Weibull hyperexponential distribution with shape parameter less than one and exponential distribution is used to describe the infant-mortality and the normal phases of the product life. The product under consideration can be either repairable or non-repairable. When the change-point of the product life distribution is unknown, it is estimated by using the maximum-likelihood estimation method. The effects of sample size on estimation error and the performance of the model are studied, and a sensitivity analysis is performed to study the effects of several parameters of the W-E distribution and costs on the optimal burn-in time.

Sequential burn-in procedures

In Reliability Theory, the ‘burn-in’ period is intended as the period in which a component is tested before its operative life, in order to eliminate early failures. The problem of optimally choosing the burn-in period is considered for several components with exchangeable times-to-failures. From a Bayesian point of view, this reveals to be a sequential statistical decision problem. We give the definitions of sequential burn-in strategies and optimal burn-in strategies and prove an existence result relating to the optimal burn-in strategy, by applying the general ideas of dynamic programming. The latter result also establishes relevant aspects in the structure of the optimal solution.

Dual-regulator dual-decoding-trimmer DRAM voltage limiter for burn-in test

The authors present a dynamic RAM (DRAM) voltage limiter with a burn-in test mode. It features a dual-regulator dual-trimmer scheme that provides a precise stress voltage in a burn-in test while maintaining a constant limited voltage under normal operation. A regulator is used to preserve a constant difference between the internal burn-in voltage and the supply voltage. Two sets of trimmers reduce the voltage deviations of both the burn-in and normal-operation voltages within +or-0.13 V. The circuits are implemented in a 16-Mb CMOS DRAM. A burn-in voltage regulated to +or-50 mV at an ambient temperature up to 120 degrees C is obtained simply by elevating the supply voltage to 8 V as in conventional burn-in procedures. >

Burn-In Models and Methods: A Review

Abstract Burn-in is a technique used to increase the quality of components and systems delivered to a consumer by using the item under normal or accelerated environmental conditions prior to shipment. If a burn-in procedure is effective, items that are delivered to the consumer are superior to those that would have been delivered without burn-in. The measure by which items are judged to be superior is defined by the objective of the burn-in procedure (e.g., maximum mean residual life or maximum probability of mission success after burn-in). This paper reviews the burn-in literature which considers different aspects of the problem, but lacks a structure that relates them to one another.

Monitored burn-in as the method of quality control in electronic components and devices production

Many electronic manufacturers and also other large organizations perform burn-in and environmental tests. The high number of procedural regulations, of which MIL-Spec 883 is probably the best known, can both determine significance and limit the impact of test procedures. An original method developed in our department allows a new methodical approach to the environmental test control and organization. In the principle it is based on monitored burn-in procedure. The method creates the universal base for many kinds of environmental tests. Here described speculation investigates some possibilities of this method in various testing procedures of electronic materials, components and devices.

Network reliability with are failures and repairs : P. Simin Pulat. IEEE Trans. Reliab.R-37, 268 (1988)

The attitude control subsystem (ACS) on board a 3-axis stabilized spacecraft is critical for on-orbit operations; its degradation can significantly disrupt mission performance, and its failure is fatal to the spacecraft. An ACS that fails early on-orbit, for example in the first couple of years on a spacecraft with a 15-year design lifetime, results in significant losses to all stakeholders and constitutes a major financial blow to the satellite operator or insurer—losses can amount to a few hundred mission dollars. Understanding and preventing/mitigating ACS failure is an engineering and financial imperative.In this work, we first provide a comprehensive statistical analysis of ACS failure behavior on orbit. The results indicate that the ACS is a major driver of spacecraft unreliability and contributes up to 20% of all spacecraft failures. Nonparametric and parametric results, including mixture Weibull distributions, are provided for ACS reliability, and they are complemented with the subsystem’s multi-state failure analysis. It is shown for example that the ACS is 89% likely to be fully operational after 15 years on-orbit. Results also demonstrate that ACS suffers from both infant mortality and wear-out failures. The findings are important for satellite manufacturers and equipment providers as they indicate opportunities for improved ground testing and burn-in procedures for the ACS, and they highlight the need to consider additional redundancy, even in stand-by form, especially if increased spacecraft design lifetime is sought.Second, we conduct a comparative analysis of failure behavior of the ACS in Low Earth Orbit (LEO) and Geosynchronous orbit (GEO). The results demonstrate a marked difference in failure behavior in LEO and GEO: the ACS degrades and fails more frequently, harder (more severe anomalies), and earlier (more infant anomalies/failures) in LEO than in GEO. We expand on these results and conclude with hypotheses for causal factors of this difference in failure behavior.

Cost effectiveness of burn-in procedures of semiconductor devices and integrated circuits

Some problems, connected with the cost effectiveness of the 100% tests in burn-in conditions which have to be taken into account at their implementation by manufacturers and users of these items, are explained in this paper. Some considerations for the choice of test systems and test methods are also discussed.

Extremely low-phase-noise SAW resonators and oscillators: design and performance

The authors describe prototype low-noise SAW (surface acoustic wave) resonator oscillators which have demonstrated state-of-the-art phase-noise performance not only at their fundamental operating frequencies in the 400- to 600-MHz range but also after 16x frequency multiplication to X-band as well. SAW resonator designs with overmoded cavities, very wide apertures, and dual apertures, as well as modified fabrication techniques, have been used to realize an overall reduction in an oscillator's phase-noise spectrum, i.e. white phiM, flicker FM, and random-walk FM. The S resonators can typically handle incident RF power in excess of +20 dBm, a key requirement to achieving an extremely low oscillator-phase-noise floor. A novel burn-in procedure at relatively high incident-RF-power levels (>27 dBm) was used to reduce both the flicker FM and random-walk FM phase-noise levels. Using these various techniques, a 5- to 15-dB improvement in the overall phase-noise spectrum for several prototype oscillators was demonstrated.

Burn-In of Incandescent Sign Lamps

This paper describes an experiment in which it was determined that properly designed burn-in can not only eliminate a weak subpopulation, but also stabilize the healthy one. Accelerated life tests have been carried out on 30W sign lamps to show that the time-to-failure pattern is bimodal. The accelerated life data have been used to design burn-in process parameters, and to determine the deterioration caused in the healthy subpopulation by the chosen burn-in. The results showed no decrease in mean life of the healthy lamps. Rather, increased stability (lower standard deviation in life) has been observed. The burn-in procedure with parameters 240V and duration in the range 15-20s was successfully applied to the 30W sign lamps in order to eliminate the weak subpopulation. Due to fast turnaround of the procedure it can be implemented at the end of the production line. The high temperature thermal treatment of filaments during burn-in seems to relax structural stresses caused by fabrication process. The fact that the power coefficient obtained here differs from the one quoted by GE Technical Information TP-110 as well as by IES Lighting Handbook (Reference Volume 1984) should alert users of accelerated reliability tests to be wary of uncritical application of experimental factors taken from the literature, including this paper.

Benefits of Integrated-Circuit Burn-In to Obtain High Reliability Parts

The technique of integrated circuit (IC) burn-in is applied industry-wide with the assumption that burned-in ICs have a much lower failure rate during operating life than ICs which are not burned-in. Several years ago this approach was valid for all ICs, but today burn-in procedures for some ICs provide little, if any, benefit. However, some customers still request burned-in ICs, assuming that this will produce better reliability. This paper provides historical data for linear ICs and presents a procedure to help the user determine if burn-in is worthwhile. An example for linear ICs where minimum benefit produced from burn-in is provided. By repeating this exercise with any other parts, the user can decide whether burn-in will decrease the failure rate appreciably for his application. This article deals specifically with decreases in failure rates through burn-in. It is not within the scope of this paper to describe general factors that could decrease failure rates.

A Review of:“BURN-IN: an Engineering Approach to the Design and Analysis of Burn-in Procedures.” By F. JENSEN and N. E. PETERSEN (John Wiley & Sons, 1982.) [Pp. 167.] Price £17·00.

SUMMARY

Case studies in system burn-in

This paper describes the results of several burn-in experiments carried out within the Danish industry. The systems considered range from printed circuit boards to complex electronic equipment containing 4000 components. The experiments were conducted in an effort to find a consistent pattern of early failures, which could be used to plan economical burn-in procedures. The failure patterns were recorded on Weibull paper, for ease of analysis. Most of the systems showed a very strong early failure pattern, indicating a subpopulation of ‘weak’ systems. Using the concept of bimodal distributions of the lifetimes of the ‘rogue’ components within the systems, it is possible, in some cases, to compute the early failure pattern of the systems. This technique is briefly described in this paper. Finally, the economic consequences of performing equipment or system burn-in are discussed and an optimal burn-in policy is considered.