Bundle Interconnects Research Articles

Impact of tunneling conductance on the performance of multi walled carbon nanotubes as VLSI interconnects for nano-scaled technology nodes

Multi walled carbon nanotube (MWCNT) has received most of the attention for their unique characteristics as a possible alternative for copper as a VLSI interconnects for future integrated circuits. Multiple equivalent single-conductor circuit (ESC) models are reported in the literature for analysis of MWCNT as an interconnect, however most of them have neglected the impact of intershell tunneling conductance on the performance of MWCNT as interconnect. In this paper, a model is proposed for deriving equivalent impedance parameters by including tunneling conductance in order to study the impact of intershell tunneling conductance on the performance of MWCNT interconnect in terms of delay. Based on the derived equivalent impedance parameters, existing ESC model is modified. Further, the analytical and simulated results obtained from proposed model are compared with the results of existing models. It is revealed from the comparative analysis that the tunneling conductance has considerable impact on the impedance parameters and the propagation delay of an MWCNT bundle interconnect at variable interconnects length for nano-scaled technology nodes i.e. 32, 22 and 16 nm.

Comprehensive Model for High-Speed Current-Mode Signaling in Next Generation MWCNT Bundle Interconnect Using FDTD Technique

The performance of current-mode signaling (CMS) scheme in carbon nanomaterial based multiwall carbon nanotube (MWCNT) bundle on-chip interconnect using finite-difference time-domain (FDTD) technique is investigated in the present paper. A very comprehensive model that analyzes both the traditional copper and the next-generation MWCNT bundle interconnects is presented. Further, this model is applicable for both the conventional voltage-mode signaling (VMS) and the delay-efficient CMS schemes. The number of MWCNT shells in a bundle interconnect is varied, and it is analyzed that MWCNTs with larger number of shells have better performance than both MWCNTs consisting of lesser number of shells and the copper interconnects. It is analyzed that CMS scheme has superior performance than VMS scheme in terms of smaller propagation delay and reduced crosstalk-induced delay. Various analyses have been performed for 32-nm technology node and are validated using SPICE simulations. The results obtained from the proposed FDTD based model and SPICE are found to be in close agreement, and the maximum error is within 3%.

Analysis of propagation delay and repeater insertion in single-walled carbon nanotube bundle interconnects

A new closed-form expression of 50% propagation delay for distributed RLC interconnects is proposed using the multivariable curve fitting method, with a maximum error of 4% with respect to SPICE results. Then accurate closed-form solutions for the optimum repeater number and size to minimize the propagation delay are further derived. The performance of single-walled carbon nanotube (SWCNT) bundle interconnects is evaluated using the proposed models in the intermediate and global levels at the 22- and 32-nm technology nodes, and compared against traditional Cu interconnects. It is shown that the performance of SWCNT bundle interconnects in propagation delay can outperform Cu interconnects, and the improvement will be enhanced with technology scaling and wire length increasing. On the other hand, the propagation delay of SWCNT bundle interconnects is super-linearly dependent on the wire length similar to Cu interconnects, indicating that the method of repeater insertion to reduce the propagation delay can also apply to SWCNT bundle interconnects. The results shown that repeater insertion can really reduce the propagation delay of SWCNT bundle interconnects effectively, and the optimum repeater number is much smaller than that of Cu interconnects.

Buffering Carbon Nanotube Interconnects Considering Inductive Effects

While copper interconnect scaling is approaching its fundamental physical limit, increasing wire resistivity and delay have greatly limited the circuit miniaturization. The emerging carbon nanotube (CNT) interconnects, especially single-walled CNTs (SWCNTs) bundle interconnects, have become a promising replacement material. Nevertheless, physical design optimization techniques are still needed to allow them achieving the desired performances. While the preliminary conference version of this work [L. Liu, Y. Zhou and S. Hu, Proc. IEEE Computer Society Annual Symp. on VLSI (ISVLSI), 2014] designs the first timing driven buffer insertion technique for SWCNT interconnects, it only considers resistive and capacitive effects but not inductive effects. Although inductance could be negligible for prevailing CNT-based circuit designs, it becomes important when designing ultra-high performance chips in the future. Thus, this paper considers buffering inductive bundled SWCNTs interconnects through developing a dynamic programming algorithm for buffer insertion using the RLC tree delay model. Our experiments demonstrate that bundled SWCNTs interconnect-based buffering can effectively reduce the delay by over [Formula: see text] when inductive effects are considered. With the same timing constraint, bundled SWCNTs interconnect-based buffering can save over 20% buffer area compared to copper interconnect based buffering, while still running about [Formula: see text] faster.

Carbon Nanotube Interconnects − A Promising Solution for VLSI Circuits

ABSTRACTIn nanoscale regime, the performance of traditional copper interconnects degrades substantially in terms of latency, power dissipation and induced crosstalk noise. This is due to miniaturization of electronic devices and many-fold enhancement of interconnect lengths in very large-scale integrated (VLSI) circuits. However, carbon nanotubes (CNTs) due to their unique physical properties such as high thermal conductivity, current carrying capability and mechanical strength have drawn the attention of researchers in recent times. The present paper provides comprehensive investigations in the various CNT structures for on-chip VLSI interconnect applications. Different configurations of CNT structures are studied namely single-wall CNT (SWCNT), multiwall CNT (MWCNT) and mixed-wall CNT bundle (MCB). The performance of CNT interconnects is analyzed using driver-interconnect-load system. It is investigated that the reduction in propagation delay in MCB interconnect is nearly 69%, 60%, 40% and 22% as compared to copper, SWCNT bundle, MWCNT and MWCNT bundle interconnect structures, respectively. This analysis considers an interconnect length variation from 500 to 2500 µm for 32-nm technology node. For the same dimensions the overall reduction in power dissipation in MCB interconnect is nearly 60%, 49%, 45% and 36% as compared to copper, SWCNT, MWCNT and MWCNT bundle interconnects, respectively. Furthermore, the effect of crosstalk on the interconnect structures has been examined. It is investigated that MCB has least crosstalk induced delay than all the other interconnect structures. Consequently, it is envisaged that MCB outperforms copper, SWCNT, MWCNT and MWCNT bundle interconnects and are best suited for future VLSI interconnects.

Thermally aware performance analysis of single-walled carbon nanotube bundle as VLSI interconnects

A comparative performance analysis in terms of delay, power dissipation, power delay product (PDP), and crosstalk noise between SWCNT bundle interconnects with resistance estimated using conventionally (temperature independent model), and thermally aware model is investigated. The results are also compared with those of currently used copper interconnects at 22 nm technology node. It is observed that, with rise in temperature from 300 to 500 K, SWCNT bundles have a lower delay than that of copper interconnect at different lengths from 100 to $$1000\,\upmu \hbox {m}$$1000μm whereas reverse is true for power dissipation. The SPICE simulation results further reveal that for temperature variations ranging from 300 to 500 K, compared to conventional metal (copper) conductors, crosstalk noise voltage levels (positive peaks) in capacitively coupled SWCNT bundle, at the far end of victim line, are significantly low. Moreover, a relative average improvement in delay, power, and PDP using a thermally aware model in comparison with a temperature independent model is about 22.44, 7.59 and 31.96 %, respectively, with length variations from 100 to $$1000\,\upmu \hbox {m}$$1000μm, whereas for varied tube diameter is about 16.6, 5.6 and 19.72 %, respectively. The average relative improvement in the time duration reduction of victim output, for varied tube diameters, is about 21.7 % by using a thermally-aware model instead of a temperature-independent model of an SWCNT bundle resistance.

Analysis of Crosstalk Effects for Multiwalled Carbon Nanotube Bundle Interconnects in Ternary Logic and Comparison with Cu interconnects

In this study, the crosstalk-induced effects are investigated in ternary logic by using the three-line bus architecture. The worst case crosstalk delays for both repeated and unrepeated interconnect and the peak crosstalk noise voltage on the victim net are investigated. Analyses have been done for global level multiwalled carbon nanotube (MWCNT) bundle and copper interconnects with carbon nanotube FET-based drivers and receivers at 22 nm node. According to the HSPICE simulations, the crosstalk delay and noise area in the MWCNT bundle interconnects are much smaller than the Cu wires for the ternary logic. In addition, the MWCNT bundle interconnects require a lower number of repeaters as compared to the Cu wires, which results in lower complexity and power consumption. The results indicate that utilizing the MWCNT interconnects instead of Cu wires in ternary systems leads to 63% shorter crosstalk delay without repeater insertion and 65% lower crosstalk noise area and 75% lower power consumption with repeater insertion. It is concluded from the results that the MWCNT bundle global wires are more suitable for ternary very large scale integration systems as compared to the Cu wires.

Crosstalk Induced Delay Analysis of Randomly Distributed Mixed CNT Bundle Interconnect

In this paper, a more realistic analytical model for randomly distributed mixed carbon nanotube (CNT) bundle (MCB) is presented for the analysis of crosstalk induced delay. Several researchers have proposed analytical models for interconnects based on single-walled CNT (SWCNT), multi-walled CNT (MWCNT) bundle and most interestingly, spatially arranged mixed CNTs. Although, bundled SWCNTs and MWCNTs are easily realizable, but, practically it is almost impossible to fabricate a MCB with precise arrangements of SWCNTs and MWCNTs. Motivated by these facts, this paper presents a corner placement algorithm for randomly distributed SWCNTs and MWCNTs of different diameters in a MCB. The performance of MCB is compared with that of conventional bundled SWCNT and bundled MWCNT at different coupled interconnect lengths and spacing. Encouragingly, for a fixed cross-sectional area, the overall crosstalk induced delay of MCB reduces by 65.03% and 23.54% in comparison to the bundles having either SWCNTs or MWCNTs with smaller diameters, respectively. However, in contradiction to most of the previously reported results, bundled MWCNTs with larger diameters outperform the randomly distributed MCBs in terms of crosstalk performance.

Design of n-Tier Multilevel Interconnect Architectures by Using Carbon Nanotube Interconnects

In this paper, n-tier methodology is developed to design multilevel interconnect architecture of macrocells using single-wall carbon nanotube (SWCNT) bundles. Upper limit of low-bias voltage of SWCNT bundle interconnects is derived and its dependence on temperature, SWCNTs’ diameter, and interconnect length is studied. Possibility of using SWCNT bundles as local interconnects at 7.5-nm technology node is discussed, and it is shown that SWCNT bundles with 1 nm diameter cannot be used at the first interconnect metal level. Using Cu and SWCNT bundles, multilevel interconnect architecture of a 7.5-nm ASIC macrocell is designed which reduces the number of metal levels by 27% and power dissipation by 25% compared with the multilevel interconnect architecture designed with only Cu. The effect of aspect ratio (AR) on the n-tier design is studied. It is shown that decreasing AR of SWCNT bundle interconnects, decreases total power dissipation of the ASIC macrocell by 41%. The impact of temperature variation on the design of multilevel interconnect architecture is also investigated.

Temperature-Dependent Modeling and Performance Evaluation of Multi-Walled CNT and Single-Walled CNT as Global Interconnects

The influence of temperature on multi-walled carbon nanotube (MWCNT) interconnects have been studied. A temperature-dependent equivalent circuit model is presented for the impedance parameters of MWCNT bundle interconnects that captures various electron–phonon scattering mechanisms as a function of temperature. To estimate the performance of MWCNT bundle interconnects, the signal delay, power dissipation and power delay product (PDP) were simulated based on a temperature-dependent model that results in improvement in the delay, power and PDP estimation accuracy compared to the temperature-independent model. The results revealed that the power delay product of MWCNT bundle interconnects increases with increasing temperature from 200 K to 450 K for three different technology nodes, i.e., 32 nm, 22 nm and 16 nm, based upon a 1000-μm interconnect length. A similar analysis was performed for single-walled carbon nanotube (SWCNT) bundle interconnects and the results are compared with MWCNT bundle interconnects, indicating that the delay, power and power delay product (PDP) also increased with increasing temperature from 200 K to 450 K. The interconnects of the MWCNT bundle interconnects gave a better performance in terms of delay, power and PDP as compared to the SWCNT bundle interconnects.

Influence of temperature on MWCNT bundle, SWCNT bundle and copper interconnects for nanoscaled technology nodes

This paper presents the comparative analysis of temperature dependent performance of Multi-walled carbon nanotubes (MWCNT), Single-walled carbon nanotube (SWCNT) and copper interconnects for nanoscaled technology nodes. The temperature dependent impedance circuit model is proposed for MWCNT bundle interconnects. The proposed model for MWCNT bundle shows the various electron–phonon scattering mechanisms dependency as a function of temperature. The performance in terms of propagation delay, power dissipation and power delay product for MWCNT bundle interconnects is simulated on the basis of temperature dependent electrical parameters for global interconnects at three different technology nodes viz. 32, 22 and 16 nm for temperature range 200 to 450 K. A similar analysis is performed for SWCNT bundle and copper interconnects and results are compared with the MWCNT bundle interconnects. The comparative results revealed that the performance of MWCNT bundle interconnects is better than the performance of SWCNT bundle and copper interconnects at different temperature ranging from 200 to 450 K for 32, 22 and 16 nm technology nodes at global interconnects.

Modeling and Analysis of Crosstalk Induced Effects in Multiwalled Carbon Nanotube Bundle Interconnects: An ABCD Parameter-Based Approach

In this paper, the crosstalk effects in both small and large diameter multiwalled carbon nanotube bundle interconnects (MWCNTs) for the future nanoscale integrated circuits are studied with the help of ABCD parameter matrix approach for global levels of interconnects at 22- and 14-nm technology nodes. Here, isolated MWCNTs are modeled using an equivalent single conductor transmission line. The simulation results show that the results are at par with the result of SPICE model. It is observed that performance wise, the large diameter MWCNT bundles are better than both small diameter MWCNT bundles and copper wire for both repeated and unrepeated interconnects. The same trend is observed with the number of inserted repeaters. For repeated wires, the optimized placement of repeaters offsets the delay advantage numbers of MWCNT bundles over copper wire. Technology scaling adversely impacts the delay advantage numbers of small diameter MWCNT bundles. As far as the worst-case crosstalk noise peak voltage is concerned, the large diameter MWCNT bundles also outperform both small diameter MWCNT bundles and copper wire for longer interconnects. However, for shorter interconnects, copper wire and small diameter bundles outclass the large diameter bundles due to their relatively larger time constant. We have compared our crosstalk analysis results with the earlier work to justify the validity of our proposed model and observed that the results with our model are in well conformity with the existing work. It is seen that even the tall Cu vias are not going to significantly affect the performance of MWCNT bundle interconnects. Twice the minimum width global level interconnects are the optimal choice to achieve the maximum delay advantage using MWCNT bundle interconnects in comparison with Cu-based interconnects. Finally, our analysis shows that from the performance and signal integrity perspective, the large diameter MWCNT bundles are a suitable alternative to both small diameter MWCNT bundles and copper interconnects for future integrated circuit technology generations.

Effect of electric field on metallic SWCNT interconnects for nanoscale technologies

The influence of an electric field on metallic single walled carbon nanotube (SWCNT) interconnects is studied. A voltage-dependent equivalent circuit model is presented for the impedance parameters of single-wall carbon nanotubes that capture various electron-phonon scattering mechanisms as a function of the electric field. To estimate the performance of SWCNT bundle interconnects, signal delay and power dissipation are calculated based on the field dependent model that results in an improvement in the delay and power estimation accuracy compared to the field-independent model. We find that the power delay product of a SWCNT bundle increases with the increase in electric field but decreases with technology scaling showing that at a low electric field, the SWCNT bundle is a potential reliable alternative interconnect for future high performance VLSI industry at scaled technologies.

Performance and analysis of temperature dependent multi-walled carbon nanotubes as global interconnects at different technology nodes

A temperature dependent performance in terms of power delay product (PDP) of multi-walled carbon nanotube (MWCNT) bundle interconnect has been analyzed for temperature range from 200 to 450 K at three different technology nodes viz. 32, 22 and 16nm. A similar analysis is performed for copper interconnect and results are compared with MWCNT bundle interconnect. Comparative results revealed that delay and PDP is increased with rise in temperature ranging from 200 to 450 K. It has also been observed that the temperature dependent MWCNT bundle interconnect gives better performance in terms of delay, power and PDP as compared to copper interconnect for three technology nodes at global interconnect length.

Performance analysis for randomly distributed mixed carbon nanotube bundle interconnects

During the recent past, carbon nanotubes (CNTs) have rapidly gained importance in an intensely growing researched area of interconnects. For various reasons, bundled CNTs are often preferred over single-walled CNTs (SWCNTs) or multi-walled CNTs (MWCNTs). However, during fabrication, it is difficult to control the growth of a densely packed bundle having SWCNTs with uniform diameters or MWCNTs with an identical number of shells. Therefore, a realistic CNT bundle is in fact a mixed CNT bundle (MCB) that consists of SWCNTs and MWCNTs. In light of these facts, an analytical model of a MCB that follows the random distribution of CNTs in a bundle is introduced. Depending on the probability of distribution of CNTs having different diameters, a compact multi-conductor transmission line (MTL) and a simplified equivalent single conductor (ESC) model are presented. Encouragingly, the simplified ESC model exhibits an average error of only 2.44% at different interconnect lengths compared with the delay obtained through the MTL approach. Mean diameter and tube density of the MCB are mapped to the ESC model to analyse the propagation delay, power dissipation and crosstalk. Irrespective of interconnect lengths, it is observed that the performances are significantly improved for higher tube density in a MCB.

Temperature dependant crosstalk analysis in coupled single‐walled carbon nanotube (SWCNT) bundle interconnects

AbstractThe temperature‐dependent, crosstalk‐induced, noise voltage waveform and its frequency spectrum, in capacitive coupled single‐walled carbon nanotube (SWCNT) bundle interconnects, at the far end of victim line, have been analyzed at 22‐nm technology node. A similar analysis is performed for copper interconnects and a comparison is made between the results of these two analyses. The SPICE simulation results reveal that at temperature variations ranging from 300 to 500 K, compared with conventional metal (copper) conductors, crosstalk noise voltage levels in CNT, at the far end of victim line, are significantly low. Simulated results further reveal that, with rise in interconnect temperatures, compared with copper interconnects, coupled interconnects of SWCNT bundle filter more noise frequency components. Based on these comparative results, an improved model for extracting inter‐bundle, real life, coupling capacitances between SWCNT bundles has been proposed. Copyright © 2014 John Wiley & Sons, Ltd.

Crosstalk analysis in CNT bundle interconnects for VLSI application

Crosstalk noise voltage levels have been estimated at the far end of a victim line in capacitive coupled single-walled carbon nanotube (SWCNT) bundle interconnects under the influence of interconnect dimensions. The reported work on crosstalk analysis in SWCNT bundle interconnects to date have assumed the value of coupling capacitance as equivalent to the coupling effect between metal interconnects of same dimensions. In this paper, we propose an improved model to extract inter-bundle real-life coupling capacitances to fill that gap. A similar analysis is performed for a copper-based interconnect, and comparison is made with result obtained for CNT-based interconnect at 22-nm technology. SPICE simulation results reveal that the crosstalk noise voltage level at the far end of the victim line in CNT bundles is significantly lower than that in conventional metal (copper) conductors in three different cases, keeping the pitch fixed but varying the value of interconnect spacing and width. © 2014 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.

Performance modeling and analysis of carbon nanotube bundles for future VLSI circuit applications

In this work, we have presented a comprehensive analysis of the performance of copper (Cu) and existing carbon nano tube (CNT) bundle structures (i.e. SWCNT, DWCNT and MWCNT) across nanometer technology nodes like 45, 32, 22 and 16 nm at local, intermediate and global level interconnects. Double walled carbon nano tubes (DWCNTs) and multi walled carbon nano tubes (MWCNTs) are modeled like simple single walled carbon nano tube (SWCNT) equivalent model with high accuracy. The analytical closed form delay expressions for SWCNT, DWCNT and MWCNT bundles have been found out. It has been observed that sparse SWCNT bundle interconnects show about 50 % performance improvement for 20 $$\upmu $$ μ m long local level interconnects over Cu in 16 nm technology node, whereas the performance advantage numbers for MWCNT and sparse DWCNT bundles are 50 and 35 % respectively. For 200 $$\upmu $$ μ m long intermediate level interconnects, the performance advantage numbers are 85, 80 and 75 % for dense SWCNT, MWCNT and dense DWCNT bundles respectively in 16 nm node. For 10 mm long global level interconnects, the performance advantage numbers are 85, 85 and 75 % for dense SWCNT, MWCNT and dense DWCNT bundles respectively in 16 nm node. It is also observed that the performance numbers improve with scaling for all levels of interconnects. It is also shown that the ratio of delay of CNT bundles and Cu for various levels of interconnects agree well with the existing work.

Delay and crosstalk reliability issues in mixed MWCNT bundle interconnects

Multi-walled carbon nanotube (MWCNT) bundles have potentially provided attractive solution in nanoscale VLSI interconnects. In current fabrication process, it is not trivial to grow a densely packed bundle having MWCNTs with similar number of shells. A realistic nanotube bundle, in fact, is a mixed CNT bundle consisting of MWCNTs of different diameters. This research paper presents an analytical model of mixed CNT bundle wherein MWCNTs having different number of shells are densely packed. Two different types of MWCNT bundles are presented: (1) MB that contains MWCNTs with similar number of shells (i.e., uniform diameters) and (2) MMB wherein MWCNTs having different number of shells (i.e., non-uniform diameters) are mixed. Multi-conductor transmission line theory is used to present an equivalent single-conductor (ESC) model of different MB and MMB configurations. Using the ESC model, performance is analyzed to address the effect of propagation delay, crosstalk and power dissipation that explores the reliability of an interconnect wire. It is observed that using an MMB arrangement, the overall reduction in delay and crosstalk are 15.33% and 29.59%, respectively, compared to the MB for almost similar power dissipation.

Dynamic crosstalk analysis of mixed multi‐walled carbon nanotube bundle interconnects

Multi-walled carbon nanotube (MWCNT) bundles have potentially provided attractive solutions in current nanoscale VLSI interconnects. From fabrication point of view, it is difficult to control the growth of a densely packed bundle having MWCNTs with similar diameters. A realistic bundle is combination of MWCNTs with different number of shells. Thus, this research work focuses on the analytical model of a bundle having the MWCNTs with different number of shells or in turn different diameters (mixed MWCNT bundle (MMB)). Based on the multi-conductor transmission line theory, an equivalent single conductor (ESC) model is employed for the proposed MMB arrangements. The ESC model of MMB is used to compare the dynamic crosstalk delay with conventionally arranged bundle containing MWCNTs with similar diameters (MWCNT bundle (MB)) under different input transition time and spacing conditions. It is observed that a realistic MMB correctly estimates the crosstalk delay for the different transition time that overestimates the delay of a conventionally arranged MB by 1.35 times. Moreover, the MMB arrangement reduces the overall crosstalk delay by 47.26% compared with the conventional MB arrangements for an inter-bundle spacing ranging from 5 to 30 nm.