Bundle Interconnects Research Articles

Crosstalk Delay and Reliability Analysis of Carbon Nanotube On-Chip Interconnects: Modelling and Optimization using Metaheuristic Algorithm

In the field of VLSI technology, the miniaturization of ICs poses significant challenges to overall interconnect performance, particularly due to the rising concerns of crosstalk-induced reliability and durability issues. This work explores graphene-based randomly mixed carbon nanotube bundle (RMCB) interconnects as a viable solution for advanced reliable VLSI applications. Employing metaheuristic algorithms (Maximum Hole Degree, Particle Swarm Optimization, Stoyan and Yaskov Algorithm), this study seeks to optimize RMCB structures, maximizing carbon nanotube density within a fixed area. Notably, this study explores the effectiveness of algorithms’ performance in optimizing RMCB structures at a nano-technology node. Extensive signal integrity and reliability assessments, considering both rugged and pristine substrates, reveal that Stoyan and Yaskov (SY)-based optimization excels over PSO and MHD-based counterparts in terms of on-chip interconnect performance and reliability. The SY structure significantly dominates MHD-based (and PSO) counterparts by reducing crosstalk delay by 50% (30%), enhancing the average failure rate by 40% (37%), and improving electromigration reliability by 170% (63%).

Analysis of Delay and Dynamic Crosstalk in Spatially Arranged Mixed CNT Bundle Interconnects at Different Technology Nodes

In the present nanoscale regime, mixed carbon nanotube bundles (MCBs) are considered to be highly promising interconnect options. This research paper introduces a spatially arranged mixed carbon nanotubes (CNTs) bundle (MCB), wherein single-walled CNTs (SWCNTs) and multi-walled CNTs (MWCNTs) occupy equal halves in the MCB. An equivalent single conductor (ESC) model for MCB is employed to analyze the interconnect performances in terms of signal transmission delay and dynamic crosstalk delay at different technology nodes (i.e., 32nm, 22nm, and 16 nm). Encouragingly, a significant reduction in signal transmission delay and dynamic crosstalk induced delay are observed at 32 nm technology node. It is observed that at 32 nm technology node, the propagation delay and crosstalk induced delay significantly improves by 29.40% and 55.53%, respectively, compared to 22 nm technology node and 187.88% and 185.94%, respectively, compared to 16 nm technology node. The improvement in interconnect performances can primarily be attributed to the improvement in the number of conducting channels inside the MCB at 32 nm, which greatly impacted the interconnect parasitics such as quantum resistance, quantum capacitance, kinetic inductance etc.

Investigation of Optical Interconnects for nano-scale VLSI applications

The relentless trend toward miniaturization has brought interconnects to the brink of communication bottlenecks, operating at or near their ampacity (current carrying capacity) limits. This degradation in performance necessitates novel technologies with increased ampacity. This study explores optical interconnect (OI) as a potential future technology, offering high-bandwidth communication and low latency. This study models and simulates OI, integrating recent optical device advancements with modest modulator and detector capacitance (50 fF). Performance metrics including signal delay, power dissipation, and power-delay-product (PDP) are compared across copper (Cu) and single-wall carbon nanotube bundle (SWCNT-B) interconnects at 22 nm and 14 nm technology nodes. Results consistently show OI, with an active voltage current feedback (AVCF) based regulated gain cascode (RGC) transimpedance amplifier (TIA) receiver, outperforms Cu and SWCNT-B interconnects at global lengths and beyond. For instance, at 1000 μm and 22 nm, OI exhibits 88.47 % and 62.15 % delay improvements over Cu and SWCNT-B, respectively. This trend persists at 14 nm, with OI showing 93.68 % and 84.29 % delay improvements, respectively. Additionally, OI surpasses Cu and SWCNT-B in power efficiency beyond a critical length. As interconnects extend to global scales and beyond, the differences in delay, power, and PDP between OI and electrical interconnect increases, highlighting OI's advantages for future VLSI IC applications.

Pragmatic structure optimization: Achieving optimal crosstalk delay and gate oxide reliability of randomly mixed CNT bundle interconnects

This study explores the potential of randomly mixed carbon nanotube bundle (RMCB) as a viable on-chip interconnect. Achieving high-quality carbon nanotubes (CNTs) with uniform diameters is challenging for the current framework of enhanced fabrication techniques. The Stoyan and Yaskov technique is employed to optimize CNT arrangement within a specified rectangular area. This method accounts for statistical variation in CNT diameters, offering a more realistic and fabrication-focused approach to designing CNT bundle interconnects. Eight such practical RMCB structures (RMCB-50 to RMCB-350) are selected using this technique, each characterized by distinct CNT counts and variable diameters. Comprehensive average crosstalk-delay and reliability assessments are conducted by comparing different CNT bundle interconnects with the best-optimized RMCB (O-RMCB) interconnect, placed on various dielectric substrates such as SiO2, SiC, BN. The study unequivocally indicates that O-RMCB produces highly favorable results and stands as the most suitable future solution for VLSI circuits. Additionally, the thickness optimization of O-RMCB interconnect is explored, yielding in improvements in both performance and reliability compared to other well-known CNT bundled interconnects.

Delay characterization of multilayer graphene nanoribbon interconnects in presence of scattering and thermal effects

AbstractScattering source‐based mean free path (MFP) and circuit modeling are proposed for three different configurations of undoped multilayer graphene nanoribbon (U‐MLGNR) (viz. horizontal top‐contact (HTC), horizontal side‐contact (HSC), and vertical top‐contact (VTC)). A similar analysis is carried out for doped HTC‐MLGNR (D‐HTC‐MLGNR) considering dopants viz. Li, FeCl3, and AsF5, for a temperature range of 300–500 K. The optimistic intrinsic‐phonon limited (Λeff,1(T)) and realistic scattering limited (Λeff,2(T)) effective MFP models are considered to derive the equivalent resistance of MLGNR. The performance of MLGNR variants, considering Λeff,1(T) and Λeff,2(T), is compared to copper (Cu) (with smooth and rough surface) in terms of coupled line crosstalk‐induced delay (XT‐D). The results show that the MLGNR variants outperform Cu interconnects in terms of XT‐D, for Λeff,1(T). However, structural edge roughness being the dominant scattering source in Λeff,2(T), severely degrades the performance of MLGNR variants in comparison to Cu counterparts. Moreover, for Λeff,1(T) and Λeff,2(T), Li‐D HTC‐MLGNR outperforms other MLGNR variants. Also, among the MLGNR variants, U‐VTC‐MLGNR exhibits a minimum average relative penalty of 21.58 × 102% in terms of XT‐D, when Λeff,2(T) is considered as against Λeff,1(T). Li‐D HTC‐MLGNR with optimized width exhibits 10.59× lower XT‐D and 8.85× higher XT‐D for Λeff,1(T) and Λeff,2(T), respectively, compared to smooth Cu. The optimized Li‐D HTC‐MLGNR demonstrates a reduction of 85.48% and 74.67% in XT‐D values for Λeff,1 (T) and Λeff,2 (T), respectively, when compared to mixed carbon nanotube (MCNT) bundle interconnects.

Structure optimization: Configuring optimum performance of randomly distributed mixed carbon nanotube bundle interconnects

SummaryThis paper presents an efficient optimization strategy based on the Stoyan and Yaskov algorithm to maximize the tube density of randomly distributed mixed carbon nanotube bundles (RMCBs) for configuring optimum performance of on‐chip interconnects. Optimizing tube density has proposed eight different RMCB (RMCB1–RMCB8) structures of a varying number of carbon nanotubes (CNTs), where RMCB1 has the maximum CNTs. Moreover, the ABCD technique adequately analyzes the temperature‐dependent frequency and stability characteristics of a three‐line RMCB interconnect placed on smooth and rough substrates (SiC, BN, and SiO2). The smooth substrate material has the best 3‐dB bandwidth compared with rough SiC substrate, followed by BN and SiO2 for all RMCB structures, and among all structures, the RMCB8 has the best 3‐dB bandwidth. The relative stability of RMCB1 is improved by 134.2% and 22.7% w.r.t. RMCB8 placed on a smooth and rough SiC substrate, respectively. Whereas bandwidth of the RMCB1 is reduced by 26% and 88.5% w.r.t. RMCB8 placed on a smooth and rough substrate, respectively. Hence, there is a tradeoff between the bandwidth and the relative stability as the number of CNT increases. Therefore, RMCB3 placed on a smooth substrate and RMCB4 placed on a rough SiC substrate are considered the best‐optimized RMCB interconnects to maintain a balance between the two.

Delay analysis of mixed CNT bundles as global interconnect for nanotechnology nodes

Abstract This paper presents modeling of high current capability of mixed carbon nanotube (CNT) bundle interconnects depending upon the type of constituent CNT materials and their orientations. With different arrangements, one category of novel mixed CNT bundles formed by the combination of multi-walled/multi-shell CNT and double-shell CNT bundles (MDCB) are proposed and compared with the mixed CNT bundles (MSCB) formed with multi-shell CNT and single-walled CNT bundles. A time-domain analysis is performed for these structures to analyse the effect of delay and power dissipation. It has also been observed that MDCB structures give better performance (≈ 30%) than MSCB structures in terms of power-delay product at the global length of interconnect for nano-regime technology nodes. Also, MDCB structure formed by placing multi-walled CNTs along the periphery and double-walled CNTs in the centre of structure yields the best result against all proposed mixed CNT bundled structures and can be employed for future interconnect applications.

Tract-specific differences in white matter microstructure between young adult APOE ε4 carriers and non-carriers: A replication and extension study

The parahippocampal cingulum bundle (PHCB) interconnects regions known to be vulnerable to early Alzheimer's disease (AD) pathology, including posteromedial cortex and medial temporal lobe. While AD-related pathology has been robustly associated with alterations in PHCB microstructure, specifically lower fractional anisotropy (FA) and higher mean diffusivity (MD), emerging evidence indicates that the reverse pattern is evident in younger adults at increased risk of AD. In one such study, Hodgetts et al. (2019) reported that healthy young adult carriers of the apolipoprotein-E (APOE) ε4 allele – the strongest common genetic risk factor for AD – showed higher FA and lower MD in the PHCB but not the inferior longitudinal fasciculus (ILF). These results are consistent with proposals claiming that heightened neural activity and intrinsic connectivity play a significant role in increasing posteromedial cortex vulnerability to amyloid-β and tau spread beyond the medial temporal lobe. Given the implications for understanding AD risk, here we sought to replicate Hodgetts et al.‘s finding in a larger sample (N = 128; 40 APOE ε4 carriers, 88 APOE ε4 non-carriers) of young adults (age range = 19–33). Extending this work, we also conducted an exploratory analysis using a more advanced measure of white matter microstructure: hindrance modulated orientational anisotropy (HMOA). Contrary to the original study, we did not observe higher FA or lower MD in the PHCB of APOE ε4 carriers relative to non-carriers. Bayes factors (BFs) further revealed moderate-to-strong evidence in support of these null findings. In addition, we observed no APOE ε4-related differences in PHCB HMOA. Our findings indicate that young adult APOE ε4 carriers and non-carriers do not differ in PHCB microstructure, casting some doubt on the notion that early-life variation in PHCB tract microstructure might enhance vulnerability to amyloid-β accumulation and/or tau spread.

Frequency response analysis of CNT bundle interconnects

ABSTRACT When carbon nanotubes (CNTs) are used in interconnects, their electrical properties are appealing as they are not affected by surface scattering when the feature size decreases. After almost two decades of research on CNT-based interconnects, it is still a question which type of CNT bundle performs better than the other. There are many contradictory reports in this regard. So, it is very important to study the frequency response of these interconnects to ascertain their actual performance and compare them. HSPICE-based circuit simulations at 20 nm and 14 nm technology nodes are carried out. Furthermore, the analysis for local, semi-global and global interconnect lengths is carried out. Results show that single-walled CNT (SWCNT) bundles have higher voltage gain and higher current gain for all lengths at both the technology nodes. These results are significant in understanding the best choice of interconnects among SWCNT bundle, MWCNT bundle and mixed CNT bundle interconnects.

Temperature Dependent Analysis of Mixed CNT Bundle Interconnecting using Active Shielding Technique

The cumulative increase of resistivity in copper due to scaling and indispensable requirements of high current densities and unprecedented switching speed are the impelling forces behind the continuous investigation towards the new wiring solution for nanometer circuits and systems. Mixed carbon nanotube bundle (MCB) interconnects are the most optimistic solution that can address the challenges faced by the conventional materials and thereby enhances the lifetime of electrical interconnects. MCB is a combination of Single walled carbon nanotubes (SWCNT’s) and Multi walled carbon nanotubes (MWCNT’s). On the basis of hierarchical modelling, various bundle structures are introduced pertaining to the placement of SWCNT’s and MWCNT’s in the bundle. The reliability of the MCB structures are investigated by calculating the propagation delay and power dissipation. The delays and peak crosstalk noise are examined from the transient analysis for all the bundle structures considered in the present study. Further to improve the data rates and performance, CNTFET based ternary logic system is encompassed for MCB interconnects. Active shielding technique is incorporated effectively for minimizing the crosstalk effects. Finally, modelling of the mixed CNT bundle is done under the influence of temperature and the temperature sensitive crosstalk noise effects are investigated for CNTFET based active shielded MCB structures. Encouragingly, it is observed that, the crosstalk effects are lessened to a greater extent for the MCB structure wherein SWCNT’s are placed at the centre and MWCNT’s at the periphery. All these analyses have been carried out at 22 nm technology node.

Performance Analysis of CNT Bundle Interconnects in Various Low-k Dielectric Media

The capacitance of the interconnect, which contributes to RC delay, power, and crosstalk, is increasingly limiting the performance of ULSI chips as IC technology advances. Different dielectric materials are employed as electrical shielding between interconnects (also called as inter-wire dielectrics) to minimise the coupling capacitance of closely spaced interconnects, and they are compared in terms of their performance. For SWCNT and MWCNT interconnects at various global interconnect lengths for 20 nm and 14 nm technology nodes, performance parameters such as crosstalk delay, power dissipation, power crosstalk delay product (PCDP) and crosstalk noise are calculated and compared. It is observed that, upon using different dielectric materials in CNT bundle interconnect, MWCNT bundle interconnects is performing better compared to SWCNT bundle interconnects at 20 nm and 14 nm technology nodes for all global interconnect lengths.

Stability- and Crosstalk-Based Performance of Multi- and Double-walled Mixed CNT Bundles as Interconnect for Next-Generation Technology Nodes

The temperature-dependent modeling technique (in the temperature range of 200–500[Formula: see text]K) for a mixed class of carbon nanotube (CNT) bundle interconnects is proposed. The equivalent single conductor (ESC) transmission line models of multi-walled carbon nanotube (MWCNT) and double-walled carbon nanotube (DWCNT) are combined to develop multiple single conductor (MSC) model of mixed CNT interconnects. Various possible arrangements of densely packed MWCNT and DWCNT bundles (MDCB) are considered to form different types of mixed CNT bundle structures (MDCB-1, MDCB-2, MDCB-3 and MDCB-4). The integrated circuit emphasis simulation is performed and the performances of these mixed CNT bundle interconnects are investigated in terms of propagation delay (with and without crosstalk), power dissipation, power-delay product (PDP). Switching times, overshoot voltages and Nyquist plots are analyzed to check the stability of these mixed CNT structures for global interconnect length for 32-nm, 22-nm and 16-nm technology nodes. It is observed that the MDCB-1 structure yields the most promising result in all aspects for interconnect applications in the near future.

A prominent unified crosstalk model for linear and sub-threshold regions in mixed CNT bundle interconnects

With the feasibility to scale the devices and interconnects in highly sophisticated VLSI technology, the demand for high-speed and low-power e-applications have also subsequently increased stupendously. Based on the applications and requirements, a VLSI system is operated in different modes as linear or sub-threshold. A unified analytical model for describing both these linear and sub-threshold modes is highly desirable. This has been innovatively presented in the current paper. Moreover, the futuristic and emerging mixed carbon nanotube bundle (MCB) as interconnects for both linear and sub-threshold region of operations has been considered. The essential signal integrity analysis comprising of several crosstalk effects such as associated transient response, delay and power have been analyzed. To evaluate this, analytical model is formulated and proposed using accurate unconditionally-stable finite-difference time-domain (USFDTD) technique. Utilizing the proposed model, it is investigated that linear mode of operation is good for realizing high-speed systems while sub-threshold is a preferable operation for applications targeted for low-power. Comprehensively, it is envisaged that the average power-delay-product in MCB interconnects operating in sub-threshold region is low and reduced by 74% compared to corresponding linear region of operation. Also, it is demonstrated that the proposed unified USFDTD based model for MCB interconnects operating in different modes of operation is stable and not constricted by the Courant condition. At maximum allowable time step, the proposed model is nearly 10 and 25 times faster than the conventional FDTD analytical and HSPICE simulation models, respectively. The results reveal that USFDTD technique provides better accuracy than the FDTD technique. The different performance analyses are performed at 22 nm technology node.

Effect of temperature and single event transient on crosstalk in coupled single‐walled carbon nanotube (SWCNT) bundle interconnects

AbstractAlthough they have better electrical and thermal properties, thermal issues have become an important challenge to design modern integrated circuits with single‐walled carbon nanotube (SWCNT) bundle interconnects. The equivalent RLC model for SWCNT bundle interconnect is analyzed. Based on the proposed circuit for single event crosstalk (SEC), the influences of the length of line, nanotube diameter, metallic nanotube ratio, and technology node on SEC at different temperatures are studied. The potential impact mechanisms are also discussed. The simulation results show that, compared with one in copper line, peak voltage and pulse width of SEC in SWCNT interconnect are reduced by an average of 23.7% and 8.8%, respectively. The larger the diameter of SWCNT is or the more the ratio of metallic SWCNT is, the weaker the effect of SEC will be. With the increase of the length of line, the crosstalk effect will increase. The pulse width of SEC is more sensitive to the temperature when the length of line is longer. However, the peak voltage is more sensitive to the temperature when the length of line is shorter. As the technology node shrinks from 21 nm to 9.5 nm, the noise area of SEC increases from 0.55 V•ns to 1.89 V•ns, which results in that the crosstalk action time increases significantly.

Dielectric surface roughness scattering induced crosstalk performance of coupled MCB interconnects

A CMOS inverter driven equivalent single conductor model of capacitively coupled mixed CNT bundle (MCB) interconnects are taken to analyze the crosstalk induced time domain and frequency domain behaviors at 14 nm technology node for a temperature range (300–500 K). Four possible structures of MCB (e.g.S1, S2, S3 & S4) are analyzed by considering the dielectric substrate materials induced scattering. The most typical and consistent dielectric materials like silicon dioxide (SiO2), boron nitride (BN) and silicon carbide (SiC) are taken into account for studying the behavior of MCB depending upon dielectric surface roughness (DSR) scattering. A complete crosstalk (dynamic & functional) effect in terms of positive peaks, time duration and area of rise glitch is studied. The results revealed that MCB structure ‘S4’ is having less delay and more 3-dB frequency bandwidth in comparison to other structures of MCB. Moreover, S4 placed on SiC substrate material is depicting best results among other substrate materials. The bode stability of ‘S4’ on smooth surface and rough surface material is analyzed to validate the performance of ‘S4SiC’ in terms of phase and gain margin. It is also observed that the 3-dB frequency bandwidth of ‘S4SiC'reduces with increase in temperature. Consequently, the amplitude of surface roughness parameter (δsr) plays an important role to analyze the performance of coupled interconnects of MCB in deep sub-micron (DSM) regime.

The mitigation of signal integrity issues in coupled MWCNT bundles and a comparison with Cu interconnects

In the nanoscale regime, carbon nanotubes (CNTs) are being considered as a future alternative interconnect material for traditional copper (Cu) wires in integrated circuit technology. The advances in device scaling and the continuous increase of clock frequencies in very large-scale integration technology have resulted in signal integrity (SI) issues. The reduction of such SI issues in coupled multiwalled CNT bundle interconnects is evaluated herein. The worst-case crosstalk delay and peak noise voltage are simulated for three-line coupled interconnects at the 22-nm technology node. To minimize the crosstalk effects, a passive shielding technique is proposed, resulting in reductions of 15.3% and 40.8% in the dynamic in-phase and out-phase crosstalk condition, respectively. The SI of single- and two-line coupled MWCNT bundle interconnects is also investigated based on eye diagrams in a channel simulator and compared with that of Cu interconnects. The eye-opening height is significantly enhanced in the MWCNT bundle and Cu interconnects when using the proposed technique. Moreover, the MWCNT bundle has a higher eye-opening compared with its Cu counterpart.

Waveform analysis of carbon nanotube interconnects connected to various driver/load circuits

ABSTRACT Signal reliability of nano-scale interconnects is a major cause of concern at subthreshold voltages. This paper deals with the subthreshold operation of carbon nanotube (CNT) bundle interconnects of two different geometries viz. square CNT bundles (S-CNT) and triangular CNT (T-CNT) bundles. The output waveforms of the two interconnect geometries are studied to find out the effects of ON/OFF times and swing on the rising/falling propagation delays and power dissipated by the interconnects. Six cases of driver/load configurations comprising of inverter and transmission gates are considered in this study. Results show that the performance of CNT bundle interconnects is dependent on the timing and swing of the output waveforms. Also, triangular CNT bundle interconnects showed better performance in terms of propagation delay and power dissipated compared to traditionally proposed square CNT bundles.

Structure Fortification of Mixed CNT Bundle Interconnects for Nano Integrated Circuits Using Constraint-Based Particle Swarm Optimization

The emerging VLSI technology and simultaneously highly dense packaging of devices and interconnects in nano-scale chips have prosperously enabled realization of system-on-chip designs and advanced high-performance computing applications. Concurrently, these have aggravated inevitable challenges in miniaturized integrated circuits (ICs). One of the main limiters in the performance of high-speed VLSI designs is the on-chip interconnects. The emerging graphene based mixed carbon nanotube bundle (MCNTB) interconnects have been investigated as one of the most suited and physically realizable on-chip structure. The present work focuses on utilization of MCNTB as nano-interconnects in the optimized way. Determining optimized placement of CNTs in MCNTB configuration is tedious, skilful task and meagerly explored till date. This has been innovatively taken-up in the current work. In the present paper, novel and efficient particle swarm optimization (PSO) technique is explored and innovatively incorporated to obtain optimal distribution of CNTs in a given rectangular area. The objective function considered for the design is to maximize the tube density. Several signal integrity analyses have been executed. The proposed optimized mixed CNT bundle structure is compared with other different configurations of CNT bundle structures. It is analyzed that the proposed optimized MCNTB configuration produces highly favorable results and is apt suitable for futuristic nano IC designs. The different modelling and performance analyses are performed using MATLAB, SPICE and ADS EDA tools.

Novel Circuit Model of Multi-walled CNT Bundle Interconnects Using Multi-valued Ternary Logic

This research paper presents a novel circuit modeling and analysis of ternary logic for MWCNT bundle interconnects with active shielding under the influence of temperature variations. The far end crosstalk-induced noise and propagation delay of MWCNT bundle interconnects has been analyzed with and without the effect of shielding. A standard ternary inverter (STI) driver model is used to obtain the ternary logic at output. The temperature-dependent analysis is also carried out at different temperatures such as 300, 400 and 500 K. The temperature-dependent comparative analysis for MWCNT bundle, SWCNT bundle and copper interconnects with and without shielding is also performed. It has been observed that MWCNT bundle with active shielding outperforms the SWCNT and Cu by 75.7% and 84.4%, respectively. Similarly, the power dissipation is substantially reduced in the case of MWCNT bundle with respect to the Cu and SWCNT interconnects. It is also reported that the noise margin is marginally stable in ternary interconnects under the influence of temperature variation.

A Novel Approach to Reduce the Crosstalk in Graphene Based Interconnects Using Ternary Logic

This paper presents a novel approach to reduce the impact of crosstalk in multi-layered GNR (MLGNR), single walled CNT (SWCNT), multiwalled CNT (MWCNT) and mixed CNT bundle (MCB) based three-line bus architecture system. The proposed system primarily comprises of active shielding, repeater insertion and asymmetric triggering of the input signal. At the far end of the bus architecture, the crosstalk induced noise and propagation delay of MLGNR, SWCNT, MWCNT and MCB interconnects have been analyzed with and without the impact of shielding. A standard ternary inverter (STI) driver model is used to obtain the ternary logic at the output. Using the specified output, a temperature dependent comparative analysis is also performed for MLGNR and bundled CNT interconnects with and without shielding. Using industry standard HSPICE circuit simulations, it can be observed that the MLGNR offers a lower paracitic values even in higher temperature in comparison to the SWCNT, MWCNT and MCB interconnects. It primarily leads to a lesser delay and crosstalk using a bus interconnect system. The analysis has also extended for delay and crosstalk analysis for different interconnect lengths and temperatures with an insertion of shielding, repeaters and asymmetric triggering of bus architecture system. Under these conditions, it is also proved that an MLGNR based bus architecture offers a lesser crosstalk induced delay and noise compared to CNT bundle interconnects.