This paper presents a 4.5–8.5 GHz three-stage power amplifier(PA) fabricated in a 0.5 μm GaAs process. The PA adopts gain compensation technology with gain flatness and power transmission in the broadband. Furthermore, the size of the pHEMT is optimized to strike a balance among linearity, power-added efficiency (PAE) and the area. The measurement results show that the proposed PA has a gain flatness of 22.6 ± 0.8 dB with good input and output VSWR, the output saturation power is of 25 dBm and the corresponding power added efficiency is greater than 32% over the whole operating frequency band. This proposed PA has better broadband gain flatness and power characteristics compared to the conventional cascaded PA. The chip size of the PA is 2.475 mm × 0.9 mm, including all DC and RF pads.
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