Broadband Doherty Power Amplifier Research Articles

Analysis and design of broadband Doherty power amplifier using parameterized load modulation network and complex combining load

This paper presents a novel approach to design broadband Doherty power amplifiers (DPAs) with extended fractional bandwidth (FBW). A parameterized load modulation network (LMN) and complex combining loads are proposed that can extend the FBW while providing more accurate back-off impedance. To examine the influence of parameter variations in the LMN on the broadband performance of the DPA, we utilize the parameter scanning method and subsequently select the optimal parameters in the LMN. Additionally, three-dimensional computer visualization techniques is invoked to visually examine the impedance solution space of the complex combining loads. A DPA prototype with a bandwidth of 0.85–1.8 GHz is then designed and implemented using commercial GaN transistors to validate the proposed architecture. The fabricated DPA attains a measured gain of 14.2–15.7 dB and a saturated power of 43.0–44.9 dBm. Across the designed operation band, the measured drain efficiency reached 51.6%–73.6% at saturation and 43.7%–56.7% at 6 dB output power back-off. When driven by a 20 MHz modulated signal with a peak-to-average power ratio (PAPR) of 8 dB, the average efficiency of the fabricated DPA is higher than 46.7%.

Design of Broadband Doherty Power Amplifier Based on Misaligned Current Phase

A broadband Doherty power amplifier (DPA) always experiences an efficiency degradation between two efficiency peaks, especially at two side bands. In this study, the efficiency degradation was demonstrated to be caused caused by the in-phase power combining at the saturation power level. To solve this problem, current misalignment was introduced into the broadband DPA design. The carrier and peaking PA have different current phases when performing the power combination at the saturation power level. In this work, it was also demonstrated that the efficiency in the high-power region of a DPA can be improved by elaborately using misaligned current phases. A detailed analysis and the design procedure of a broadband DPA are presented in this paper. And a 1.5–2.45 GHz broadband DPA was implemented and measured. The fabricated DPA achieves a saturation output power of 42.7–44.9 dBm, a saturation drain efficiency (DE) of 62.7–74.1% and a gain of 10.2–13.9 dB over 1.5–2.45 GHz. Moreover, the fabricated DPA also achieves a 6 dB back-off DE of more than 49.1% in the frequency band of interest.

Design of an efficiency enhanced wideband Doherty power amplifier based on synthesising of a modified harmonic‐control load modulation network

AbstractA design of a broadband Doherty power amplifier (DPA) using a novel harmonic control network (HCN) is presented. The DPA structure focused on manipulating harmonic components using this new HCN to enhance the bandwidth of operation and power efficiency. The proposed HCN combines a third harmonic suppression network (THSN) with the second harmonic impedance inverter circuit (SHIIC). In the design, the second harmonic component of the main transistor and the peaking transistor are short‐circuited by their associated SHIIC. Additionally, the carefully designed SHIIC and THSN circuit placed between the main and peaking transistors realise open circuit conditions at the third harmonic for both transistors at the saturation state and back‐off regions. Side by side with the aid of the properly designed post‐matching tuned network (PMTN), these harmonic loading conditions make both amplifiers to operate in continuous Class‐F modes with enhanced‐added efficiencies over wideband conditions. As a result, a succession of highly efficient DPA modes can be formed over a continuous frequency range in the full Doherty region, resulting in a reduced‐size enhanced power efficiency wideband DPA. For verification, a wideband DPA operating from 1.1 to 1.8 GHz was designed and implemented using the proposed topology. The measured drain efficiency of the implemented DPA at 6‐dB back‐off is 52.5%–67.5%, while the saturated power across the specified bandwidth is 43–43.7 dBm. The fabricated DPA exhibits an average efficiency of 48.7%–59.4%, when supplied by a 40‐MHz long‐term evolution (LTE) signal with a 7.5‐dB peak‐to‐average power ratio (PAPR). Performing digital pre‐distortion (DPD) improves the adjacent channel power ratio (ACLR) from −25.8 dBc to −47.6 dBc.

A circuit solving method for output matching network parameters of Doherty power amplifiers

In this paper, all possible numerical solutions are provided when the matching conditions for Doherty power amplifier (DPA) back-off and saturation states are met. Firstly, this article presents an impedance expression of the DPA. Then all circuit parameter solutions can be solved for the load modulation of DPA using this expression. In the process of solving circuit parameters, the impedance matching of the DPA at the saturation level is established through the analysis of the S-parameter matrix. Then by limiting the impedance solution range of DPA at the output power back-off (OBO) level, the circuit parameter solutions that satisfy the specified conditions are meticulously screened. The output matching network of the DPA is designed according to the obtained circuit parameter solutions for broadband operation. To validate the proposed design method, a broadband DPA operating from 1.2 to 2.4 GHz is designed and measured based on the proposed method. Under the continuous wave excitation, the measured drain efficiency at 6 dB OBO level and saturation (SAT) level are 44%–56% and 51%-65.4% from 1.2 to 2.2 GHz, respectively. The peak output power is 45.1–46.3 dBm.

High‐efficiency broadband Doherty amplifier based on internal matching

AbstractIn this paper, a compact internally matched architecture of continuous class‐B/J Doherty power amplifier is studied. The influence of symmetric generalized combiner and postmatching network with harmonic control on the bandwidth and efficiency of Doherty power amplifier (DPA) is analyzed in detail. Based on the parameters obtained from theoretical analysis, a design method of internally matched continuous mode DPA (CM‐DPA) is proposed, and a broadband DPA with a size of 22.8 mm 24.5 mm was developed for experimental verification. The test structure shows that the maximum output power at saturation can reach 46.2 dBm. The efficiency of 6 dB back‐off is 58%–63.4%, with good consistency. In the reliability experiment, transistor and matching circuit of the CM‐DPA have a temperature below 100°C at saturation. The output power and efficiency tested at different temperatures (C, C, and C) show that the DPA has high reliability.

Analysis and design of dual‐input Doherty power amplifier with enhanced efficiency for broadband application

SummaryThere is a large efficiency degradation between the two efficiency peaks in a broadband Doherty power amplifier (DPA) when the working frequency deviates from the center point. In this paper, dual‐input technique is adopted to improve the conversion efficiency over the dynamic power range in broadband DPAs. The efficiency between the two efficiency peaks in the DPA is enhanced through dynamically control the input power levels of the carrier and peaking power amplifiers (PAs) as well as the phase difference between the two sub‐amplifiers. As a proof of concept, a broadband dual‐input DPA (DI‐DPA) operating over 1.1–2.2 GHz is fabricated and measured in this paper. Experimental results show the fabricated DI‐DPA delivers a saturation output power of 43.5–44.7 dBm with a gain of 9.6–11.5 dB and a drain efficiency of 50.5%–58.6% in the interested frequency band. Meanwhile, a 6 dB back‐off drain efficiency of 40.4%–65.8% is also obtained by the DI‐DPA over 1.1–2.2 GHz.

A High-Relative-Bandwidth Doherty Power Amplifier with Modified Load Modulation Network for Wireless Communications

This paper presents a novel load modulation network to realize a broadband Doherty power amplifier (DPA). The proposed load modulation network consists of two generalized transmission lines and a modified coupler. A comprehensive theoretical analysis is carried out to explain the operation principles of the proposed DPA. The analysis of the normalized frequency bandwidth characteristic shows that a theoretical relative bandwidth of approximately 86% can be obtained across a normalized frequency range of 0.4-1.0. The complete design process that allows the design of the large-relative-bandwidth DPA based on derived parameter solutions is presented. A broadband DPA operating between 1.0 GHz and 2.5 GHz was fabricated for validation. Measurements demonstrate that the DPA can deliver an output power of 43.9-44.5 dBm with a drain efficiency of 63.7-71.6% in the 1.0-2.5 GHz frequency band at the saturation level. Moreover, a drain efficiency of 45.2-53.7% can be obtained at the 6 dB power back-off level.

A Compact and Broadband Doherty Power Amplifier Without Post-Matching Network

Post-matching network (PMN) dominates broadband Doherty power amplifier (DPA) design, but at the cost of large footprint. This brief presents a PMN-free, compact and broadband DPA based on dual-mode impedance transformer (IT) which can simultaneously realize a complex-to-real conversion at two frequencies. The conversion ratio of the IT is significantly increased while its fluctuation is reduced after collaborating a short drain bias. The dual-mode ITs are used as the output matching networks in the carrier and peaking paths. An out-of-phase <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2^{\mathrm{ nd}}$ </tex-math></inline-formula> harmonic injection path is constructed based on the inherent structure of the IT without additional bridge, resulting in enhanced saturated efficiency and output power at the upper band edge. A prototype circuit operating from 2.1 to 3.1 GHz is fabricated, and measured results show a 7-8.2 dB gain and 42.2-43.3 dBm output power at saturation. The 6-dB OBO and saturated efficiency is 42.3-52% and 60.4-67.7%, respectively. The area of the whole OMNs is only <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$19\mathbf {\times }$ </tex-math></inline-formula> 37 mm2, indicating a significant size reduction, while the DPA’s performance is comparable with the PMN types.

Broadband Doherty Power Amplifier Using Short Ended λ/4 Transmission Lines Based on the Analysis of Negative Characteristic Impedance

This paper presents a broadband Doherty power amplifier (DPA) using quarter-wavelength ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\lambda $ </tex-math></inline-formula> /4) transmission lines with negative characteristic impedance. In conventional DPA designs, the load modulation network is frequency-dependent, leading to bandwidth limitation at the back-off power region. In this design, by integrating two <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\lambda $ </tex-math></inline-formula> /4 transmission lines with negative characteristic impedance into the main and auxiliary branches, the impedance at the back-off power can be manipulated to maintain high efficiency at back-off power over a wide frequency range. Thus, the operational bandwidth is extended. In circuit realization, the two negative characteristic impedance <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\lambda $ </tex-math></inline-formula> /4 transmission lines are replaced by paralleled negative LC components. Then, the negative capacitor is combined into the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\pi $ </tex-math></inline-formula> -shaped impedance matching network, while the negative inductor is eliminated by introducing Norton transformation. For verification, a broadband DPA with a fractional bandwidth of 108.6% from 0.8 to 2.7 GHz is implemented. The measured saturated output power is 41.8-44 dBm. The saturated and 6-dB back-off power drain efficiencies are 47.6%-84.4% and 39.5%- 52%, respectively. A 20-MHz LTE modulated signal with peak-to- average power ratio (PAPR) of 7.5 dB is also applied to measure the fabricated DPA. After digital predistortion, the adjacent channel leakage ratio (ACLR) better than −45.35 dBc is achieved, and the measured average efficiency is higher than 40% within the operating band.

Application of X‐parameter model of gallium nitride device for a continuous broadband Doherty power amplifier design

AbstractThe design of a continuous broadband Doherty power amplifier (DPA) based on an X‐parameter model is presented in this work. The broadband load‐pull X‐parameter model is extracted at both the package plane and current generate plane of the device under test. The model cannot only predict the fundamental and harmonic nonlinear behavioral accurately, but also find the optimal output power and drain efficiency (DE) region of the Smith chart precisely, thereby assisting DPA design. A 10‐W gallium nitride packaged transistor from Wolfspeed is utilized in this design. The fabricated DPA reached a saturation output power of 44.3 dBm, with a saturation DE over 68% and a 6 dB output power back‐off efficiency over 51% in the frequency range of 1.1–1.8 GHz, verifying experimentally the effectiveness of the proposed design methodology.

Design of a broadband Doherty power amplifier with a modified load modulation network

This article proposes a modified load modulation network (LMN) to adjust the structure of the traditional Doherty power amplifier (DPA) by changing one λ/4 microstrip line at the output of the main power amplifier into two in the traditional DPA and connecting a terminal open-circuit λ/2 line at the junction point which can reduce the frequency dispersion effect to achieve expanding bandwidth while maintaining saturation efficiency and back-off efficiency. A 2.6–3.6 GHz DPA is designed and fabricated for verification. The measured results show that the saturated output power is 42.5–44 dBm and the saturated efficiency is between 63% and 69% in target band with a gain from 8.5 to 9.5 dB. At 6 dB output power back-off, the drain efficiency is 44%–50%. And the adjacent channel power ratio (ACPR) is better than −32 dBc.

Miniaturized Broadband Doherty Power Amplifier Using Simplified Output Matching Topology

This paper presents a Doherty power amplifier (DPA) with reduced size and wide bandwidth by using a simplified output matching topology. In broadband DPA designs, post-matching networks are usually added after the combing node, which usually occupy large circuit sizes. However, in this design, the post-matching network is not used. Instead, two ideal transformers and specific output matching components are employed at carrier and peaking branches. Then, by rearranging the output matching components in the two branches, Norton transformation can be used and the ideal transformers can be eliminated. In this way, the impedance at the combining node is directly matched to a 50- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula> load without using a post-matching network, resulting in both compact size and wide bandwidth. For verification, a broadband DPA prototype with a very simple structure is implemented. The fabricated circuit shows a compact size. A wide bandwidth from 1.3 to 2.8 GHz (73%) is achieved with a saturated output power of 41.4–44.6 dBm. The drain efficiencies at saturation and 6-dB back-off power level are 60.1–79.1% and 41.8–61%, respectively, which are comparable to those of state-of-the-art designs.

Enhancing Bandwidth and Back-Off Range of Doherty Power Amplifier With Modified Load Modulation Network

This article presents a novel methodology for designing a broadband Doherty power amplifier (DPA) with extended output power back-off (OBO) range. A modified load modulation network (LMN) is proposed to enhance the OBO range and the bandwidth of the DPA simultaneously. Analysis is conducted to explore the relationship between the proposed LMN parameters and the broadband performance under various OBO levels. Generalized design formulas of the LMN parameters are then introduced to offer the broadband solution for arbitrary current ratios and OBO levels. An asymmetric DPA is demonstrated and implemented with gallium nitride (GaN) transistors using the proposed approach. The fabricated DPA operates from 1.4 to 2.5 GHz with 9-dB OBO range. The measured drain efficiency reaches 61%-75.5% at saturation and 44.6%-54.6% at 9-dB OBO within the operating bandwidth. When driven by a 60-MHz modulated signal with 9-dB peak-to-average power ratio (PAPR), the fabricated DPA attains 47.4%-53.5% average drain efficiency and better than -45.5-dBc adjacent channel leakage ratio (ACLR) after digital predistortion.

Optimized Broadband Load Network for Doherty Power Amplifier Based on Bandwidth Balancing

This letter presents an optimized broadband load network for the Doherty power amplifier (DPA) based on bandwidth balancing between low- and peak-power levels. The optimized broadband load network is composed of a quasi-lumped $\lambda $ /4 impedance transformer (ITF), a modified multiple resonance circuit (MMRC), and a broadband postmatching network (PMN). The quasi-lumped ITF at the carrier amplifier has an optimized characteristic impedance for bandwidth balancing between low- and peak-power levels. The MMRC provides the quasi-lumped ITF with an appropriate susceptance for optimized bandwidth. It also matches the impedance for the peaking amplifier. To validate this design concept, the broadband DPA was implemented using 30-W gallium–nitride high electron mobility transistor (GaN-HEMT) for both carrier and peaking amplifiers. For the down-link long-term evolution (LTE) signal with a channel bandwidth of 10 MHz and a peak-to-average power ratio (PAPR) of 6.5 dB at the frequency range of 1.15–2.45 GHz, DE ranging from 38.4% to 52.2%, and the adjacent channel leakage power ratio (ACLR) ranging from −23.9 to −35.0 dBc at an average output power of from 39.7 to 41.7 dBm were achieved.

Systematic Design Methodology of Broadband Doherty Amplifier Using Unified Matching/Combining Networks With an Application to GaN MMIC Design

This paper presents a new design methodology for broadband Doherty architecture using the three-port input and output networks technique. The proposed topology was developed to overcome the Doherty power amplifier (DPA) bandwidth limitations. The output three-port network performs the impedance matching from any load impedance to the optimum loads for both main and peaking transistors and also combines the power delivered from the two devices at any power ratio. On the other hand, the input-splitting network is proposed for matching the input impedances of the two transistors to the source impedance. The freedom in choosing the power division ratio of the input network enables us to achieve a tradeoff between efficiency and linearity. Also, it provides a way to accomplish the phase compensation using an arbitrary phase difference between the two branches of the Doherty power amplifier and thus, helps obviate the need of the highly bandwidth limiting offset lines found in the Doherty design. A two-stage broadband Doherty power amplifier is implemented using 0.25-um GaN HEMT MMIC process to validate the proposed topology. The fabricated DPA was measured under both continuous wave (CW) and modulated signal at different operating frequencies. Across 3.3–3.7 GHz, the implemented DPA delivers a maximum output power exceeding 42 dBm, power added efficiency (PAE) over 52 % at the peak power and over 38 % in the back-off state over the operating 400 MHz bandwidth. The fully integrated circuit has a chip-size of 4.4 mm $\times\,\,3.5$ mm.

A Broadband Doherty Power Amplifier With Hybrid Class-EFJ Mode

This paper proposes a method that employs novel hybrid continuous class-EFJ power amplifiers (PAs) as carrier PA to design a broadband high-efficiency Doherty power amplifier (DPA). Bandwidth characteristic of the proposed DPA is analyzed in detail. By proper selection of related parameter values, up to 78% fabrication bandwidth can be obtained. Post-harmonic tuning network is applied to improve the bandwidth and enhance the efficiency. Then, a closed design process is presented to design broadband DPA based on derived theories. For validation, a broadband DPA operating in 1.2-2.8 GHz is designed and fabricated. Measurements illustrate that the DPA can deliver saturated output power between 43.7 dBm and 44.1 dBm in 1.2-2.8 GHz, and the saturated drain efficiency from 60.5% to 74.2 % is achieved. Moreover, drain efficiency is 48.1%-57.6% at the 6 dB power back-off. Compared with conventional DPAs, the proposed DPA exhibits superior performance of bandwidth characteristics and power back-off efficiency over a wide bandwidth.

High‐power UHF Doherty amplifier output combiner network optimization by 3‐port sub‐circuit X‐parameters characterization

AbstractThis letter presents the optimization of the output combining network for a high‐power broadband Doherty power amplifier (DPA), based on the adoption of X‐parameters. The technique relies on the large‐signal vector network characterization of the prospective 3‐port DPA subcircuit. The characterization stage was carried out implementing the devices termination by the multisection artificial transmission line technique, thus allowing to terminate the devices with more accurate impedance value across the frequency band. This was validated by the development of the output combiner of a DPA prototype based on a pair of silicon laterally diffused MOSFETs (Si‐LDMOS). It was optimized in the band from 640 to 920 MHz, while the experimental characterization has been compared with a previous similar design. The DPA prototype exhibited a peak power of 54.4 dBm at centre frequency, with a peak drain efficiency (DE) up to 62% and 56% respectively at peak power and at 8‐dB input power back‐off. The data show a significant improvement with respect to the previous implementation of the same device technology and input network. This is due to the accuracy of the X‐parameter model based simulations, which is estimated to be 5.6 E‐3 in terms of normalized mean error.

Breaking the Bandwidth Limit: A Review of Broadband Doherty Power Amplifier Design for 5G

The Doherty power amplifier (DPA) has been extensively explored in the past and has become one of the most widely used power amplifier (PA) architectures in cellular base stations. The classical DPA suffers intrinsic bandwidth constrains which limit its application in future 5G wireless transmitters. In this paper, we present a comprehensive review of the DPA bandwidth enhancement techniques proposed in literature in order to provide a thorough understanding of the DPA's broadband design for high-efficiency 5G wireless transmitters. We elaborate on the main bandwidth limitation sources and provide circuit design insights. We then follow with an overview of bandwidth enhancement techniques developed for the DPA, including modified load-modulation networks, frequency response optimization, parasitic compensation, post-matching, as well as distributed DPA, dual-input digital DPA, transformer-based power-combining PA, and transformer-less load modulated PA architectures. Furthermore, challenges and design techniques for integrated circuit (IC) implementation of broadband DPAs are discussed, including a review of circuits developed in CMOS, SiGe, and GaN processes, and operating in RF and mm-Wave frequencies.

Bandwidth Enhancement of Frequency Dispersive Doherty Power Amplifier

This letter presents a modified Doherty power amplifier (DPA) combining network with wide bandwidth (BW) and high power utilization factor (PUF). For the first time, the impact of the excessive phase dispersion of matching networks on the performance of conventional broadband DPA is analytically revealed. For dispersion compensation, an optimized adaptive combining load is introduced to enhance the achievable DPA BW and PUF. For verification, a 42-dBm equal-cell DPA is prototyped to cover 1.4–2.55 GHz. Measurement results indicate that, over the prescribed frequency range, a PUF of over 0.95, back-off efficiency (6 dB) of 48%–58%, and saturation efficiency of 62%–74% can be achieved. Moreover, under WCDMA excitation, the adjacent channel leakage ratio (ACLR) was found to be better than −32 dBc with average efficiency of over 45% without applying digital predistortion techniques.

Design of continuous mode Doherty power amplifiers using generalized output combiner

In this paper, a continuous mode Doherty power amplifier (DPA) working over an octave bandwidth is constructed using a generalized combiner. The generalized combiner provides the PA designers with more freedoms for realizing broadband DPAs. Theoretically, the generalized combiner could expand the working bandwidth of continuous mode DPA. A continuous mode DPA working over 1.2–2.7 GHz (a relative bandwidth of 76.9%) is implemented in this contribution for demonstrating the universality of the generalized combiner. As a demonstrator circuit, the fabricated DPA achieves drain effciencies of 40–54% and 44–75% at 6 dB back-off and saturation power levels, respectively. The maximum output power of the fabricated DPA is 42.1–44.2 dBm with a saturation gain of 7.2–11.3 dB over 1.2–2.7 GHz. When the designed DPA is excited by a 20 MHz LTE signal with a peak to average power ratio of 7.04 dB, the fabricated DPA achieves adjacent channel leakage ratios (ACLRs) of −29.5 dBc and −49.5 dBc at 2.4 GHz before and after DPD technique, respectively.