Bottom Structure Research Articles

声旁一致性对不同结构形声字识别的影响

通过眼动技术观察汉语阅读者在读音判断任务中对形声字声符和义符的注意规律，旨在探讨声符注意优势是否会受声符位置和声旁一致性高低的影响。结果发现：1) 一致性和结构的交互作用会导致声符注意优势的差异，在左形右声结构中，高一致字和低一致字的识别模式基本相同，声符注意优势明显；2) 在上形下声结构中，高一致字的声符注意优势会比低一致字更强；在左声右形结构和上声下形结构中，低一致字的声符注意优势会比高一致字更强。3) 推测大家族的抑制作用、义符携音性、汉字结构熟悉度、读音判断任务等可能成为声符注意优势产生差异的原因。 Aiming to find the phonetic consistency’s influence on different structures of phonogram characters in normal reading conditions, an Eyelink-1000 eye tracker was used to explore the role of phonetic radicals and semantic radicals in Chinese characters. The results showed that: 1) Phonetic radicals were given more attention than semantic radicals in all structures. Especially, when phonetic radicals were in the right or bottom of the characters, this advantage will be obvious. 2) Phonetic consistency plays a part in different structures of phonogram characters: Under the phonetic radical in right side structure, the consistency doesn’t make a difference in its recognition mode; Under the phonetic radical in left side and top side structures, semantic radical of high consistent word gain more attention; Under the phonetic radical in bottom side structure, phonetic radical of high consistent word gains more attention. 3) The differences of the advantage in phonetic radicals result from inhibitive effect of big size family, phonetic messages of semantic radicals, familiarity of Chinese characters’ structures and sound judgment task.

Use of Bottom Structure and Tank Cover during Rainbow Trout Rearing in Circular Tanks

The use of environmental enrichment has been found to be beneficial in fish rearing performance and behavior. This study evaluated the effects of partial overhead cover and rearing tank substrate on the hatchery performance of juvenile rainbow trout Oncorhynchus mykiss. Four treatments were used in circular tanks: open tanks with concrete blocks, partially-covered tanks with blocks, open tanks with no concrete blocks, and partially-covered tanks with no blocks. There was no significant effect of concrete block substrate use on rainbow trout weight gain or feed conversion ratio. However, fish reared with overhead cover had a significant weight gain increase and a significant feed conversion ratio decrease compared to uncovered tanks. There was no significant interaction between cover and substrate. The use of overhead cover is recommended to increase trout rearing performance in circular tanks.

Bottom structure of selected basins in The Port of Gdynia

Bottom structure of the basins in the Port of Gdynia, Poland, was analysed based on the archival materials of the Department of Operational Oceanography of Marine Institute in Gdańsk, particularly seismic profiles and macroscopic descriptions of sediment cores. Seismic profiling and core collection were performed in selected basins and within the fairway. The rich source material was used to draw a detailed bathymetric map of the bottom of the basins, a map of surface sediments, and a synthetic geological cross-section. A considerable variation in bottom depth within the analysed basins was observed. Bedrock sediments comprised Miocene sands and silts covered with glacial and fluvioglacial sediments, which reach the surface of the water, especially in the central part of the fairway. Within the eastern part of the fairway, fluvioglacial sediments are covered with marine sediments related to the Littorina transgression. Within the inner port and in the outport, a series of glacial and fluvioglacial sediments are covered with a thick (about 10 m) series of glaciolacustrine and lacustrine sediments, which in turn is covered with fluvial and deltaic sediments. The surface of the bottom is composed of contemporary, anthropogenically modified sediments. The map of surface sediments of the bottom corresponds to the geological map on the horizon of about 10 meters beneath land surface.

Dual-layered nanocomposite substrate membrane based on polysulfone/graphene oxide for mitigating internal concentration polarization in forward osmosis

A novel thin-film composite (TFC) forward osmosis (FO) membrane with dual-layered substrate membrane was fabricated by a double-blade casting technique using different polysulfone (PSf) concentrations for top (15 wt%) and bottom (7 wt%) substrate layers. Graphene oxide (GO) was incorporated in the substrate layer, and the dual casting approach resulted in a membrane support with a highly porous bottom structure and a dense top skin layer on which the polyamide active layer was effectively formed. The dual-layered TFC PSf/GO membrane (TFC-PSfdGO) exhibited high water permeability, and ion selectivity was enhanced by the presence of well dispersed hydrophilic GO in the PSf substrate. The TFC-PSfdGO also exhibited the lowest specific reverse salt flux (Js/Jv = 0.19 g L-1) and a more favorable structural parameter (S = 130 μm) compared to GO-free membranes. Using deionized water as feed solution and 1 M NaCl as draw solution (DS), TFC-PSfdGO had Jv = 33.8 L m−2 h−1 and Js = 6.9 g−2 h−1 under AL-FS mode, and Jv = 61.5 L m−2h−1 and Js = 14.0 g−2 h−1 under AL-DS mode. The potential of TFC-PSfdGO for commercial application was further evaluated by fabricating it with a fabric backing support (denoted as TFC-PSfdGOf). Compared to TFC-PSfdGO, TFC-PSfdGOf exhibited only 14% decline in its water flux. The overall results reveal that, fabrication of TFC substrate membrane via dual-blade casting approach along with GO incorporation produced high-performance TFC FO membranes which likely reduced the internal concentration polarization effects.

Fast Threshold Voltage Compensation AMOLED Pixel Circuit Using Secondary Gate Effect of Dual Gate a-IGZO TFTs

We report a fast threshold voltage ( $\text{V}_\mathrm {TH})$ compensation pixel circuit for active-matrix organic light-emitting diode displays. The circuit utilizes the secondary gate effect in amorphous-indium-gallium-zinc-oxide thin-film transistors (TFTs) with the dual-gate (DG) (bottom and top gate) structure and consists of three single-gate TFTs, one DG driving TFT, and two capacitors. It compensates the initial $\text{V}_{\mathrm {TH}}$ variation after fabrication and takes into account the carrier mobility differences between the top and bottom channels of a DG TFT by using a correction TFT that enables $\text{V}_\mathrm {TH}$ sampling via the channel with the higher mobility, the bottom channel. This achieves very short $\text{V}_\mathrm {TH}$ sampling time, below $10~\mu \text{s}$ . Experimental results are consistent with those from Silvaco SmartSpice simulations.

Development of Pareto strategy multi-objective function method for the optimum design of ship structures

It is necessary to develop an efficient optimization technique to perform optimum designs which have given design spaces, discrete design values and several design goals. As optimization techniques, direct search method and stochastic search method are widely used in designing of ship structures. The merit of the direct search method is to search the optimum points rapidly by considering the search direction, step size and convergence limit. And the merit of the stochastic search method is to obtain the global optimum points well by spreading points randomly entire the design spaces. In this paper, Pareto Strategy (PS) multi-objective function method is developed by considering the search direction based on Pareto optimal points, the step size, the convergence limit and the random number generation. The success points between just before and current Pareto optimal points are considered. PS method can also apply to the single objective function problems, and can consider the discrete design variables such as plate thickness, longitudinal space, web height and web space. The optimum design results are compared with existing Random Search (RS) multi-objective function method and Evolutionary Strategy (ES) multi-objective function method by performing the optimum designs of double bottom structure and double hull tanker which have discrete design values. Its superiority and effectiveness are shown by comparing the optimum results with those of RS method and ES method.

Low-Temperature Growth of Indium Oxide Thin Film by Plasma-Enhanced Atomic Layer Deposition Using Liquid Dimethyl(N-ethoxy-2,2-dimethylpropanamido)indium for High-Mobility Thin Film Transistor Application.

Low-temperature growth of In2O3 films was demonstrated at 70-250 °C by plasma-enhanced atomic layer deposition (PEALD) using a newly synthesized liquid indium precursor, dimethyl(N-ethoxy-2,2-dimethylcarboxylicpropanamide)indium (Me2In(EDPA)), and O2 plasma for application to high-mobility thin film transistors. Self-limiting In2O3 PEALD growth was observed with a saturated growth rate of approximately 0.053 nm/cycle in an ALD temperature window of 90-180 °C. As-deposited In2O3 films showed negligible residual impurity, film densities as high as 6.64-7.16 g/cm3, smooth surface morphology with a root-mean-square (RMS) roughness of approximately 0.2 nm, and semiconducting level carrier concentrations of 1017-1018 cm-3. Ultrathin In2O3 channel-based thin film transistors (TFTs) were fabricated in a coplanar bottom gate structure, and their electrical performances were evaluated. Because of the excellent quality of In2O3 films, superior electronic switching performances were achieved with high field effect mobilities of 28-30 and 16-19 cm2/V·s in the linear and saturation regimes, respectively. Furthermore, the fabricated TFTs showed excellent gate control characteristics in terms of subthreshold swing, hysteresis, and on/off current ratio. The low-temperature PEALD process for high-quality In2O3 films using the developed novel In precursor can be widely used in a variety of applications such as microelectronics, displays, energy devices, and sensors, especially at temperatures compatible with organic substrates.

Anatomical consideration of percutaneous transvenous mitral annulo-plasty: A novel procedure for treatment of functional mitral regurgitation

This research paper analyzes, finite element based two dimensional device simulations for top and bottom contact organic field effect transistors (OFETs) by considering uniform and non-consistent mobility regions. To model the morphological disorder in bottom contact structure, some calibrated standards for simulation is developed viz. by considering variable low mobility regions near the contacts. An analytical model is developed, by considering contact resistance and field dependent mobility. The effect of channel length variation (5–40 μm) on performance parameters is highlighted for both the structures. Subsequently, results shows only 1% change in current for bottom contact with 0.5 μm and 1 μm low mobility region near the contacts, due to dominant contact resistance, whereas, linear dependency is observed for other simulated structures. The top contact device shows 0.43 cm2/V s saturation mobility at 5 μm and 13% decrease up to 20 μm and afterwards constant behavior is noticed, whereas low mobility is extracted in bottom contact devices and shows 10–20% increase in both the mobilities for increasing channel length from 5 to 40 μm. For top and bottom devices, total 65% and 62% decrease in contact resistance is observed for increasing gate voltage from −1.8 V to −3 V and this percentage reduces for increasing the length of low mobility region. Further, we have evaluated 13%, 40% and 78% increase in the trap density, while proceeding for 0.25 μm, 0.5 μm and 1 μm low mobility region in the bottom contact structure.

Low-Temperature Processed Metal-Semiconductor Field-Effect Transistor with In-Ga-Zn-O/AgOx Schottky Gate

Amorphous oxide semiconductors (AOSs), such as In-Ga-Zn-O (IGZO), are expected to be used as a channel material for thin-film transistors (TFTs) because the IGZO TFTs exhibit field-effect motilities (μFE) of over 10 cm2/Vs and good uniformity even fabricated at room temperature [1]. Metal-insulator-semiconductor field-effect transistor (MIS-FET) has been employed widely for the IGZO MIS-FET. However, processing temperature of 300-400 °C is required to guarantee the performance and reliability of the IGZO MIS-FET. In comparison with the MIS-FET, metal-semiconductor field-effect transistor (MES-FET) has several advantages such as low processing temperature since Schottky gate can be formed at low temperature. Thus, the IGZO MES-FET is a good candidate for flexible device applications. However, there is only a few reports for AOSs based MES-FET due to difficulty of the formation of stable and good Schottky contacts with AOSs [2, 3]. Previously, we reported the top-gate coplanar MES-FETs with an IGZO channel, which was deposited by mist chemical vapor deposition, and sputtered AgOx Schottky gate [4]. A μFE of 3.2 cm2/Vs and a subthreshold swing of 356 mV/decade were achieved. However, the maximum processing temperature of reported MES-FET was 350 °C. In this study, we fabricated MES-FET with room-temperature deposited sputtered IGZO channel. We investigated the effect of O2 gas flow ratio during the IGZO deposition and mid-annealing at 200 °C. A 100-nm-thick IGZO channel was deposited by dc magnetron sputtering in the mixture of Ar/O2 gas at room temperature, using a ceramic target (In2O3 : Ga2O3 : ZnO = 1 : 1: 1 atm.%). The O2 gas ratio was chosen at 1 and 0.8 % at a deposition pressure of 1 Pa. After patterning of the IGZO channel, one of the IGZO deposited at 1 % of O2 was annealed in air at 200 °C for 1 hour. Then, an AgOx Shcottky gate was deposited by reactive sputtering at room temperature and Au was deposited on the AgOx. Finally, source and drain electrodes were formed by Mo. Fig. 1 shows I-V characteristics of the Schottky diode. The rectification ratio (VG = ±2 V) of IGZO (1% O2) and IGZO (0.8 % O2) and IGZO (1 % O2+mid-annealing at 200 °C) was 2.3×106, 2.1×107, 3.3×107, and ideality factor was 1.75, 1.41, 1.39, respectively. Fig. 2 shows transfer characteristics of the IGZO MES-FETs with W/L of 100/10 µm. The electrical properties of the TFTs and Hall effect measurement results of IGZO channels were summarized in Table I. From the TFT characteristics, it was confirmed the Von shifted from 0.4 to 0.2 V when O2 ratio decrease from 1 to 0.8 %. When the IGZO was annealed at 200 °C, the on-current markedly increased accompanied by the negative Von shift. The μFE of the IGZO MES-FET, Hall carrier concentration and Hall mobility of the IGZO films were also summarized in Table I. The μFE and Von of the IGZO MES-FET were well correlated with the Hall mobility and carrier concentration of the IGZO channel, respectively. Detail of the results will be discussed in the conference. Acknowledgement Authors would like to thank Drs. Giang T. Dang and Martin W. Allen, University of Canterbury, New Zealand, for their helpful discussions regarding formation process and mechanism of the Schottky contact with AOS. [1] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono, “Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors,” Nature, vol. 432, no. 25, pp. 488–492, (2004). [2] M. Lorenz, A. Lajn, H. Frenzel, H-V. Wenckstern, M. Grundmann, P. Barquinha, R. Martins. And E. Fortunato, “Low-temperature processed Schottky-gated field-effect transistors based on amorphous gallium-indium-zinc-oxide thin films” Appl. Phys. Lett., vol. 97, no. 10, pp. 243506-1–243506-3, (2010) [3] D-H. Lee, K. Nomura, T. Kamiya, and H. Hosono, “Metal-Semiconductor Field-Effect Transistor Made Using Amorphous In-Ga-Zn-O Channel and Bottom Pt Schottky Contact Structure at 200°C” ECS Solid State Lett., vol. 1, no. 1, pp. Q8–Q10, (2012). [4] G-T. Dang, T. Kawaharamura, M. Furuta, Member, IEEE, and M-W. Allen, “Metal–Semiconductor Field-Effect Transistors With In–Ga–Zn–O Channel Grown by Nonvacuum-Processed Mist Chemical Vapor Deposition,” IEEE Electron Device Lett., vol. 36, no. 5, pp. 463-465 (2015). Figure 1

High Photoresponsivity Multilayer MoS2 Thin-Film Transistors with Local Bottom Gate Structure

2D layered transition metal dichalcogenides (TMDs), especially MoS2, has received great attention for next-generation semiconductor devices because their thin film transistors (TFTs) show a nearly ideal subthreshold swing (SS ≈ 70 mV decade-1), high on/off current ratio (I on/I off ≈ 108), and high field-effect mobility (µ eff > 100 cm2 V-1 s-1). In addition, TMDs have the optical characteristic of tuning bandgap from direct to indirect with increasing their layers. Even though photoresponsivity of multilayer MoS2 phototransistor due to its nature of indirect bandgap is lower than that of single layer MoS2, multilayer MoS2 has higher density-of-state and wider spectral response than single layer MoS2. In order to enhance photoresponsivity of multilayer MoS2 phototransistor, we suggest the phototransistor with local bottom gate structure (LBGS), where the bottom gate length of the device is shorter than the channel length. The underlap regions of between gate and channel work like the series resistance in dark state due to ineffective gate modulation at the region. To demonstrate the enhancement of phototransistor performance using LBGS, we previously studied amorphous silicon TFT with LBGS. The photosensitivity enhancement up to 64 times as compared to the conventional a-Si TFT. And then, we used multilayer MoS2 as a channel material to constitute phototransistor with LBGS. The giant photoreponsivity of 342.6 AW-1 at 2 mW cm-1 shows three orders of magnitude larger than that of global gate multilayer MoS2 TFTs. This result of our experiment and simulation reveals that multilayer MoS2 phototransistor with local bottom gate can be used as various photosensing devices.

Current and efficiency improvement for a GaAsP/SiGe on Si tandem solar cell device achieved by light trapping techniques

A GaAsP/SiGe tandem solar cell on Si substrate has been further fabricated using light trapping techniques, such as texturing and adding a back surface reflector, and thinning the Si substrate. This is of importance to increase the Jsc of the Si0.18Ge0.82 bottom cell in this tandem system since bottom cell is current limiting. The Jsc of the bottom cell has been increased by relative 7.4%. This current improvement leads to a predicted efficiency of near 21% for this tandem device, with an absolute efficiency improvement of 0.3% over previous results without light trapping processes. The current of the bottom cell can be further improved by optimizing the bottom cell structure and texturing process, further thinning the Si substrate and increasing Ge concentration. (© 2016 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)

A study on the high temperature-dependence of the electrical properties in a solution-deposited zinc-tin-oxide thin-film transistor operated in the saturation region

We investigate the effects of high temperatures in the range of 292 − 393 K on the electrical properties of solution-processed amorphous zinc-tin-oxide (a-ZTO) thin-film transistors (TFTs) operated in the saturation region. The fabricated a-ZTO TFTs have a non-patterned bottom gate and top contact structure, and they use a heavily-doped Si wafer and SiO2 as a gate electrode and a gate insulator layer, respectively. In a-ZTO TFTs, the trap release energy (E TR ) was deduced by using Maxwell-Boltzmann statistics. The decreasing E TR toward zero with increasing gate voltage (the density of trap states (n s )) in the a-ZTO active layer can be attributed to a shift of the Fermi level toward the mobility edge with increasing gate voltage. The TFTs with low gate voltage (low n s ) exhibit multiple trap and release characteristics and show thermally-activated behavior. In TFTs with a high gate voltage (high n s ), however, we observe decreasing mobility and conductivity with increasing temperature at temperatures ranging from 303 to 363 K. This confirms that the E TR can drop to zero, indicating a shift of the Fermi level beyond the mobility edge. Hence, the mobility edge is detected at the cusp between thermally-activated transport and band transport.

Novel LTPS technology for large substrate

We developed partial laser anneal silicon (PLAS) thin‐film transistor (TFT) of novel low‐temperature polycrystalline‐silicon (LTPS) technology, which had the mobility of 28.1 cm2/Vs lager than that of mass produced oxide TFT and photo‐stability comparable with that of LTPS TFT in bottom gate structure. This innovative technology enables the conversion from an α‐Si TFT to a high‐mobility TFT most easily and inexpensively. Moreover, there is no limit of substrate size, such as Gen10 and more. Photo‐stability of PLAS will be suitable to organic light‐emitting diode backplane, high‐dynamic range TV, and outdoor IDP.

Spatiotemporal processes that contribute to hydrologic exchange between hillslopes, valley bottoms, and streams

AbstractQuantifying how watershed structure influences the exchanges of water among component parts of a watershed, particularly the connection between uplands, valley bottoms, and in‐stream hydrologic exchange, remains a challenge. However, this understanding is critical for ascertaining the source areas and temporal contributions of water and associated biogeochemical constituents in streams. We used dilution gauging, mass recovery, and recording discharge stations to characterize streamflow dynamics across 52 reaches, from peak snowmelt to base flow, in the Tenderfoot Creek Experimental forest, Montana, USA. We found that watershed‐contributing area was only a significant predictor of net changes in streamflow at high moisture states and larger spatial scales. However, at the scale of individual stream reaches, the lateral contributing area in conjunction with underlying lithology and vegetation densities were significant predictors of gross hydrologic gains to the stream. Reach lateral contributing areas underlain by more permeable sandstone yielded less water across flow states relative to those with granite gneiss. Additionally, increases in the frequency of steps across each stream reach contributed to greater hydrologic gross losses. Together, gross gains and losses of water along individual reaches resulted in net changes of discharge that cumulatively scale to the observed outlet discharge dynamics. Our results provide a framework for understanding how hillslope topography, geology, vegetation, and valley bottom structure contribute to the exchange of water and cumulative increases of stream flow across watersheds of increasing size.

비대칭 DGMOSFET의 상하단 산화막 두께비에 따른 터널링 전류 분석

ABSTRACT This paper analyzes the deviation of tunneling current for the ratio of top and bottom gate oxide thickness of short channel asymmetric double gate(DG) MOSFET. The ratio of tunneling current for off current significantly increases if channel length reduces to 5 nm. This short channel effect occurs for asymmetric DGMOSFET having different top and bottom gate oxide structure. The ratio of tunneling current in off current with parameters of channel length and thickness, doping concentration, and top/bottom gate voltages is calculated in this study, and the influence of tunneling current to occur in short channel is investigated. The analytical potential distribution is obtained using Poisson equation and tunneling current using WKB(Wentzel-Kramers-Brillouin). As a result, tunneling current is greatly changed for the ratio of top and bottom gate oxide thickness in short channel asymmetric DGMOSFET, specially according to channel length, channel thickness, doping concentration, and top/bottom gate voltages.

67-1: Novel LTPS Technology for Large Substrate

We developed Partial Laser Anneal Silicon (PLAS) TFT of novel LTPS technology for large substrate, which had the mobility of 28.1 cm2/Vs in bottom gate structure. Moreover there is no limit of substrate size, such as Gen10 and more. This innovative technology can enable the conversion from an α-Si TFT to a high mobility TFT most easily and inexpensively. Photo-stability of PLAS will be suitable to OLED backplane, HDR TV, and outdoor IDP.

Study of storage losses, price realized and comparative profitability of the storage methods of onion in Ahmednagar district of Maharashtra

Onion is one of the important vegetable/ spice crop. In view of global economic scenario, India is the second largest producer of onion in the world next only to China and accounts for 16 per cent of the world area and 12 per cent of the total production of onion in the world. An attempt has been made in this study to find out the economics of storage and profitability of storage methods. In all, 96 onion growers, 32 each of small, medium and large size groups were randomly selected from Shevgaon and Pathardi tehsils of Ahmednagar district. The data pertained to the reference year 2011-2012. Percentage of loss during storage period of onion was more in traditional type storage structure as compared to improved or bottom ventilated storage structure. Storage cost of onion was also more for the traditional type storage structures particularly due to high storages losses. Per quintal net price realized was more for stored onion as compared to unstored onion in all the market. Storage cost of onion was also more for the traditional type storage structures particularly due to high storages losses. Per quintal net price realized was more for stored onion as compared to unstored onion in all the market. In study area there were four onion storage structures and considering all, improved type of storage structure was most adopted by the farmers because it is well ventilated with less storage losses.

Electrical properties of field-effect transistor with interlinked ZnO tetrapod network as an active layer

In this work, we have investigated the thin film based field-effect transistor (FET) with interlinked ZnO tetrapod network (ITN-ZnO) used as an active channel layer. The ITN-ZnOs were synthesized by microwave assisted thermal oxidation technique. A ZnO FET with bottom gate structure was fabricated and investigated in terms of electrical properties. X-ray diffraction pattern revealed the wurtzite hexagonal structure of the ITN-ZnO. A drain current on/off ratio of 104, the off-state current as low as 10 nA, the threshold voltage of 10 V, field effect mobility of 7.939 cm2/Vs and sub-threshold swing of 1.4 V/decade were obtained. These results suggested that ITN-ZnO could be applied for FET, which could be operated in an enhancement mode.

Transparent InP Quantum Dot Light‐Emitting Diodes with ZrO2 Electron Transport Layer and Indium Zinc Oxide Top Electrode

Because of outstanding optical properties and non‐vacuum solution processability of colloidal quantum dot (QD) semiconductors, many researchers have developed various light emitting diodes (LEDs) using QD materials. Until now, the Cd‐based QD‐LEDs have shown excellent properties, but the eco‐friendly QD semiconductors have attracted many attentions due to the environmental regulation. And, since there are many issues about the reliability of conventional QD‐LEDs with organic charge transport layers, a stable charge transport layer in various conditions must be developed for this reason. This study proposes the organic/inorganic hybrid QD‐LEDs with Cd‐free InP QDs as light emitting layer and inorganic ZrO2 nanoparticles as electron transport layer. The QD‐LED with bottom emission structure shows the luminescence of 530 cd m−2 and the current efficiency of 1 cd/A. To realize the transparent QD‐LED display, the two‐step sputtering process of indium zinc oxide (IZO) top electrode is applied to the devices and this study could fabricate the transparent QD‐LED device with the transmittance of more than 74% for whole device array. And when the IZO top electrode with high work‐function is applied to top transparent anode, the device could maintain the current efficiency within the driving voltage range without well‐known roll‐off phenomenon in QD‐LED devices.

Analog-to-digital converter with oxide thin-film transistors

ABSTRACTA three-bit flash analog-to-digital converter (ADC) consisting of inverter-based comparators and logic gates using amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) was developed. The TFT has a bottom gate structure with a methyl-siloxane-based organic spin-on-glass passivation layer, which reduces the plasma damage on the active layer. A bootstrapped logic gate structure was used in the proposed ADC to overcome the reduced output swing in the inverters and the NAND gates caused by using only n-type a-IGZO TFTs. The output signals of the developed three-bit flash ADC with a-IGZO TFTs well matched the analog inputs. The output voltage swing was 0.2–3.6 V, well matching the simulation result. The three-bit flash ADC was verified up to the 1 kHz operation frequency, and thus can be used in sensor applications such as the wearable sensor display and the integrated biosensing platform.