Bottom-gate Organic Thin-film Transistors Research Articles

(Digital Presentation) Effect of Active Layer Thickness on Organic Thin-Film Transistors

ABSTRACT: Thin-Film Transistors (TFTs) are a substantial technological advancement in recent decades for various applications. The source/drain electrode layer and organic active layer thicknesses of Organic Thin-Film Transistors (OTFTs) should be optimized for better device performance. Organic electronics have been used for a wide range of applications, including flexible screens, smart digital devices, and photovoltaic cells, because of their flexibility and environmental sensitivity. The OTFT has the capability to match the efficiency of thin-film amorphous Silicon transistors, while also being companionable with low-temperature solution/printing-processed fabrication on flexible coupling substrates. The OTFTs are a valuable tool for determining unipolar carrier transport parameters in various situations.In this present research work, authors have utilized the concept of OTFTs in the assessment of bipolar transport properties in active layer blends. It offers a strategy to improve the precision of the assessment. Thereafter, in this this research work, impacts of active layer thickness on physical parameters of OTFT device performance have been realized. The 2D numerical device simulators have been used to examine the proposed OTFT structures. The discussion focuses on the various characteristics and parameters of OTFTs. The OTFTs are transistors that manage electric current flow using organic semiconductors as an active layer. The output and transfer characteristics of various OTFT structures have been used to calculate the performance characteristics of OTFTs. Optimizing the OTFT's organic active layer thickness is critical for high device performance. Both photo-current and photo-responsivity exhibit the same variation trend with increasing organic active layer thicknesses, increasing rapidly for a while and then tending to saturate at high values. The research findings demonstrate the impact of these parameters on device performance and temperature and the need to optimize these variables in the device. The carrier mobility of the high-performance P3HT: PCBM-based OTFT structure was approximately 10 cm2/Vs, and an ON/OFF current ratio of ~103. These results are compatible with those OTFTs fabricated previously. Research Methodology, Results, and Discussions A schematic structure is shown in Figure 1(a) proposed structure top view, and 1(b) a side view of the proposed structure used for simulation. Top-gate OTFT and bottom-gate OTFT geometrical structures have been used in this OTFT. The device's contact resistance, field mobility, and threshold voltage degrade subjected to bias stress. Since top-gate OTFT has a higher device degradation, the authors used bottom-gate OTFT. Due to the distinct properties here in this work the authors utilized conventional materials such as a blend of poly(3-hexylthiophene) (P3HT) and [6,6]-phenyl C61-butyric acid methyl ester (PCBM) as the active layer. A P3HT: PCBM mix is simulated with an electronic device simulator and analyses the variation in active layer thickness that affects the device's performance and the factors that influence the performance of the device in this research work. The output and transfer characteristics of OTFTs have been realized using proper boundary conditions and OTFT physics. The proposed OTFT structures' output and transfer characteristics have been evaluated, and the simulated results show that the optimized structure's drain current (Id, max) is ~2.85 μA. The obtained results show that the device has good transfer and output characteristics at lower gate voltages. With increasing organic active layer thicknesses, both photo-current and photo-responsivity exhibit the same variation trend of increasing sharply at first and then tending to saturate at high values. Conclusion The simulation results examined the performance of devices built with bottom-gate OTFTs. A detailed analysis of the influence of active layer thickness on the OTFT configuration was realized. The device has the advantage of operating at a lower gate voltage, transforming it into a gate efficient control device. The operation at a lower voltage improves electrical stability. The electric field of the OTFT is 1.4x106 V/cm is obtained. The ON/OFF current ratio is higher. The outcomes of this analysis have been optimized and extracted after being tested in various contexts. The findings demonstrated that the suggested concept might be used to make rollable active-matrix displays, nonvolatile memory, sensors, and printed electronic devices. This work also reduces the SCEs and shows more efficient performance than traditional MOSFETs. Together with all application areas, the most important research area has been argued to be the simple manufacturing technique of OTFT with low production cost and non-breakable impacts that can be bent and folded. This device will be optimized with fabrication using these materials in the future, and thereafter, its characteristic will be verified with the simulated results. Figure 1

Organic Thin-Film Transistors with a Bottom Bilayer Gate Dielectric Having a Low Operating Voltage and High Operational Stability

This study reports on p-channel bottom-gate organic thin-film transistors (OTFTs) that achieve low-voltage operation with a thin bilayer gate dielectric of CYTOP/HfO2 that also leads to high operat...

Laser printed organic semiconductor PQT-12 for bottom-gate organic thin-film transistors: Fabrication and characterization

In this work, we report on the effect of laser printed Poly (3,3‴-didodecyl quarter thiophene) on its optical, structural and electrical properties for bottom-gate/bottom-contact organic thin-film transistors applications. This semiconducting π-conjugated polymer was solution-deposited (spin-coated) on a donor substrate and transferred by means of solid phase laser-induced forward transfer (LIFT) technique on SiO2/Si receiver substrates to form the active material. This article presents a detailed study of the electrical properties of the fabricated transistors by measuring the parasitic resistances for gold (Au) and platinum (Pt) as source-drain electrodes, for optimizing OTFTs in terms of contacts. In addition, X-ray diffraction patterns revealed that it is possible to control the polymer microstructure through the choice of solvent. Also, no significant change in polymer chain orientation was observed between two printed patterns at 90 and 130mJ/cm2 as confirmed by Raman spectra. The results demonstrate hole mobility values of (2.6±1.3)×10−2cm2/Vs, and lower parasitic resistance for dielectric surface roughness around 1.2nm and Pt electrodes. Higher performances are correlated to i) the well-ordering of PQT-12 surface when a high-boiling-point solvent is used and ii) the less limitating Pt source/drain electrodes. This analytical study proves that solid phase LIFT printing is a reliable technology for the fabrication of thin, organic large area electronics in a well-defined manner.

High voltage surface potential measurements in ambient conditions: Application to organic thin-film transistor injection and transport characterization

A scanning surface potential measurement technique suited for thin-film devices operating under high voltages is reported. A commercial atomic force microscope has been customized to enable a feedback-controlled and secure surface potential measurement based on phase-shift detection under ambient conditions. Measurements of the local potential profile along the channel of bottom-gate organic thin-film transistors (TFTs) are shown to be useful to disentangle the contributions from the channel and contacts to the device performance. Intrinsic contact current-voltage characteristics have been measured on bottom-gate, top-contact (staggered) TFTs based on the small-molecule semiconductor dinaphtho[2,3-b:2′,3-f]thieno[3,2-b]thiophene (DNTT) and on bottom-gate, bottom-contact (coplanar) TFTs based on the semiconducting polymer polytriarylamine (PTAA). Injection has been found to be linear in the staggered DNTT TFTs and nonlinear in the coplanar PTAA TFTs. In both types of TFT, the injection efficiency has been found to improve with increasing gate bias in the accumulation regime. Contact resistances as low as 130 Ω cm have been measured in the DNTT TFTs. A method that eliminates the influence of bias-stress-induced threshold-voltage shifts when measuring the local charge-carrier mobility in the channel is also introduced, and intrinsic channel mobilities of 1.5 cm2 V−1 s−1 and 1.1 × 10−3 cm2 V−1 s−1 have been determined for DNTT and PTAA. In both semiconductors, the mobility has been found to be constant with respect to the gate bias. Despite its simplicity, the Kelvin probe force microscopy method reported here provides robust and accurate surface potential measurements on thin-film devices under operation and thus paves the way towards more extensive studies of particular interest in emerging fields of solid-state electronics.

The correlation between gate dielectric, film growth, and charge transport in organic thin film transistors: the case of vacuum-sublimed tetracene thin films

The complex interplay of dielectric substrate properties, semiconducting film growth, crystal structure, texture, and charge carrier transport is investigated for the case of tetracene films deposited on different dielectrics (polystyrene, parylene C, polymethylmethacrylate, hexamethyldisilazane-treated SiO2, and untreated SiO2). The tetracene hole mobility, measured in the bottom-gate organic thin film transistor (OTFT) configuration, varies over more than one order of magnitude depending upon the dielectric layer used. Atomic force microscopy and synchrotron grazing incidence X-ray diffraction measurements, analyzed with the extended Rietveld method, were used to investigate the influence of film connectivity, crystalline phase, polymorphism, and texture on charge transport. The role of the surface polarity and the processing conditions of the gate dielectric layer are also discussed. Based on our results, we propose guidelines for the selection of a gate dielectric material favorable for charge transport in tetracene films.

Relation between injection barrier and contact resistance in top-contact organic thin-film transistors

We theoretically investigate the carrier injection into top-contact bottom-gate organic thin film transistors. By means of a two-dimensional drift–diffusion model, we explicitly consider thermionic and tunneling injection in combination with subsequent carrier transport into the device. Based on numerical simulations with this model, we determine the contact resistance as a function of the nominal hole injection barrier height and temperature. Depending on the barrier height or the operating temperature, we find three distinct injection regimes. Our work reveals that in all three regimes self-regulating processes exist due to which the influx of current is adjusted according to the needs of the channel at the given point of operation.We explain why the transmission/transfer line method (TLM) for the determination of the contact resistance, Rc, quantitatively fails for non-quasi-ohmic injection. Self-regulation links the contact resistance to the channel resistance and the contact resistance becomes dependent on the channel length. For larger channel lengths, Rc is underestimated by TLM; the method yields overestimated values for small channel devices.

32.2: Invited Paper: Printable Organic Thin Film Transistor Backplanes for Mass Produced Displays

AbstractWe demonstrate the co‐development of organic semiconductors, passive materials and formulations with process optimization to enable the manufacture of high performance Organic Thin Film Transistor (OTFT) arrays suitable for mass production of printable display backplanes. These materials can be printed or coated to fabricate top and bottom gate OTFT's with charge carrier mobility greater than amorphous silicon.

Core-Expanded Naphthalene Diimides Fused with Sulfur Heterocycles and End-Capped with Electron-Withdrawing Groups for Air-Stable Solution-Processed n-Channel Organic Thin Film Transistors

Four families of core-expanded naphthalene diimide (NDI) derivatives were designed and synthesized, namely, NDI-DTYM2 (1−7, of which 1 and 2 were previously reported), NDI-DTDCN2 (8 and 9), NDI-DTYCA2 (10 and 11), and NDI-DCT2 (12), where the NDI core fuses two 2-(1,3-dithiol-2-ylidene)malonitrile (DTYM) groups, two 1,4-dithiine-2,3-dicarbonitrile (DTDCN) groups, two alkyl 2-(1,3-dithiol-2-ylidene)cyanoacetate (DTYCA) groups, and two 2,3-dicyanothiophenes (DCT), respectively. The NDI cores of the present compounds bear the branched N-alkyl substituents with the carbon atom numbers from 12 to 24, which guarantees good material solubility. The solution-processed, bottom-gate organic thin film transistors based on new compounds 3−12 operate well in air with the electron mobility ranging from ∼10−6 to 0.26 cm2 V−1 s−1, depending on the nature of the branched N-alkyl substituent and the π-backbone structure.

All-solution-processed bottom-gate organic thin-film transistor with improved subthreshold behaviour using functionalized pentacene active layer

We report organic thin-film transistors (OTFTs) made by simple solution processes in an ambient air environment. Inkjet-printed silver electrodes were used for bottom-gate and bottom-contacted source/drain electrodes. A spin-coated cross-linked poly(4-vinylphenol) (PVP) and a spin-coated 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) were used as a gate dielectric layer and an active layer, respectively. A high-boiling-point solvent was used for TIPS-pentacene and the resulting film showed stem-like morphology. X-ray diffraction (XRD) measurement showed the spin-coated active layer was well crystallized, showing the (0 0 1) plane. The reasonable mobility, on/off ratio and threshold voltage of the fabricated device, which are comparable to those of the previously reported TIPS-pentacene OTFT with gold electrodes, show that the printed silver electrodes worked successfully as gate and source/drain electrodes. Furthermore, the device showed a subthreshold slope of 0.61 V/dec in the linear region (VDS = −5 V), which is the lowest value for spin-coated TIPS-pentacene TFT ever reported, and much lower than that of the thermally evaporated pentacene OTFTs. It is thought that the surface energy of the PVP dielectric layer is well matched with that of a well-ordered TIPS-pentacene (0 0 1) surface when a high-boiling-point solvent and a low-temperature drying process are used, thereby making good interface properties, and showing higher performances than those for pentacene TFT with the same structure.

Bottom gate organic thin-film transistors fabricated by ultraviolet transfer embossing with improved device performance

Ultraviolet transfer embossing is optimized to fabricate bottom gate organic thin-film transistors (OTFTs) on flexible plastic substrates, achieving significant improved device performance ( μ = 0.01–0.02cm 2/Vs; on/off ratio = 10 4) compared with the top gate OTFTs made previously by the same method ( μ = 0.001–0.002 cm 2/Vs; on/off ratio = 10 2). The performance improvement can be ascribed to the reduced roughness of the dielectric-semiconductor interface ( R rms = 0.852 nm) and thermally cross-linked PVP dielectric which leads to reduced gate leakage current and transistor off current in the bottom-gated configuration. This technique brings an alternative great opportunity to the high-volume production of economic printable large-area OTFT-based flexible electronics and sensors.

Top Contact Organic Thin Film Transistors with Ink Jet Printed Metal Electrodes

Ink jet printing conductive metal nanopastes have been studied in research on printed circuit boards and passive components. This technique provides a manufacturing method that can replace more expensive processes, such as lithography or metal evaporation. In this paper, we demonstrated a printed silver top-contact source-drain electrodes on bottom-gate organic thin film transistors (OTFTs). The soluble conjugated polymer, regioregular poly(3-hexylthiophene) (RR-P3HT), was used as the active channel material. To increase electric transport efficiency by tuning the surface hydrophibic characteristics, a buffer layer, V2O5, between organic semiconductor and printed electrodes, was introduced to resolve the incompatibility of these two layers. The results indicated the printed Ag on V2O5 film is hydrophilic (contact angle ∼10°), different with that on P3HT only (hydrophibic, contact angle about 65°). High hydrophilic surface of V2O5 led to self-aligning behavior of patterned Ag nanopastes and is helpful to get a flat film. This study also compares the characteristics of OTFTs to traditionally evaporated electrodes and to ink jet printed source-drain electrodes, in order to analyze the mechanism action of the buffer layer and its related process differences.