This special issue consists of the expanded version of three papers in the area of Analog Integrated Circuits and Signal Processing presented at the 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS), held at Boise, ID, from the 5th to the 8th of August, 2012. The major areas of Circuits and Systems covered by MWSCAS 2012, drew 368 submissions from 40 countries spanning the globe; 313 contributions were selected for presentations. Among the published contributions in the IEEE MWSCAS 2012 proceedings, a pre-selection of 10 papers has been completed and corresponding authors were invited for contributions to this special issue. After the assessment of at least two independent reviewers, three manuscripts have been accepted for publication. It is evident that selecting only three papers out of several hundreds of MWSCAS presentations is a difficult and critical task. We are aware that we probably missed several excellent contributions, but we do know that we did our best to put together this special issue in a timely manner. The guest editors wish to thank Professor Mohammed Ismail, Editor-in-Chief of Analog Integrated Circuits and Signal Processing Journal for giving us this opportunity, Nader Rafla, General Chair of MWSCAS 2012, and Mohamad Sawan and Jose de la Rosa, Technical Program Co-Chairs of MWSCAS 2012 for their unequivocal support. We also gratefully acknowledge all of the reviewers for their assistance and Springer personnel for the competent and efficient support provided while putting together this special issue. The three selected papers reflect continuing trends towards higher levels of integrated analog circuits and systems. The first paper, ‘‘A 2.488-11.2 Gb/s SerDes in 40 nm LowLeakage CMOS with Multi-Protocol Compatibility for FPGA Applications,’’ by Socrates Vamvakos, Claude R. Gauthier, Chethan Rao, Alvin Wang, Karthisha Ramoshan Canagasaby, Khaldoon Abugharbieh, Prashant Choudhary, Sanjay Dabral, Shaishav Desai, Mahmudul Hassan, K. C. Hsieh, Bendik Kleveland, Gurupada Mandal, Richard Rouse, Ritesh Saraf, Jason Yeung, and Ying Cao presents a multi-protocol, next generation SerDes design. This paper authored by teams from MoSys Inc., Santa Clara, CA and Xilinx Inc., San Jose, CA received theMWSCAS 2012 Myril B. Reed Best Paper Award. The second paper, ‘‘A 1 GS/s, 31 MHz BW, 76.3 dB Dynamic Range, 34 mW CT-Delta-Sigma ADC with 1.5 Cycle Quantizer Delay and Improved STF,’’ by Sakkarapani Balagopal, Kehan Zhu and Vishal Saxena of Boise State University, Boise, ID details the implementation of a high-performance continuous-time delta-sigma modulator with improved signal transfer function (STF). This paper was one among the ten papers presented at the MWSCAS 2012 Student Paper Contest. The third paper, ‘‘Fully Integrated 1.2-lA and 13-lA Quiescent Current LDOs with Improved Transient Response,’’ by Harish Valapala and Paul M. Furth of New Mexico State University, Las Cruces, NM details the implementation of two extremely low quiescent current, low-dropout (LDO) voltage regulators. Both LDO designs are fully integrated, stabilized with an on-chip capacitive load of 100 pF. We thank all the authors who contributed to this issue; the issue wouldn’t be possible without their research and A. Garimella (&) Intel Corporation, USA e-mail: garimella@ieee.org
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