Endurance is investigated on one transistor floating body RAM cells processed on a silicon-on-insulator substrate with ultrathin buried oxide, and programmed using the bipolar junction transistor current inherent in MOSFETs. During the hole generation step, defects are generated close to the drain. These defects not only reduce the retention time but also result in a lower hole generation rate as a function of the number of cycles, which leads to a write 1 failure. We have shown that standard junction devices with a lightly doped drain (LDD) region are more enduring than extensionless devices with the LDD left undoped. This is owing to the poor spacer oxide on top of the extensionless region where holes are generated.