Block Synchronization Research Articles

Analysis of cell-cycle-specific gene expression in human cells as determined by microarrays and double-thymidine block synchronization.

Microarray analysis of gene expression patterns for thousands of human genes has led to the proposal that a large number of genes are expressed in a cell-cycle-specific manner. The identification of cyclically expressed genes was based on Affymetrix microarray analysis of gene expression after double-thymidine block synchronization. A statistical reanalysis of the original data leads to three principal findings. (i) Randomized data exhibit periodic patterns of similar or greater strength than the experimental data. This finding suggests that all apparent cyclicities in the expression measurements may arise from chance fluctuations. (ii) The presence of cyclicity and the timing of peak cyclicity in a given gene are not reproduced in two replicate experiments. This fact suggests there is an uncontrolled source of experimental variation that is stronger than the innate variation of gene expression in cells over time. (iii) The amplitude of peak expression in the second cycle is not consistently smaller than the corresponding amplitude in the first cycle. This finding places doubt on the assumption that the cells are actually synchronized. We propose that the microarray results do not support the proposal that there are numerous cell-cycle-specifically expressed genes in human cells.

Performance analysis of a deterministic channel estimator for block transmission systems with null guard intervals

A deterministic algorithm was proposed for channel identification in block communication systems. The method assumed that the channel has a finite impulse response (FIR) and that null guard intervals of length greater than the channel order are inserted between successive blocks to prevent interblock interference and allow block synchronization. In the absence of noise, the algorithm provides error-free channel estimates, using a finite number of received data, without requiring training sequences and without imposing a restriction neither on the channel, except for finite order and time invariance, nor on the symbol constellation. Using small perturbation analysis, we derive approximate expressions of the estimated channel covariance matrix, which are used to quantify the resilience of the estimation algorithm to additive noise and channel fluctuations. Specifically, we consider channel fluctuations induced by transmitter/receiver relative motion, asynchronism, and oscillators' phase noise. We also compare the channel estimation accuracy with the Cramer-Rao bound (CRB) and prove that our estimation method is statistically efficient at practical SNR values for any data block length. Finally, we validate our theoretical analysis with simulations and compare our transmission scheme with an alternative system using training sequences for channel estimation.

PC-based receiver for Eureka-147 digital audio broadcasting

We present the design and implementation for a Eureka-147 digital audio broadcasting (DAB) receiver. We establish the specifications for the receiver and design the blocks required for DAB reception. Due to the fact that orthogonal frequency division multiplexing (OFDM) is the transmission technique used in the DAB system, the synchronization block plays a key role in the overall system performance among the receiving blocks in the DAB receiver, and for this reason we describe it in detail here. We also include descriptions of several implementation techniques that enable the receiver to run in real-time on a PC. Our findings show that the receiver implemented as described here satisfactorily meets our predetermined specifications.

Error-resilient zero-tree wavelet image coding technique over noisy channels

A zero-tree wavelet image coding technique with resiliency to transmission errors that typically occur on noisy channels is proposed. Key tools employed consist of the bit partitioning algorithm, and the bit reorganization algorithm, which is called the error resilient entropy code (EREC). To take full advantage of the bit reorganization algorithm, the bit partitioning algorithm divides the data into separate code blocks, although the zero-tree wavelet coding algorithm is not a block-based compression method. The bit reorganization algorithm requires a very low redundancy for the sequential transmission of variable length blocks, offering a virtually guaranteed code and block synchronization. The wavelet transform and the wavelet packet transform are used. Simulation results verify the error resiliency of the proposed algorithm for image coding. The experimental data show that the proposed coders outperform the existing error resilient coders over both noise-free channels and noisy channels. In addition, it is confirmed that the proposed algorithm is more error resilient than previously reported error-resilient coders for various channel error conditions.

Designing and Evaluating a Cost-Effective Optical Network for Multiprocessors

In this paper we propose the OPTNET, a novel optical network and associated coherence protocol for scalable multiprocessors. The network divides its channels into broadcast and point-to-point groups. The broadcast channels are used for memory block request, coherence, and synchronization transactions, while the point-to-point channels are utilized for memory block transfer operations. The three main distinguishing features of the OPTNET are: (a) its broadcast channels behave well under high contention; (b) its point-to-point channels do not require any access control mechanism; and (c) it can achieve good communication performance at a low hardware cost. We use detailed execution-driven simulations of ten applications to evaluate a 16-node OPTNET-based multiprocessor. We compare our multiprocessor against highly efficient systems based on the DMON and LambdaNet optical interconnects. Our results demonstrate that our system outperforms the DMON multiprocessors consistently for our applications, even though the OPTNET requires no more hardware than DMON. The comparison between our multiprocessor and the LambdaNet system shows performance differences that average 4% in favor of the LambdaNet. However, the LambdaNet requires a factor of p more hardware than the OPTNET, where p is the number of computational nodes in the multiprocessor. Based on these results and on our parameter space study, our main conclusion is that the combination of our network and coherence protocol strikes an excellent cost/performance ratio for scalable multiprocessors under most architectural assumptions.

Effective fine-grain synchronization for automatically parallelized programs using optimistic synchronization primitives

This article presents our experience using optimistic synchronization to implement fine-grain atomic operations in the context of a parallelizing compiler for irregular, object-based computations. Our experience shows that the synchronization requirements of these programs differ significantly from those of traditional parallel computations, which use loop nests to access dense matrices using affine access functions. In addition to coarse-grain barrier synchronization, our irregular computations require synchronization primitives that support efficient fine-grain atomic operations. The standard implementation mechanism for atomic operations uses mutual exclusion locks. But the overhead of acquiring and releasing locks can reduce the performance. Locks can also consume significant amounts of memory. Optimistic synchronization primitives such as loud-linked/store conditional are an attractive alternative. They require no additional memory and eliminate the use of heavyweight blocking synchronization constructs. We evaluate the effectiveness of optimistic synchronization by comparing experimental results from two versions of a parallelizing compiler for irregular, object-based computations. One version generates code that uses mutual exclusion locks to make operations execute atomically. The other version generates code that uses mutual exclusion locks to make operations execute atomically. The other version uses optimistic synchronization. We used this compiler to automatically parallelize three irregular, object-based benchmark applications of interest to the scientific and engineering computation community. The presented experimental results indicate that the use of optimistic synchronization in this context can significantly reduce the memory consumption and improve the overall performance.

Redundant filterbank precoders and equalizers. II. Blind channel estimation, synchronization, and direct equalization

For pt.I see ibid., vol.47, no.7, p.1988-2006 (1999). Transmitter redundancy introduced using finite impulse response (FIR) filterbank precoders offers a unifying framework for single- and multiuser transmissions. With minimal rate reduction, FIR filterbank transmitters with trailing zeros allow for perfect (in the absence of noise) equalization of FIR channels with FIR zero-forcing equalizer filterbanks, irrespective of the input color and the channel zero locations. Exploiting this simple form of redundancy, blind channel estimators, block synchronizers, and direct self-recovering equalizing filterbanks are derived in this paper. The resulting algorithms are computationally simple, require small data sizes, can be implemented online, and remain consistent (after appropriate modifications), even at low SNR colored noise. Simulations illustrate applications to blind equalization of downlink CDMA transmissions, multicarrier modulations through channels with deep fades, and superior performance relative to CMA and existing output diversity techniques relying on multiple antennas and fractional sampling.

Synchronisation techniques for a CCMA system using neural nets

A new synchronisation technique for a T out of N-user multiple access adder channel (MAC) with binary inputs is described. The application of artificial neural networks at the decoder is considered as a fast and robust technique for filtering, sorting, shifting and decision making upon the incoming MAC data. An efficient decoding technique is introduced for the extraction of block synchronisation information, thus helping to reconstruct the original signals accurately.

A Model Based Approach to the Supervisory Control of FMS

A model based approach to the supervisory control of FMS is presented in the paper. The proposed model comprises both the structural and the behavioural specification of the manufacturing system. The statecharts visual formalism is proposed for the structural specification, and temporal logic operators are proposed for the behavioural specification. The behavioural specification is translated into the statecharts syntax as the guarded constraints on the transition firing. The closed-loop control consists of monitoring module, controller module, synchronization block, and mentioned model of the system. The control decisions of the controller module are given according to the nominal path, and the actual state configuration of the model.

S and G2 phase histone biosynthesis of HEp-2 cells after the influence of the bisalkylating agent, chlorambucil.

Chlorambucil was previously found to be a specific inhibitor of total histone synthesis without affecting total cellular protein synthesis. In this study, we used S and G2 phase HEp-2 cancer cells to further analyze and specifically localize this effect. One hour (S phase), 4 hours (S phase) and 9 hours (G2 phase) after release from an aphidicolin double block synchronization procedure, cells were preincubated for 60 min with 30 microM chlorambucil and then radiolabeled for another 60 min in the continued presence of the agent. At the end of each of these time intervals, cells in almost mid-S phase, late S phase and toward the end of the G2 phase were obtained for analysis. It was found that chlorambucil partially inhibits total histone synthesis nonspecifically as to the variants being synthesized (S phase and basal variants) but only during the first half of the S phase. DNA synthesis is also inhibited partially, but during the second half of the S phase. The position during the S phase where chlorambucil exerts its effect on total histone synthesis, the degree of this effect and its uncoupling with DNA synthesis inhibition, indicate that it is temporally linked with the onset of S phase histone transcription and not with DNA synthesis initiation as occurs with agents, such as hydroxyurea.

Effective fine-grain synchronization for automatically parallelized programs using optimistic synchronization primitives

As shared-memory multiprocessors become the dominant commodity source of computation, parallelizing compilers must support mainstream computations that manipulate irregular, pointer-based data structures such as lists, trees and graphs, Our experience with a parallelizing compiler for this class of applications shows that their synchronization requirements differ significantly from those of traditional parallel computations. Instead of coarse-grain barrier synchronization, irregular computations require synchronization primitives that support efficient fine-grain atomic operations.The standard implementation mechanism for atomic operations uses mutual exclusion locks. But the overhead of acquiring and releasing locks can reduce the performance. Locks can also consume significant amourtts of memory. Optimistic synchronization primitives such as load linked/stor conditional are an attractive alternative. They require no additional memory and eliminate the use of heavyweight blocking synchronization constructs.This paper presents our experience using optimistic synchronization to implement fine-grain atomic operations in the context of a parallelizing compiler for irregular object-based programs. We have implemented two versions of the compiler. One version generates code that uses mutual exclusion locks to make operations execute atomically. The other version uses optimistic synchronization. This paper presents the first published algorithm that enables compilers to automatically generate optimistically synchronized parallel code. The presented experimental results indicate that optimistic synchronization is clearly the superior choice for our set of applications. Our results show that it can significantly reduce the memory consumption and improve the overall performance.

Performance impact of run queue organization and synchronization on large-scale NUMA multiprocessor systems

Abstract The goal of this paper is to study the impact of run queue organization on the performance of synchronization methods in multiprocessor systems. Two run queue organizations are considered: distributed and hierarchical organizations. The performance impact of spinning and blocking synchronization methods on these two run queue organizations is studied. We use two canonical workload types that require task synchronization: lock accessing and barrier synchronization workloads. The results presented here show that, when fine grain synchronization is required, the distributed organization is better. However, for large granularity tasks, the performance of the distributed organization is unacceptable and the hierarchical organization should be used. Note that the distributed organization is embedded into the hierarchical organization. Thus, for coarse granularity parallel applications, the hierarchical organization with its load sharing feature can be used; for fine-granularity parallel applications, the hierarchy of queues can be circumvented and the round robin task assignment can be done on processor's local queues as in the distributed organization. Therefore, the hierarchical organization is useful in general-purpose large-scale shared-memory multiprocessors.

Ein anwendungsspezifischer Schaltkreis zum Senden und Empfang von Radio-Data-System(RDS)-Signalen

The Radio Data System (RDS) intends to improve functionality of FM receivers. Additional information - e. g. call sign, tuning frequency, alternative frequencies, time and date, traffic information, public or encrypted messages,... - can be transmitted during stereophonic or monophonic VHF/FM sound broadcasts. An ASIC is described which can receive or transmit RDS-data-patterns in a standalone or a microprocessor-based environment. Working as a transmitter or as a pattern-generator, the ASIC is able to encode and transmit RDS messages without any microprocessor support. A maximum sequence length of 64 kByte of data can be loaded from an external EPROM using on-chip direct memory access counters. Working as a receiver, the ASIC will detect block synchronisation, receive RDS data blocks and correct errors without any software overhead. A data block is checked and validated in less than five microseconds. An integrated FIR-filter detects valid block sequences immediately, even in the precence of random data which produces false synchronisation pulses on average five times per second. Last not least, due to its extended addressing capabilities, the ASIC can be used as a memory address expander when small single chip microprocessors with limited RAM will have to read and store RDS data during a longer perlod of time. Target technology is 0.8 μm CMOS, the ASIC utilizes the equivalent of 80 k MOS-Transistors.

Quantification of quality-of-presentations (QOPs) for multimedia synchronization schemes

Storing different numbers of media units in advance can guarantee different levels of synchronization qualities. That is, allocating some buffers at the receive client site can smooth intra/inter asynchrony anomalies, which are the side effects of delay jitters. Additionally, the commencement of a multimedia presentation can be smoothly invoked after a pre-defined number of media units has been stored in each medium stream's buffer. To maintain synchronization qualities, video streams can adopt the non-blocking or the restricted blocking synchronization scheme, and audio streams can adopt the blocking synchronization scheme. In this paper, we derive mathematical relationships among associated parameters such that Quality Of Presentations (QOPs), i.e., intra-medium and inter-media asynchrony anomalies, for live continuous multimedia presentations can be analyzed. Using the mathematical analysis, trade-offs between QOPs and networking/system resources can be identified.

HDTV picture quality performance in the presence of random errors, analysis and measures for improvement

We study the performance of the picture quality of HDTV in the presence of random errors and find the different kinds of picture impairments that may arise. The problems associated with picture coding, including variable length and Huffman coding, are investigated in great detail. The use of DC differential coding and the loss of block synchronization cause errors to perpetuate to other regions of the picture, and hence are identified as the major causes of poor performance. Motivated by these observations, two novel techniques which significantly improve the picture quality are proposed, analyzed and evaluated. The first technique is based upon encoding the actual values of the DC coefficients instead of the commonly used differential DC coding. This is done by means of a new set of Huffman codewords. It is shown that, contrary to present belief, by coding the actual DC values it is possible to maintain the high compression obtained by the commonly employed differential DC coding and at the same time significantly improve the noise resistance of the coding scheme. The second proposed technique introduces a simple but effective synchronization scheme which restricts the effects of residual errors to within 32 × 16 pixel superblocks thus improving the quality of the received picture. This synchronization area is much smaller than the 5632, 4024 and 3072 pixel areas proposed by the four HDTV proposals. Incorporation of the two techniques yields a scheme which has excellent noise performance characteristics and increases the overall noise resistance of the HDTV system. This scheme is applied to both reference frames and inter-frames and improves the SNR at which the HDTV picture suddenly deteriorates by 2.5–3 dB. After that the deterioration is more graceful, as the error propagation is limited to the superblock boundaries.

Intervallsynchronisation von zeitvarianter trelliscodierter 8/4-PSK. durch Auswertung zweier komplexer Momente 4. Ordnung des Empfangssignals

Article Intervallsynchronisation von zeitvarianter trelliscodierter 8/4-PSK. durch Auswertung zweier komplexer Momente 4. Ordnung des Empfangssignals was published on July 1, 1995 in the journal Frequenz (volume 49, issue 7-8).

Coding for both protection and synchronisation

The majority of the classical methods for synchronisation for digital communications systems require a hardware overhead and additional data added to the information stream to provide effective synchronisation. The paper discusses recent advances which offer alternatives to these existing methods. A novel synchronisation technique which utilises auxiliary information obtained from the soft maximum likelihood trellis decoding (SMLD) of the received signal, to obtain bit, symbol and block synchronisation, is described which combines the operations of the decoder, demodulator and synchronisation system.

A hybrid coding method for digital HDTV

Digitally transmitted video images suffer from sudden degradation in picture quality at high channel noise levels. This is due to the variable length coding and the large synchronization blocks used. To remedy that, we propose encoding the DCT coefficients by a hybrid fixed and variable length coding compression scheme. This method improves the compression ratio by approximately 20% and increases the system's resistance to channel errors. To fortify the transmitted bits against channel noise we then use a synchronization method which restricts the effects of an error to a 32/spl times/16 pixel picture block. The resulting combined scheme (1) significantly improves the error resistance characteristic of the system, (2) eliminates the abrupt picture degradation, and (3) does not alter the original data transmission rate.

Power spectrum of block-coded modulation

The power density spectrum of block-coded modulated signals is computed. Sufficient conditions for this spectrum to be the same as for uncoded modulation are derived. In the special case of a PSK-based-scheme, necessary conditions are derived in order to achieve spectrum shaping. The spectral lines obtained may be used for block synchronization. >

A noise resistant synchronization scheme for HDTV images

A method that increases the error resistance of the HDTV system and offers graceful picture degradation in the presence of bit errors, is presented. Due to the nature of the presently proposed compression schemes for HDTV systems, an error in a data bit does not only affect the block the bit belongs to, but unfortunately the effects of this error may perpetuate to the following blocks. This is because a bit error may cause loss of synchronization between the data bits and the picture blocks they represent. Our method restricts the effects of a bit error to a picture block whose size is significantly smaller than those used by the HDTV systems. We achieve synchronization by transmitting a header-word for each such synchronization block. Each header-word contains the number of data bits representing the compressed block. This header-word is protected by two levels of FEC code. To decrease the number of extra bits needed by the header-words, two different synchronization block sizes are used, a relatively small block size for the reference frames and a larger size for the inter-frames. The resulting method improves the quality of the picture in the presence of errors and defers the SNR at which the HDTV picture suddenly deteriorates by 2.5 to 3 dB. It also allows operation at higher order modulation transmission schemes, e.g., 32-QAM instead of 16-QAM, without the requirement of increased signal power.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>