Block Size Technique Research Articles

De-noising the image using DBST-LCM-CLAHE: A deep learning approach

Histogram Equalization (HE) is one of the most popular techniques for this purpose. Most histogram equalization techniques, including Contrast Limited Adaptive Histogram Equalization (CLAHE) and Local Contrast Modification CLAHE (LCM CLAHE), use a fixed block size technique for feature enhancement. Due to this, all these state of art techniques are used to give poor denoising performance after feature enhancement. In this paper, a deep learning based new approach, namely Dynamic Block Size Technique (DBST), is used to improve image denoising. In this approach, we use the Categorical Subjective Image Quality (CSIQ) image set, an image database generally used for preprocessing of images. The results obtained from experiments show better performance for different important parameters (used by state of art techniques). The work is novel in the preprocessing of images because in this work, we classify the image depending upon the image features for selecting appropriate block sizes dynamically during preprocessing. Proposed work outperforms in terms of PSNR, MSE, NRMSE, SSIM and SYNTROPY. The average respective values are 18.92, 863.86, 0.25, 0.81 and 19.35 and are better in comparison of CLAHE and LCM CLAHE.

A hybrid approach to find cloned objects in copy move forged images

In this paper, we have proposed a new hybrid approach to detect the cloned object in images. In copy-move forgery, images are forged by making the clone of objects of the same image within the image. In our proposed work, we have integrated two states of art techniques named adhoc method and principle component analysis (PCA) based scale invariant feature transform (SIFT) method. In two step process, we have preprocessed the object image by the proposed dynamic block size technique based local contrast modification and contrast limited adaptive histogram equalisation (DBST-LCM CLAHE) up to desired PSNR and grey level and then after integrated adhoc, and PCA based SIFT algorithm to design a hybrid approach. Proposed method tested over CoMoFoD image database. Proposed method shows the better performance in comparison of the state of art techniques regarding false positive rate (FPR), true positive rate(TPR), and PSNR.

Architecture and Circuit Optimization of Hardwired Integer Motion Estimation Engine for H.264/AVC

Variable block size motion estimation developed by the latest video coding standard H.264/AVC is the efficient approach to reduce the temporal redundancies. The intensive computational complexity coming from the variable block size technique makes the hardwired accelerator essential, for real-time applications. Propagate partial sums of absolute differences (Propagate Partial SAD) and SAD Tree hardwired engines outperform other counterparts, especially considering the impact of supporting variable block size technique. In this paper, the authors apply the architecture-level and the circuit-level approaches to improve the maximum operating frequency and reduce the hardware overhead of Propagate Partial SAD and SAD Tree, while other metrics, in terms of latency, memory bandwidth and hardware utilization, of the original architectures are maintained. Experiments demonstrate that by using the proposed approaches, at 110.8MHz operating frequency, compared with the original architectures, 14.7% and 18.0% gate count can be saved for Propagate Partial SAD and SAD Tree, respectively. With TSMC 0.18µm 1P6M CMOS technology, the proposed Propagate Partial SAD architecture achieves 231.6MHz operating frequency at a cost of 84.1k gates. Correspondingly, the maximum work frequency of the optimized SAD Tree architecture is improved to 204.8MHz, which is almost two times of the original one, while its hardware overhead is merely 88.5k-gate.

Novel image compression method using edge-oriented classifier and novel predictive noiseless coding method

A new image compression approach is proposed in which variable block size technique is adopted, using quadtree decomposition, for coding images at low bit rates. In the proposed approach, low-activity regions, which usually occupy large areas in an image, were coded with a larger block size and the block mean is used to represent each pixel in the block. To preserve edge integrity, the classified vector quantisation (CVQ) technique is used to code high-activity regions. A new edge-oriented classifier without employing any thresholds is proposed for edge classification. A novel predictive noiseless coding (NPNC) method which exploits the redundancy between neighbouring blocks is also presented to efficiently code the mean values of low-activity blocks and the addresses of edge blocks. The bit rates required for coding the mean values and addresses can be significantly reduced by the proposed NPNC method. Experimental results show that excellent reconstructed images and higher PSNR were obtained.