Encryption Mode Research Articles

Methods for implementing the Kuznyechik algorithm on FPGAs

Increased volumes and speed of data transmission over computer networks, and also the need to protect the transmitted data, require accordingly to increase the speed of cryptographic data processing. One of the ways to achieve high performance is implementation of FPGAs-based cryptographic equipment. Therewith, to cut the cost of equipment, it is important that encryption modules shall consume a minimum possible hardware resources. The work aims to find the most compact high-speed solution for FPGA-based Kuznyechik block cipher. Several methods for hardware implementation of linear transformation, which is used in Kuznyechik cipher, have been reviewed. Various aspects of implementation of these methods taking into account the architecture of target FPGAs are investigated. We also consider aspects of the FPGA implementation of nonlinear transformation, which is used in Kuznyechik block cipher. Resource consumption by various implemented solutions of linear transformation has been estimated. A relatively compact high-speed implemented solution of Kuznyechik block cipher has been obtained and tested on the real equipment. The achieved values of speed for iterative and fully pipelined implementations of the algorithm have been presented.

A High Result for Image Security Using Crypto-Stegano Based on ECB Mode and LSB Encryption

The development of the digital world in the field of information technology is so rapid that making the exchange of information easy and fast. Such information may be general or specific. In general information there is no problem for the public, but specific information can not be free in the public. The main problem of the specific information is security, how the information is safe. To overcome these problems can be solved using cryptography and steganography. Cryptography is a technique for securing secret information from uninvolved parties, which the outcome is much different from the original information. Steganography is a technique to secure or hide the secret information on a digital object such as sound, image, vidio that applied results as seen the original information. In this paper proposed a combination of ECB Mode cryptographic method and LSB steganographic method on a digital image. The measurement method are PSNR and MSE to determine the quality of the stego image. Our results are excellent for digital image encryption of RGB and Grayscale type since the resulting image looks like the original image, with the best stego-image proof with MSE is 0.00013, PSNR is 87.00141, SSIM is 1 shown as excellent result.

FACE: Fast AES CTR mode Encryption Techniques based on the Reuse of Repetitive Data

The Advanced Encryption Standard (AES) algorithm and Counter (CTR) mode are used for numerous services as an encryption technique that provides confidentiality. Even though the AES with counter (AES CTR) mode has an advantage in that it can process multiple data blocks in parallel, its implementation should also be observed to reduce the computational burden of current services.In this paper, we propose an implementation method called FACE that can improve the performance of the AES CTR mode. The proposed method is based on five caches of frequently occurring intermediate values, so that it reduces the number of unnecessary computations. Our method can be employed in any AES CTR implementation, regardless of the platform, environment, or implementation method. There are two known AES implementation techniques, namely, counter-mode caching and bitslicing. FACE extends counter-mode caching in order to optimize the previous result and to maximize the scope of caching. We show that FACE can be applied efficiently to various implementations (table-based, bitsliced, and AES-NI-based). In particular, this is the first attempt to combine our extended counter-mode caching with bitsliced implementations of AES, and is also the first to apply counter-mode caching up to the round transformations of AES-NI implementation. To prove the efficiency of our proposed method, we conduct a performance evaluation in various environments, which we then compare with the previous fastest results. Our bitsliced FACE needs 6.41 cycles/byte on an Intel Core 2, and AES-NI-based FACE records 0.44 cycles/byte on an Intel Core i7.

Cryptography Chaos Theory

The development of information society, which has led to an impressive increase in the volume of information, mainly economic, circulated in computer networks, accelerated the development and mostly the use of modern cryptography tools. In the last years, researchers have pointed out that there is a possible similarity between chaos and cryptography, many of the properties of chaotic dynamic systems having correlation among the cryptographic systems that are based on computational methods.
 Studies carried out on chaotic dynamic systems usage in digital crypto-systems have determined the occurrence of similar to classic techniques, but also of some specific techniques and methods that have been analyzed and evaluated. The attempts to develop new encryption ?lgorithms based on chaos theory have evolved gradually from simple solutions, which suppose the iteration of a din?mic system to obtain binary sequence used for text masking, to methods that imply coupled din?mic systems and hybrid techniques that would combine the chaos advantages with classical methods.
 In this article there are presented 3 encryption algorithms based on chaos theory: RC4, Fractal Encryption and Cellular Automata, implemented in a system of encryption and operation mode analysis for each algorithm separately.

LEO: Low Overhead Encryption ORAM for Non-Volatile Memories

Data confidentiality attacks utilizing memory access patterns threaten exposure of data in modern main memories. Oblivious RAM (ORAM) is an effective cryptographic primitive developed to thwart access-pattern-based attacks in DRAM-based systems. However, in emerging non-volatile memory (NVM) systems, the increased writes due to encryption of multiple data blocks on every Path ORAM (state-of-the-art efficient ORAM) access impose significant energy, lifetime, and performance overheads. LEO ( L ow overhead E ncryption O RAM ) is an efficient Path ORAM encryption architecture that addresses the high write overheads of ORAM integration in NVMs, while providing security equivalent to the baseline Path ORAM. LEO reduces NVM cell writes by securely decreasing the number of block encryptions during the write phase of a Path ORAM access. LEO uses a secure, two-level counter mode encryption framework that opportunistically eliminates re-encryption of unmodified blocks, reducing NVM writes. Our evaluations show that on average, LEO decreases NVM energy by 60 percent, improves lifetime by 1.51 $\times$ , and increases performance by 9 percent over the baseline Path ORAM.

ARSENAL: Architecture for Secure Non-Volatile Memories

Whereas data persistence in non-volatile memories (NVMs) enables instant data recovery (IDR) in the face of power/system failures, it also exposes NVMs to data confidentiality and integrity attacks. Counter mode encryption and Merkle Tree authentication are established measures to thwart data confidentiality and integrity attacks, respectively, in NVMs. However, these security mechanisms require high overhead atomic security meta-data updates on every write-back in order to support IDR in NVMs. This increases memory traffic and negatively impacts system performance and memory lifetime. Architecture for Secure Non-Volatile Memories (ARSENAL) is an IDR-preserving, low cost, high performance security solution that protects NVM systems against data confidentiality and integrity attacks. ARSENAL synergistically integrates (i) Smart Writes for Faster Transactions (SWIFT) , a novel technique to reduce the performance overhead of atomic security meta-data updates on every write-back, with (ii) Terminal BMT Updates (TBU) , a novel BMT-consistency-preserving technique, to facilitate IDR in the face of power/system failures. Our evaluations show that on average, ARSENAL improves system performance (measured in IPC) by 2.26 $\times$ (4 $\times$ ), reduces memory traffic overhead by 1.47 $\times$ (1.88 $\times$ ), and improves memory lifetime by 2 $\times$ (3.5 $\times$ ) in comparison to conventional IDR-preserving 64-bit (128-bit) encryption+authentication.

Beyond Conventional Security in Sponge-Based Authenticated Encryption Modes

The Sponge function is known to achieve 2^{c/2} security, where c is its capacity. This bound was carried over to its keyed variants, such as SpongeWrap, to achieve a min {2^{c/2},2^kappa } security bound, with kappa the key length. Similarly, many CAESAR competition submissions were designed to comply with the classical 2^{c/2} security bound. We show that Sponge-based constructions for authenticated encryption can achieve the significantly higher bound of min {2^{b/2},2^c,2^kappa }, with b>c the permutation size, by proving that the CAESAR submission NORX achieves this bound. The proof relies on rigorous computation of multi-collision probabilities, which may be of independent interest. We additionally derive a generic attack based on multi-collisions that matches the bound. We show how to apply the proof to five other Sponge-based CAESAR submissions: Ascon, CBEAM/STRIBOB, ICEPOLE, Keyak, and two out of the three PRIMATEs. A direct application of the result shows that the parameter choices of some of these submissions are overly conservative. Simple tweaks render the schemes considerably more efficient without sacrificing security. We finally consider the remaining one of the three PRIMATEs, APE, and derive a blockwise adaptive attack in the nonce-respecting setting with complexity 2^{c/2}, therewith demonstrating that the techniques cannot be applied to APE.

Investigation of cross-platform realizations of stream symmetric ciphers

Modern symmetric stream ciphers Enocoro, Decim, Grain, HC, MUGI, Mickey, Rabbit, RC-4, Salsa20, SNOW2.0, Sosemanuk, Strumok, Trivium, and a block cipher AES, which can be used in streaming encryption modes, are being researched. The main results of testing the rate of formation of a key stream with cross-platform implementation of encryption algorithms in the Java programming language on operating systems Windows 10 (x64), Debian (Kali) and Android (x64) are presented. Testing was conducted on the portable personal computer (Intel Pentium 3550m 2.3GHz, RAM 4GB (1600МHz)) and on the mobile device, in particular, on the smartphone (Samsung galaxy S7).

Efficient block cipher mode for NVM

The usage of non-volatile memory (NVM) storage devices is rapidly increasing in consumer and enterprise systems, providing high performance and low energy consumption compared to hard disk drives. Lately it is observed that NVM storage devices are widely used in cloud computing as well. However, existing disk encryption methods are designed for hard disk devices and an efficient block cipher mode of operation for NVM storage devices has not yet been studied in detail. In this work we have analyzed and evaluated performance of CBC, CTR and XTS-AES block cipher modes for whole disk encryption solutions and found that CTR and XTS-AES modes outperform CBC mode under the same scenarios.

Efficient beyond-birthday-bound secure authenticated encryption modes

Efficient beyond-birthday-bound secure authenticated encryption modes

A Survey on Confidential Cloud Data under Secure Key Exposure

Latest records display a effective attacker which breaks facts confidentiality with the resource of obtaining cryptographic keys, by using the usage of way of coercion or backdoors in cryptographic software program. As soon as the encryption secrets uncovered, the only possible diploma to maintain information confidentiality is to restrict the attacker’s access to the ciphertext. This can be finished, as an instance, with the resource of spreading ciphertext blocks in the course of servers in a couple of administrative domain names, therefore assuming that the adversary cannot compromise them all. However, if data is encrypted with present schemes, an adversary prepared with the encryption key, can nevertheless compromise an unmarried server and decrypt the ciphertext blocks saved therein. On this paper, we observe records confidentiality in opposition to an adversary which knows the encryption key and has get admission to a massive fraction of the ciphertext blocks. To this quit, we advise Bastion, a singular and green scheme that ensures data confidentiality notwithstanding the reality that the encryption secrets leaked and the adversary has access to nearly all ciphertext blocks. We analyze the security of Bastion, and we examine its standard overall performance via manner of a prototype implementation. We also talk realistic insights with admire to the combination of Bastion in business dispersed garage structures. Our evaluation results endorse that Bastion is well-applicable for integration in existing structures since it incurs less than 5% overhead compared to existing semantically relaxed encryption modes.

Development of field programmable gate array–based encryption module to mitigate man-in-the-middle attack for nuclear power plant data communication network

This article presents a security module based on a field programmable gate array (FPGA) to mitigate man-in-the-middle cyber attacks. Nowadays, the FPGA is considered to be the state of the art in nuclear power plants I&C systems due to its flexibility, reconfigurability, and maintainability of the FPGA technology; it also provides acceptable solutions for embedded computing applications that require cybersecurity. The proposed FPGA-based security module is developed to mitigate information-gathering attacks, which can be made by gaining physical access to the network, e.g., a man-in-the-middle attack, using a cryptographic process to ensure data confidentiality and integrity and prevent injecting malware or malicious data into the critical digital assets of a nuclear power plant data communication system. A model-based system engineering approach is applied. System requirements analysis and enhanced function flow block diagrams are created and simulated using CORE9 to compare the performance of the current and developed systems. Hardware description language code for encryption and serial communication is developed using Vivado Design Suite 2017.2 as a programming tool to run the system synthesis and implementation for performance simulation and design verification. Simple windows are developed using Java for physical testing and communication between a personal computer and the FPGA.

Separable authentication in encrypted HEVC video

A joint encryption and authentication scheme for HEVC compressed video is proposed in this work. It produces a HEVC format compliant video stream that permits the authentication process to be carried out irregardless of the video being in the encrypted or plaintext (i.e., decrypted) form. To achieve this separable property, one set of syntax elements within the HEVC standard is utilized to achieve authentication, while another set is exploited for encryption. Specifically, for authentication, information such as coding unit size in each video slice is utilized to generate the authentication code, which is then embedded into each video slice to detect the tampered regions. A two-level authentication method is implemented to facilitate the legitimacy verification process. On the other hand, for video encryption, syntax elements in the HEVC standard including Sign Bins, Transform Skip Bins and Suffix Bins are randomized to perceptually distort the video. Experiment results show that by using the proposed encryption modules, the perceptual quality of the plaintext video can be distorted, and the distorted video can be restored to the original HEVC compressed video. Furthermore, the proposed joint scheme is verified to be viable in detecting and localizing the tampered regions. Finally, a pragmatic comparison among the proposed and conventional joint schemes is performed.

The offset codebook (OCB) block cipher mode of operation for authenticated encryption

ABSTRACTThis article presents an overview of the concepts of and motivation for the OCB block cipher mode of operation. OCB is well suited for IoT, wireless, and other constrained devices where processing time and energy consumption are design issues. The article describes two versions of the OCB algorithm (OCB1 and OCB3) that have been widely accepted.

Efficient and Reliable Error Detection Architectures of Hash-Counter-Hash Tweakable Enciphering Schemes

Through pseudorandom permutation, tweakable enciphering schemes (TES) constitute block cipher modes of operation which perform length-preserving computations. The state-of-the-art research has focused on different aspects of TES, including implementations on hardware [field-programmable gate array (FPGA)/ application-specific integrated circuit (ASIC)] and software (hard/soft-core microcontrollers) platforms, algorithmic security, and applicability to sensitive, security-constrained usage models. In this article, we propose efficient approaches for protecting such schemes against natural and malicious faults. Specifically, noting that intelligent attackers do not merely get confined to injecting multiple faults, one major benchmark for the proposed schemes is evaluation toward biased and burst fault models. We evaluate a variant of TES, i.e., the Hash-Counter-Hash scheme, which involves polynomial hashing as other variants are either similar or do not constitute finite field multiplication which, by far, is the most involved operation in TES. In addition, we benchmark the overhead and performance degradation on the ASIC platform. The results of our error injection simulations and ASIC implementations show the suitability of the proposed approaches for a wide range of applications including deeply embedded systems.

A fundamental flaw in the ++AE authenticated encryption mode

Abstract In this article, we analyse a block cipher mode of operation for authenticated encryption known as ++AE (plus-plus-AE). We show that this mode has a fundamental flaw: the scheme does not verify the most significant bit of any block in the plaintext message. This flaw can be exploited by choosing a plaintext message and then constructing multiple forged messages in which the most significant bit of certain blocks is flipped. All of these plaintext messages will generate the same authentication tag. This forgery attack is deterministic and guaranteed to pass the ++AE integrity check. The success of the attack is independent of the underlying block cipher, key or public message number. We outline the mathematical proofs for the flaw in the ++AE algorithm. We conclude that ++AE is insecure as an authenticated encryption mode of operation.

Comparative Analysis of Different Implementations of Encryption Algorithms on FPGA Network Cards

The article compares the suitability of implementation and security of the best-known symmetric block ciphers. Based on an analysis, the article describes the implementation of AES and Twofish. The article includes block cipher modes of operation, namely Cipher Block Chaining (CBC), Counter mode (CTR), and Galois/Counter Mode (GCM). This work has been successfully verified, synthesized and implemented on network cards using Xilinx Virtex-7 and Virtex UltraScale+.

Research and Design of AES Security Processor Model Based on FPGA

The rapid development of information technology and how to ensure the safe transmission of information have always been a hot topic in the field of computer security. AES is the most mainstream and common encryption standard in the 21st century, with the advantages of high efficiency, good stability and flexibility.Taking information encryption as the background and FPGA design as the foundation, this paper realizes the security processor model based on advanced encryption algorithm AES, and to improve the way of collaboration between modules, especially encryption module and key extension module, making full use of the parallel and water technology to enhance the system run speed, through the design of the hardware that allows the encryption system to achieve more efficient and more stable level of security. The system has the advantages of simple circuit structure and low occupancy resources so it can be very practical.

Mimic Encryption System for Network Security

With the rapid development of the Internet, increasingly more attention has been paid to network security problems. A network security defense technology has become a very important research field. Currently, most network equipment transmits data in plaintext at the data link layer, which exposes important information, such as IP addresses, port numbers, and application protocols, to an attacker and provides an opportunity for network attacks. To protect a network against attacks and ensure its security, this paper proposes a mimic encryption system for network security. Based on the concepts of moving target defense and mimic security defense, using the principles of randomization, dynamism, and diversification, a data link layer mimic encryption system is constructed from the underlying network of an information system. By transforming the frame format, a reconfigurable encryption algorithm, an hash algorithm, and a pseudo-random number generator are used to design different combination encryption modes. Then, the hash value of an encrypted frame is obtained by performing the hash operation, and feedback update is performed to generate new key parameters for the hash key pool. In addition, the pseudo-random selection of combinations of encryption algorithms and keys is performed to achieve “one frame-one key”. Finally, an FPGA is used as the network encryption card, and a CPU is used to realize two-party key agreement and the upper layer application. Using the FPGA + CPU hardware and software collaboration, the attack surface is expanded. Taking advantage of the high anti-interference property of an FPGA, part of the attack against the software system is filtered. The experimental results and analysis show that the encryption and decryption performance of this system in a 10 G network are approximately 500 MB/s. Thus, the system can effectively prevent the leakage of user data and resist network sniffing, vulnerability attacks, exhaustive key search attacks, and ciphertext-only attacks. Moreover, this system provides high security.

WLAN Mesh Security Access Method Based on Blockchain Technology

As a brand-new network structure, WLAN Mesh network is a distributed network with large capacity, fast speed and wide coverage. However, the security problems caused by the characteristics of wireless connection are not negligible. This paper proposes a new blockchain-based WLAN Mesh design method, including user encryption module, blockchain authentication module and kernel space module. Using the blockchain technology, each user's access authentication request is treated as a transaction, and all authentication records in the mesh network are treated as public ledgers. This method based on blockchain enables secure access to the network and prevents malicious attacks.