The growth of GaAs on patterned Si trenches is essential for the realization of planarized monolithic co-integration of GaAs and Si devices. The patterned boundary regions also provide lateral sinks for stresses and defect propagation so long as the undesirable sidewall growth interactions are suppressed. In this study, we developed a cantilever patterning mask structure, with feature sizes ranging from 1.5 to 100 μm using overhung SiO2 masks sitting on top of 3-μm-tall undercutting poly-Si patterns. The Si growth surface is protected and unetched. Patterned molecular beam epitaxial (MBE) grown GaAs layers are then prepared with complete elimination of sidewall interactions. Cross-sectional transmission electron microscopy (XTEM) results show there are reduced-defect areas in the regions 2 to 3 μm from the pattern edges compared to blanket grown areas. Combining the near-edge defect-reduction feature with other defect-reduction schemes incorporated during growth, patterned GaAs with sizes of 10 μm or under exhibits significant material quality improvements compared to blanket layer growth under the same conditions.