Elliptic Curve Cryptography (ECC) has established itself as the most preferred and secured cryptography algorithm for the secure data transfer and secure data storage in embedded system environment. Efficient implementation of point multiplication algorithm is crucial activity for designing area efficient, low footprint ECC cryptoprocessors. In this paper, an area efficient implementation of double point multiplication algorithm over binary elliptic curve is presented. Area analysis of double point multiplication algorithm based on differential addition chains method is carried out and area report is generated. Area optimization is achieved by using pipelined structure and by reutilizing idle resources from previous stages in processing unit. The proposed architecture for double point multiplication is implemented on Xilinx Virtex-4 FPGA device. Architecture is modeled in verilog-HDL and synthesized using Xilinx ISE 14.1 design software and is found to be more efficient in terms of area than the existing such architectures.