Binary Compatibility Research Articles

Dynamic Binary Translation for SGX Enclaves

Enclaves, such as those enabled by Intel SGX, offer a hardware primitive for shielding user-level applications from the OS. While enclaves are a useful starting point, code running in the enclave requires additional checks whenever control or data is transferred to/from the untrusted OS. The enclave-OS interface on SGX, however, can be extremely large if we wish to run existing unmodified binaries inside enclaves. This article presents Ratel , a dynamic binary translation engine running inside SGX enclaves on Linux. Ratel offers complete interposition , the ability to interpose on all executed instructions in the enclave and monitor all interactions with the OS. Instruction-level interposition offers a general foundation for implementing a large variety of inline security monitors in thefuture. We take a principled approach in explaining why complete interposition on SGX is challenging. We draw attention to five design decisions in SGX that create fundamental trade-offs between performance and ensuring complete interposition, and we explain how to resolve them in the favor of complete interposition. To illustrate the utility of the Ratel framework, we present the first attempt to offer binary compatibility with existing software on SGX. We report that Ratel offers binary compatibility with over 200 programs we tested, including micro-benchmarks and real applications, such as Linux shell utilities. Runtimes for two programming languages, namely, Python and R, tested with standard benchmarks work out-of-the-box on Ratel without any specialized handling.

Delimiting Future Urban Sprawl Boundaries Using a GIS-based Model for Ecological Sensitivity Index Assessment and Optimization Techniques. The Case of Mytilene (Lesvos Island, Greece)

Delimiting urban sprawl boundaries have been generally regarded as a regulatory policy measure to control chaotic and sparse urban expansion and for the protection of ecological areas towards sustainable development. The conservation of ecologically sensitive areas plays a key role in environmental protection; so, harmonizing urban sprawling with nature conservation can be viewed as a binary compatibility planning problem. This study aims to employ a geographical allocation model, based on the minimization of the environmental cost in order to apply complex spatial clustering techniques. Firstly, five ecological sensitivity factors affecting the ecological footprint of the study area are modeled through Geographic Information Systems (GIS) and Analytic Hierarchy Process (AHP) method in order to evaluate the Ecological Sensitivity Index. Then, several spatial objectives and constraints such as distance from the shoreline, continuity, and compactness are applied and finally, the most optimal areas are extracted for future urban sprawl. Spatial regulations, siting rules considerations and scenarios based on the parameters of the spatial clusters outputs are tested to the commune of Mytilene, located on Lesvos Island, Greece, where strong land use changes have been recorded by the urban sprawl over the last three decades.

A Method to Maintain Binary Compatibility of C++ Objects for Reusability of Robot Software Components

A Method to Maintain Binary Compatibility of C++ Objects for Reusability of Robot Software Components

로봇 소프트웨어 컴포넌트의 재사용성을 위한 C++ 객체의 바이너리 호환성 유지 방법

This paper proposes the C++-based binary compatibility object model(CBCOM) to maintain the binary compatibility of software components that share objects among C++-based executable codes, such as .exe and .dll, for reusability of robot-software components. In addition, the proposed model provides methods such as overriding and overloading, multiple inheritances of interfaces, and exception handling. This paper illustrates how to use the proposed model via a simple example in the Windows environment. The proposed method is validated by application examples and comparisons with known object models, such as C++, COM, and CCC, in terms of the call time of a method during execution and binary compatibility for reusability of robot software components independent of the interface version or the types of compilers. Additionally, this paper shows that CBCOM-based components that are compiled with Microsoft Visual C++ and GCC can call each other and that any interface version problems are resolved.

Detecting Binary Incompatible Software Components Using Dynamic Loader

Modern programming languages support modular development dividing the system into separate translation units and compile them individually. A linker is used then to assemble together these units either statically or dynamically. This process, however, introduces implicit dependences between the translation units. When one or more units are modified in inconsistent way binary incompatibility occurs and may result in unexpected program behavior. Current mainstream programming languages neither specify what are the binary compatibility rules nor provide tools to check them.In this paper we discuss the details of various cases of binary incompatibility. We implemented a prototype solution in the Welltype programming language to detect binary compatibility by dynamic loader.

A generalised theory of Interface Automata, component compatibility and error

Interface theories allow system designers to reason about the composability and compatibility of concurrent system components. Such theories often extend both de Alfaro and Henzinger’s Interface Automata and Larsen’s Modal Transition Systems, which leads, however, to several issues that are undesirable in practice: an unintuitive treatment of specified unwanted behaviour, a binary compatibility concept that does not scale to multi-component assemblies, and compatibility guarantees that are insufficient for software product lines. In this article we show that communication mismatches are central to all these problems and, thus, the ability to represent such errors semantically is an important feature of an interface theory. Accordingly, we present the error-aware interface theory EMIA, where the above shortcomings are remedied by introducing explicit fatal error states. In addition, we prove via a Galois insertion that EMIA is a conservative generalisation of the established Modal Interface Automata theory.

DITVA: Dynamic Inter-Thread Vectorization Architecture

In the Single-Program Multiple-Data (SPMD) programming model, threads of an application exhibit very similar control flows and often execute the same instructions, but on different data. In this paper, we propose the Dynamic Inter-thread Vectorization Architecture (DITVA) to leverage the implicit Data Level Parallelism that exists across threads on SPMD applications.By assembling dynamic vector instructions at runtime, DITVA extends an in-order SMT processor with a dynamic inter-thread vector execution mode akin to the Single-Instruction, Multiple-Thread model of Graphics Processing Units. In this mode, multiple scalar threads running in lockstep share a single instruction stream and their respective instruction instances are aggregated into SIMD instructions. DITVA can leverage existing SIMD units and maintains binary compatibility with existing CPU architectures. To balance thread- and data-level parallelism, threads are statically grouped into fixed-size independently scheduled warps. Additionally, to maximize dynamic vectorization opportunities, we adapt the fetch steering policy to favor thread synchronization within warps and thus improve lockstep execution.Our experimental evaluation of the DITVA architecture on the SPMD applications from the PARSEC and Rodinia OpenMP benchmarks show that a 4-warp × 4-lane 4-issue DITVA architecture with a realistic bank-interleaved cache achieves 1.55× higher performance compared to a 4-thread 4-issue SMT architecture with AVX instructions, while fetching and issuing 51% fewer instructions, and achieving an overall 24% energy reduction. DITVA also enables applications limited by memory to scale with higher bandwidth architectures. For instance, when the bandwidth is increased from 2GB/s to 16GB/s, we find that memory bound applications show an improvement in performance by 3× in comparison with the baseline SMT. Therefore, DITVA appears as a cost-effective design for achieving very high single-core performance on SPMD parallel sections.

Identifying unusual commits on GitHub

AbstractTransparent environments and social‐coding platforms as GitHub help developers to stay abreast of changes during the development and maintenance phase of a project. Especially, notification feeds can help developers to learn about relevant changes in other projects. Unfortunately, transparent environments can quickly overwhelm developers with too many notifications, such that they lose the important ones in a sea of noise. Complementing existing prioritization and filtering strategies based on binary compatibility and code ownership, we develop an anomaly detection mechanism to identify unusual commits in a repository, which stand out with respect to other changes in the same repository or by the same developer. Among others, we detect exceptionally large commits, commits at unusual times, and commits touching rarely changed file types given the characteristics of a particular repository or developer. We automatically flag unusual commits on GitHub through a browser plug‐in. In an interactive survey with 173 active GitHub users, rating commits in a project of their interest, we found that, although our unusual score is only a weak predictor of whether developers want to be notified about a commit, information about unusual characteristics of a commit changes how developers regard commits. Our anomaly detection mechanism is a building block for scaling transparent environments.

Low overhead dynamic binary translation on ARM

The ARMv8 architecture introduced AArch64, a 64-bit execution mode with a new instruction set, while retaining binary compatibility with previous versions of the ARM architecture through AArch32, a 32-bit execution mode. Most hardware implementations of ARMv8 processors support both AArch32 and AArch64, which comes at a cost in hardware complexity. We present MAMBO-X64, a dynamic binary translator for Linux which executes 32-bit ARM binaries using only the AArch64 instruction set. We have evaluated the performance of MAMBO-X64 on three existing ARMv8 processors which support both AArch32 and AArch64 instruction sets. The performance was measured by comparing the running time of 32-bit benchmarks running under MAMBO-X64 with the same benchmark running natively. On SPEC CPU2006, we achieve a geometric mean overhead of less than 7.5% on in-order Cortex-A53 processors and a performance improvement of 1% on out-of-order X-Gene 1 processors. MAMBO-X64 achieves such low overhead by novel optimizations to map AArch32 floating-point registers to AArch64 registers dynamically, handle overflowing address calculations efficiently, generate traces that harness hardware return address prediction, and handle operating system signals accurately.

Extended overlay architectures for heterogeneous FPGA cluster management

This paper proposes a novel approach for the hardware virtualization of FPGA resources, based on overlay architectures. Overlays are reconfigurable architectures synthesized on top of commercial-of-the-shelf (COTS) FPGAs. They have demonstrated to improve portability, speed up reconfiguration, and promote resource abstraction hence durability. This work demonstrates how slightly extending the architecture overlaying on top of COTS FPGAs can bring novel features for sake of improved management of hardware tasks, and ensure the binary compatibility among heterogeneous FPGAs. This comes along with a deployment platform and a software stack offering an operating system service. As a result, the platform is capable of node-to-node a hardware application live migration, while operating a cluster of heterogeneous FPGAs. Besides, the proposed software stack ensures backward compatibility when introducing a new overlay architecture. This paper also introduces accurate cost models for the early estimation of the reconfiguration time overhead. This approach that has been demonstrated in DASIP international conference is evaluated in this paper on both the Xilinx Artix-7 and Altera Cyclone V C9 FPGAs.

Implementation of the simplified communication mechanism in the cloud of high performance computations

Constructing a system with traditional resources, based on the concept of high-performance computations (HPC) and data processing in the cloud, fully reveals new addressing problems. In the course of processing the data, it discovers many other unexplored scientific problems. One of these problems is to reduce the network expenditures on a virtual cluster in the cloud with HPC. In order to solve this problem, the work presented proposes a mechanism of simplified communication (SCM) to optimize the intra-cluster network performance, which intercepts packets at the level below that of network, and verifies whether it is meant for a coresident virtual machine. Compared with TCP, the introduced protocol of simplified communication (SCP) makes it possible to avoid the slow start phase, and to use a smaller header for a data packet, which improves the intra-domain and extra-domain throughput. To implement SCM inside the system, we also integrated XenLoop. A dispatched packet is sent through the FIFO channel, which is opened by XenLoop. This realization supports binary compatibility for the applications that use a standard socket interface. Throughput of the intra-domain communication in the system with SCM improves by about one and a half, while relative time of a reference test with a set of NAS-tags is lower. Experimental comparison of indicators for SCP and a protocol of remote memory access (RMAP) shows that SCP is 7.8–7.9 % faster than RMAP.

Robust Object Tracking With Discrete Graph-Based Multiple Experts.

Variations of target appearances due to illumination changes, heavy occlusions, and target deformations are the major factors for tracking drift. In this paper, we show that the tracking drift can be effectively corrected by exploiting the relationship between the current tracker and its historical tracker snapshots. Here, a multi-expert framework is established by the current tracker and its historical trained tracker snapshots. The proposed scheme is formulated into a unified discrete graph optimization framework, whose nodes are modeled by the hypotheses of the multiple experts. Furthermore, an exact solution of the discrete graph exists giving the object state estimation at each time step. With the unary and binary compatibility graph scores defined properly, the proposed framework corrects the tracker drift via selecting the best expert hypothesis, which implicitly analyzes the recent performance of the multi-expert by only evaluating graph scores at the current frame. Three base trackers are integrated into the proposed framework to validate its effectiveness. We first integrate the online SVM on a budget algorithm into the framework with significant improvement. Then, the regression correlation filters with hand-crafted features and deep convolutional neural network features are introduced, respectively, to further boost the tracking performance. The proposed three trackers are extensively evaluated on three data sets: TB-50, TB-100, and VOT2015. The experimental results demonstrate the excellent performance of the proposed approaches against the state-of-the-art methods.

VCC: A framework for building containerized reproducible cluster software environments

The problem of portability and reproducibility of the software used to conduct computational experiments has recently come to the fore. Container virtualisation has proved to be a powerful tool to achieve portability of a code and it's execution environment, through runtimes such as Docker, LXC, Singularity and others - without the performance cost of traditional Virtual Machines (Chamberlain, Invenshure, and Schommer 2014; Felter et al. 2014). However, scientific software often depends on a system foundation that provides middleware, libraries, and other supporting software in order for the code to execute as intended. Typically, container virtualisation addresses only the portability of the code itself, which does not make it inherently reproducible. For example, a containerized MPI application may offer binary compatibility between different systems, but for execution as intended, it must be run on an existing cluster that provides the correct interfaces for parallel MPI execution. As a greater demand to accomodate a diverse range of disciplines is placed on high performance and cluster resources, the ability to quickly create and teardown reproducible, transitory virtual environments that are tailored for an individual task or experiment will be essential. The Virtual Container Cluster (VCC) is a framework for building containers that achieve this goal, by encapsulating a parallel application along with an execution model, through a set of dependency linked services and built-in process orchestration. This promotes a high degree of portability, and offers easier reproducibility by shipping the application along with the foundation required to execute it - whether that be an MPI cluster, big data processing framework, bioinformatics pipeline, or any other execution model (Higgins, Holmes, and Venters 2017).

Computer simulation of thermoplastic elastomers from rubber-plastic blends and comparison with experiments

Abstract Computer simulation could be a useful technique to scrutinize the properties of individual polymers as well as their blends. However, there is no work on computer simulation of thermoplastic elastomer from rubber-plastic blends. As representative example, binary compatibility of polyamide 6 (PA6) with fluoroelastomer (FKM) for a 40/60 composition of PA6/FKM thermoplastic elastomer was investigated by atomistic simulation and mesoscale dissipative particle dynamics simulation. The specific volume of PA6, FKM and their blend was studied at various temperatures to estimate the glass-rubber transition. The glass transition temperatures of pristine PA6 and FKM were found to be 336 K and 250 K respectively in line with the experimental values. The blend system displayed two distinct glass transition temperatures (348 K and 254 K for PA6 40FKM 60) as discerned from atomistic simulation. These values were also in agreement with the experimental findings. Two T g s described immiscibility in the present composition. The Flory-Huggins interaction parameter χ, as determined from atomistic simulation, was estimated to be 0.25, also consistent with the experimental result. Among different potential energy contributions, van der Waals energy and torsion energy showed distinct inflection points for both the pristine polymers and their blend. These inflection points were near the glass transition temperature of the respective polymers. Polymer chain mobility depicted from the mean square displacement emphasized faster relaxation of PA6 over FKM in the blend. Dissipative particle dynamics (mesoscale) simulation suggested phase separation and dispersion of FKM in the PA6 matrix in line with the experimental results.

A Framework for Practical Dynamic Software Updating

Dynamic software updating (DSU) enables a program to be patched on the fly without being shutdown. This paper addresses the practicality problem of the recent research on DSU systems, and presents Replus, a new DSU system that balances practicality and functionality. Replus aims to retain backward binary compatibility and support multi-threaded programs. In addition, it does not require customers to have developer-level software knowledge. More importantly, without specific compiler support, Replus can patch programs that are difficult to be updated at runtime, as well as programs that may incur an indefinite delay in DSU. The key technique of our solution is to update the stack elements for the patched program using two new mechanisms: Immediate Stack Updating , which immediately updates the stack of a thread, and timely stack updating , which only updates the stack frames of the necessary functions without affecting others. Replus also develops an Instruction Level Updating mechanism, which is more efficient for certain security patches. We used popular server applications as test suites to evaluate the effectiveness of Replus. The experimental results demonstrated that Replus can successfully update all the test suites with negligible impact on application performance.

Multilevel Probabilistic Morphological Analysis for Facilitating Modeling and Simulation of Notional Scenarios

ABSTRACTDespite advances in computational power, simulation‐based experiments of complex problems remain time‐consuming. Significant efforts are required to define an accurate representation of the problem and draw relevant conclusions about relationships between input parameters and output performance measures. To reduce the computational burden without sacrificing accuracy, it is customary to design a set of relevant scenarios. Doing so necessitates that the problem be decomposed into relevant parameters and that the consistency of these parameters be analyzed. To address this challenge, we propose a multilevel probabilistic morphological analysis. Traditionally, morphological analysis documents the decomposition of a system into its main components, and performs binary compatibility assessments to document relational data between component options. However, this approach leads to a rigid definition of the problem space and a static solution space that does not account for uncertain and dynamic behaviors associated with complex systems‐of‐systems. This research incorporates two important improvements. First, it explicitly incorporates a multilevel approach accommodating any successive decomposition steps that may be required when dealing with a complex system‐of‐systems problem. Second, this research introduces probabilistic cross‐consistency assessments instead of traditional binary assessments to account for uncertain future states of the world. This probabilistic scheme is used to describe degrees of likelihood that two elements may coexist in a given scenario. This way, more complex interactions may also be captured and more realistic scenarios may be defined. Finally, the proposed method is applied to a problem investigating the design of architectures of detection systems for the protection of homeland critical assets.

Signature-Based Protection from Code Reuse Attacks

Code Reuse Attacks (CRAs) recently emerged as a new class of security exploits. CRAs construct malicious programs out of small fragments (gadgets) of existing code, thus eliminating the need for code injection. Existing defenses against CRAs often incur large performance overheads or require extensive binary rewriting and other changes to the system software. In this paper, we examine a signature-based detection of CRAs, where the attack is detected by observing the behavior of programs and detecting the gadget execution patterns. We first demonstrate that naive signature-based defenses can be defeated by introducing special “delay gadgets” as part of the attack. We then show how a software-configurable signature-based approach can be designed to defend against such stealth CRAs, including the attacks that manage to use longer-length gadgets. The proposed defense (called SCRAP) can be implemented entirely in hardware using simple logic at the commit stage of the pipeline. SCRAP is realized with minimal performance cost, no changes to the software layers, and no implications on binary compatibility. Finally, we show that SCRAP generates no false alarms on a wide range of applications.

A transparent and adaptive reconfigurable system

In the current scenario, where computer systems are characterized by a high diversity of applications coexisting in a single device, and with the stagnation in frequency scaling because of the excessive power dissipation, reconfigurable systems have already proven to be very effective. However, they all present two major drawbacks, which are addressed by this work: lack of transparency (the need for special tools or compilers that changes the original code) and no ability to adapt to applications with different behaviors and characteristics, so significant gains are achieved only in very specific data stream oriented applications. Therefore, this work proposes the Dynamic Instruction Merging (DIM), a Binary Translation mechanism responsible for transforming sequences of instructions into a coarse-grained array configuration at run-time, in a totally transparent process, with support to speculative execution. The proposed system does not impose any kind of modification to the source or binary codes, so full binary compatibility is maintained. Moreover, it can optimize any application, even those that do not present specific kernels for optimization. DIM presents, on average, 2.7 times of performance gains and 2.35 times of energy savings over a MIPS processor, and a higher IPC than an out-of-order superscalar processor, running the MIBench benchmark set.

Binary compatibility for embedded systems using greedy subgraph mapping

We propose a novel lightweight code generation algorithm GSM (Greedy Subgraph Mapping), which can generate compact code with low overhead using many-to-one mapping. GSM is implemented and evaluated in a dynamic binary translation prototype system called TransARM. Experimental results demonstrate that GSM generates higher quality target code than a conventional implementation, which brings an average code expansion rate close to 1.3 for the selected 11 benchmarks. Moreover, GSM causes slightly extra overhead and negligible slowdown of translation and enables 10% performance improvement for target code execution.

Cider

We present Cider, an operating system compatibility architecture that can run applications built for different mobile ecosystems, iOS or Android, together on the same smartphone or tablet. Cider enhances the domestic operating system, Android, of a device with kernel-managed, per-thread personas to mimic the application binary interface of a foreign operating system, iOS, enabling it to run unmodified foreign binaries. This is accomplished using a novel combination of binary compatibility techniques including two new mechanisms: compile-time code adaptation, and diplomatic functions. Compile-time code adaptation enables existing unmodified foreign source code to be reused in the domestic kernel, reducing implementation effort required to support multiple binary interfaces for executing domestic and foreign applications. Diplomatic functions leverage per-thread personas, and allow foreign applications to use domestic libraries to access proprietary software and hardware interfaces. We have built a Cider prototype, and demonstrate that it imposes modest performance overhead and runs unmodified iOS and Android applications together on a Google Nexus tablet running the latest version of Android.