Bilayer Resistive Switching Memory Research Articles

Quad-Level Cell Switching with Excellent Reliability in TiN/AlOx:Ti/TaOx/TiN Memory Device.

TiN/AlOx:Ti/TaOx/TiN memory devices using bilayer resistive switching memory demonstrated excellent durability and capability of QLC (quad-level cell) memory devices. The best nonvolatile memory characteristics with the lowest operation current and optimized 4 bit/cell states were obtained using the Incremental Step Pulse Programming (ISPP) algorithm in array. As a result, a superior QLC reliability (cycle endurance > 1 k at each level of the QLC, data retention > 2 h at 125 °C) for all the 4 bits/cell operations was achieved in sub-μm scaled RRAM (resistive random access memory) devices.

Investigation of Retention Behavior of TiOx/Al2O3 Resistive Memory and Its Failure Mechanism Based on Meyer–Neldel Rule

The understanding of failure behavior is one of the basic requirements for further development of nonvolatile resistive random access memory (RRAM) devices. In this paper, we show a detailed analysis of a temperature-dependent low-resistance state (LRS) retention failure behavior of RRAM based on TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> bilayer structure. The device is capable of showing good resistive switching properties with stable operating parameters. The LRS current conduction process is mostly dominated by the Fowler–Nordheim tunneling. Retention behavior has been studied with a wide range of temperatures from room temperature to 200 °C with different compliances. The experimental results of TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> bilayer resistive switching memory are further supported theoretically by the Meyer–Neldel rule, which is fit well to the retention failure time.

Effect of annealing treatment on the uniformity of CeO2/TiO2 bilayer resistive switching memory devices

Bilayer CeO2/TiO2 films with high-k dielectric property were prepared by rf magnetron sputtering technique at room temperature. Effect of annealing treatment on resistive switching (RS) properties of bilayer CeO2/TiO2 films in O2 ambient at different temperature in the range of 350–550 °C was investigated. Our results revealed that the bilayer films had good interfacial property at 500 °C and this annealing temperature is optimum for different RS characteristics. Results showed that bilayer CeO2/TiO2 film perform better uniformity and reliability in resistive switching at intermediate temperature (i.e. 450 °C and 500 °C) instead of low and high annealing temperature (i.e. 350 °C and 550 °C) at which it exhibits poor crystalline structure with more amorphous background. Less Gibbs free energy of TiO2 as compared to CeO2 results in an easier re-oxidation of the filament through the oxygen exchange with TaN electrode. However, the excellent endurance property (>2500 cycles), data retentions (105 s) and good cycle-to-cycle uniformity is observed only in 500 °C annealed devices. The plots of cumulative probability, essential memory parameter, show a good distribution of Set/Reset voltage.

Selection by current compliance of negative and positive bipolar resistive switching behaviour in ZrO2−x/ZrO2 bilayer memory

We report here a ZrO2−x/ZrO2-based bilayer resistive switching memory with unique properties that enables the selection of the switching mode by applying different electroforming current compliances. Two opposite polarity modes, positive bipolar and negative bipolar, correspond to the switching in the ZrO2 and ZrO2−x layer, respectively. The ZrO2 layer is proved to be responsible for the negative bipolar mode which is also observed in a ZrO2 single layer device. The oxygen deficient ZrO2−x layer plays the dominant role in the positive bipolar mode, which is exclusive to the bilayer memory. A systematic investigation of the ZrO2−x composition in the bilayer memory suggests that ZrO1.8 layer demonstrates optimum switching performance with low switching voltage, narrow switching voltage distribution and good cycling endurance. An excess of oxygen vacancies, beyond this composition, leads to a deterioration of switching properties. The formation and dissolution of the oxygen vacancy filament model has been proposed to explain both polarity switching behaviours and the improved properties in the bilayer positive bipolar mode are attributed to the confined oxygen vacancy filament size within the ZrO2−x layer.

Effects of interface reaction on the performance of AlOx/WOx bilayer resistive switching memory

The effects of interface reaction, which were proved to affect the device performance significantly, were investigated in the AlOx/WOx bilayer resistive switching memory. The formation of the AlOx layer is due to the reaction of the Al top electrode with the oxygen in the WOx surface during the post-annealing process. It was observed that longer tungsten oxidation time can decrease the forming voltage and reset current. Transmission electron microscopy analysis showed that longer tungsten oxidation time leads to the formation of a thinner AlOx layer under the same post-annealing conditions. It was deduced that the different oxygen composition in the WOx surface may be the origin of the different AlOx layer thickness observed. The X-ray photoelectron spectroscopy results of the WOx surface indicated that the W6+/W5+ ratio decreased with increasing W oxidation time, which explained the different thickness of AlOx, thus resulting in different resistive switching characteristics. This study paved the way for the optimization of the process of fabricating AlOx/WOx bilayer resistive switching memory.

Switching mechanism of double forming process phenomenon in ZrOx/HfOy bilayer resistive switching memory structure with large endurance

In this Letter, the mechanism of double forming process phenomenon revealing in ZrO2/HfO2 bilayer resistive random access memory structure is investigated. This phenomenon caused by the formation of TiON interfacial layer can be well explained by using the energy band diagram. The TiON interfacial layer will be a tunneling barrier during the first forming process when a negative voltage applied on the device, while it will breakdown when applying a positive voltage. Besides, due to the double forming process, an asymmetric conductive filament with narrower size at ZrO2/HfO2 interface is formed in the device. The point for formation and rupture of the conductive filament can be confined at the ZrO2/HfO2 interface, and it will suppress the consumption of oxygen ions during endurance test. Therefore, high speed (40 ns) and large endurance (107 cycles) characteristics are achieved in this device structure.

Bipolar ${\rm Ni}/{\rm TiO}_{2}/{\rm HfO}_{2}/{\rm Ni}$ RRAM With Multilevel States and Self-Rectifying Characteristics

To be compatible with 3-D vertical crossbar arrays, a TiO2/HfO2 bilayer resistive-switching memory (RRAM) cell sandwiched between Ni electrodes is developed. The proposed device has numerous highly desired features for the implementation of 3-D vertical RRAM, including: stable bipolar resistive switching; forming free; self-compliance; self-rectification; multiple resistance states; and room-temperature process. The resistive switching and current rectification are attributed to oxygen vacancy migration in HfO2 and potential barrier modulation of the asymmetric TiO2/HfO2 tunnel barrier. The rectification ratio up to 103 is capable of realizing a single-crossbar array up to 16 Mb for future high-density storage class memory applications.

Performance and characteristics of double layer porous silicon oxide resistance random access memory

A bilayer resistive switching memory device with an inserted porous silicon oxide layer is investigated in this letter. Compared with single Zr:SiOx layer structure, Zr:SiOx/porous SiOx structure outperforms from various aspects, including low operating voltages, tighter distributions of set voltage, higher stability of both low resistance state and high resistance state, and satisfactory endurance characteristics. Electric field simulation by comsolTM Multiphysics is applied, which corroborates that intensive electric field around the pore in porous SiOx layer guides the conduction of electrons. The constraint of conduction path leads to better stabilization and prominent performance of bilayer resistive switching devices.