Bias Temperature Stress Research Articles

Improving Electrical Properties and Thermal Stability of (Ba,Sr)TiO3 Thin Films on Cu(Mg) Bottom Electrodes

Cu(Mg) alloy films have replaced pure Cu as bottom electrodes for (Ba,Sr)TiO3 (BST) capacitors used in high-frequency devices. A combined BST/Cu(Mg) structure reduced the leakage current density to 3.0×10-8 A/cm2 at 1 MV/cm, and increased the breakdown field from 0.4 to 2.4 MV/cm at 10-6 A/cm2, from the corresponding values of the BST/Cu structure. High-quality characteristics probably follow the formation of a self-aligned MgO layer following the deposition of a Cu(Mg) alloy by annealing in an oxygen ambient, yielding an electrode with an excellent diffusion barrier and electrical characteristics, which is therefore effective in a BST thin-film capacitor. Additionally, the bias temperature stress and time-dependent dielectric breakdown in ambient nitrogen at an electric field of up to 2 V at temperatures between 100 and 200 °C were considered to accelerate Cu+ ion drift.

Observations of NBTI-Induced Atomic-Scale Defects

A combination of MOSFET gate-controlled diode measurements and a very sensitive electron spin resonance technique called spin-dependent recombination was utilized to observe and identify defect centers generated by a negative bias temperature stress in fully processed SiO 2-based pMOSFETs. In SiO2 devices, the defects include two Si/SiO2 interface silicon dangling bond centers (Pb0 and Pb1) and may also include an oxide silicon dangling bond center (E'). The observations indicate that both P b0 and Pb1 defects play major roles in these SiO 2-based devices and suggest that E' centers could play an important role

Role of reactive surface oxygen in causing enhanced copper ionization in a low-k polymer

Copper oxidation, ionization, and penetration into a low-k polymer, SiLK-D™, are studied here. It is demonstrated by exposure to an oxidizing plasma and subsequent bias-temperature-stress experiments that an increase in the content of reactive or weakly bound oxygen at the SiLK-D™ surface in contact with the copper leads to the oxidation of the copper and injection of the copper into the polymer. The oxidation and injection are driven by the applied external electric field. X-ray photoelectron spectroscopy has been used to characterize the surface oxygen content on as-deposited (low oxygen content, the reference) and oxygen plasma treated films (high surface oxygen content). Capacitors were fabricated on both materials and bias temperature stress tests were done for several O2 plasma exposure times and for external electric fields of 1, 0.5, and 0.1MV∕cm to detect copper ionization and injection. With an electric field of only 0.1MV∕cm, copper injection was not detectable even though oxygen at the SiLK-D™ surface had been increased by exposure to oxygen plasma.

Oxygen pressure dependence of copper ion transport in SiO2 dielectrics

Electrical bias-temperature stress measurements were performed on copper oxide/SiO2/silicon metal-oxide-semiconductor capacitors to measure the oxygen partial pressure dependence of the copper ion transport rates through the SiO2 layer. Both copper(I) oxides (Cu2O) and copper(II) oxides (CuO) were investigated, and copper oxide film stoichiometry was characterized by glancing incidence x-ray diffraction and x-ray photoelectron spectroscopy. At relatively high oxygen pressures, copper ion transport is observed for both Cu2O∕SiO2∕Si and CuO∕SiO2∕Si, and the activation energies are comparable. Under reduced oxygen pressures and vacuum, the copper ion flux is reduced for both copper oxides. In vacuum, the activation energy for copper transport from CuO layers is reduced by approximately 0.7eV compared to the apparent activation barrier at high oxygen pressures, and the copper transport signals for Cu2O are below the detection limit of the experiment. A study of copper transport rates for both CuO and Cu2O electrode layers shows that the copper ion flux increases with increasing oxygen pressure, with an oxygen pressure dependence close to pO21∕2.

Copper drift in high-dielectric-constant tantalum oxide thin films under bias temperature stress

The use of high-dielectric-constant (high-κ) materials for embedded capacitors is becoming increasingly important. Tantalum oxide (Ta2O5) is a prominent candidate as a high-κ material for embedded capacitor use. Metal drift in Ta2O5 (κ∼25) was investigated by bias temperature stress and triangular voltage sweep testing techniques on metal/Ta2O5∕SiO2∕Si structures. At a temperature of 300°C and 0.75MV∕cm bias conditions, Al, Ta, and Ti do not diffuse in Ta2O5, but Cu clearly showed a drift. The Cu drift is attributed to the lack of a stable Cu oxide which can limit Cu ion generation and penetration.

Improved reliability of HfO/sub 2//SiON gate stack by fluorine incorporation

Effects of fluorine (F) incorporation on the reliabilities of pMOSFETs with HfO/sub 2//SiON gate stacks have been studied. In this letter, fluorine was incorporated during the source/drain implant step and was diffused into the gate stacks during subsequent dopant activation. The authors found that F introduction only negligibly affects the fundamental electrical properties of the transistors, such as threshold voltage V/sub th/, subthreshold swing, gate leakage current, and equivalent oxide thickness. In contrast, reduced generation rates in interface states and charge trapping under constant voltage stress and bias temperature stress were observed for the fluorine-incorporated split. Moreover, the authors demonstrated for the first time that F incorporation could strengthen the immunity against plasma charging damage.

Dehydrohalogenation in Alpha-Functionalized Poly-p-xylylenes

Poly(p-xylylene) or parylene has been around for more than a half a century. It is typically deposited by the Gorham method from [2.2] paracyclophane. However, another method is via alpha-derivatives of p-xylene. Both poly(α-bromo-p-xylylene) and poly(α-chloro-p-xylylene) have been successfully deposited by this route through predominately HBr or HCl dehydrohalogenation gas-phase reactions. In the study reported here we synthesize α,α,α-tribromo-p-xylene and α-bromo-α′,α′-dichloro-p-xylene as CVD precursors to yield α,α- and α,α′-dihalogenated poly(p-xylylene)s to try to convert them, via post-deposition annealing, to poly(phenylene ethynylene) (PPE). PPE and its intermediate poly(phenylene vinylene) (PPV), have potentially better thermal and oxidative properties, and in addition they are both photoluminescent. The as-deposited and annealed thin films have been characterized by Rutherford backscattering spectrometry (RBS), infrared spectroscopy, and UV-vis spectrophotometry, and electrically tested by dielectric constant, bias-temperature stress (BTS), and leakage current. It is found that the thin films crystallizes concurrent with the formation of PPV and possibly converts to PPE but has much residual chlorine and bromine. However, PPV exhibits excellent stability in contact with copper and is more thermally stable than poly(p-xylylene).

Bias-Temperature Stability of Ti–Si–N–O Films

Copper shows a tendency to drift into contiguous dielectric material under bias and temperature stressing. The stability of different compositions (by changing silane gas flow rate) of Ti–Si–N–O films has been investigated using metal-oxide-semiconductor (MOS) capacitors. MOS samples preannealed at and subjected to bias temperature stressing (BTS) at , under an electrical field of 0.5 or show stable capacitance–voltage behavior with no flatband voltage shift from as-annealed to of BTS for Ti–Si–N–O film with ratio of 0.48. The lack of flatband voltage shift indicates that Ti–Si–N–O film is able to prevent Cu ion penetration. It is found that the electrical stability of Ti–Si–N–O film is reduced with higher ratio. For Ti–Si–N–O film with ratio of 0.91, flatband voltage shifts after of BTS at and , and this shift is attributed to the interface states at the Ti–Si–N–O∕oxide interface that were generated during the plasma process and could not be fully healed after annealing. Thus, it is suggested that with low silane gas flow rate, an electrically stable Ti–Si–N–O film can be achieved with fewer interface states.

Influence of bulk bias on negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics

Bulk (well) bias effects (grounded, positively biased, and floating) on both static and dynamic negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics were systematically investigated. The device degradation under both static and dynamic negative bias temperature (NBT) stresses with relatively large gate voltage (Vg) is significantly enhanced by a positive bulk bias (Vb). Moreover, the device degradation under bipolar pulsed bias temperature (BT) stress is dramatically enhanced by floating the bulk electrode. Both phenomena can be attributed to an additional degradation related to hot hole injection. The holes are energized by an electrical field of the induced depletion region between channel and bulk provided by the positive Vb or, in the case of bipolar pulsed BT stress with the bulk electrode floating, by the transient depletion region below the channel induced by the p-n junction between source (drain) and bulk upon the gate voltage Vg being switched from positive to negative with a transition time less than about 0.2–100ms.

Stability of Cu on Epoxy Siloxane Polymer under Bias Temperature Stress

Previous work has shown that epoxy siloxane polymer can inherently resist Cu diffusion. However, the adhesion between Cu and fully cured polymer is poor due to the nature of chemically inert organic groups on the polymer surfaces. In the present work it is shown that this polymer surface, before being fully cured/annealed, can provide adhesion to Cu. Rutherford backscattering spectroscopy (RBS) spectra of the as-spun polymer/Cu stacks followed by a thermal annealing show that Cu can diffuse into the as-spun polymer film readily upon thermal annealing indicating that the polymer with incomplete curing process remains active, thus providing a route for Cu to react with polymer. As a result, the adhesion at Cu-polymer interface is obtained by mechanical interlock and chemical reaction attributed to the formation of a diffused layer and Cu-polymer complex, respectively. Therefore, we propose a two-layer polymer stack strategy consisting of an adhesion layer (not fully cured) that is adjacent to Cu and a fully cured/annealed polymer film that retains its resistance to Cu diffusion. Triangular-voltage sweep (TVS) curves show that this scheme can retain its resistance to Cu diffusion under a bias-temperature stress (BTS) of at . Current-voltage and BTS current-time curves further demonstrate that the polymer layer fully cured at in the two-layer stack can effectively block the conduction paths generated during the formation of the interfacial bonding at Cu-polymer interface.

An Investigation of Positive Charges Formed During Negative Bias Temperature Stress

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A Novel Polycarbosilane-Based Low-k Dielectric Material

The electrical properties of a novel, cross-linked polycarbosilane, which is thermally stable up to , were investigated as a potential interlayer dielectric for advanced interconnect technology. This polycarbosilane is derived from a cyclolinear precursor polymer, which was spin-coated from xylene solution and cured at to induce cross-linking. The resultant films were found to have a dielectric constant of 2.32 (nonporous) and to exhibit excellent resistance to Cu diffusion under standard bias temperature stress (BTS) test conditions. This resistance to Cu diffusion is attributed to the fact that this polymer does not contain oxygen and that Cu ionization through metal oxidation at the metal–polymer interface can thus be prevented. It was further demonstrated that an ultrathin layer of polymer with a nominal thickness of is sufficient to block the Cu ion penetration into an ultralow- porous methylsilsesquioxane film when subjected to BTS. This polycarbosilane holds considerable promise for application as an interlayer dielectric in the next generations of high-performance integrated circuits.

Low Temperature Physical-Chemical Vapor Deposition of Ti-Si-N-O Barrier Films

Ti-Si-N-O films were grown by radio frequency reactive magnetron sputtering of a titanium target with nitrogen and silane gases introduced at a temperature of 40°C. X-ray diffraction and X-ray photoelectron spectroscopy results show that Ti-N, Si-N, Ti-Si, Ti-O, Si-O, and Si-N-O compounds are formed. High-resolution-transmission-electron-microscopy reveals that the film consists of Ti-N, Si-N, Ti-Si nanocrystals embedded in an amorphous Ti-O, Si-O, and Si-N-O matrix. This type of microstructure gives rise to very high stability against copper diffusion under bias temperature stressing (BTS) compared to binary barrier materials. The BTS result shows that Ti 24 Si 12 N 35 O 29 film can effectively block copper ion diffusion for up to 200°C at 0.5 MV/cm.

Relationship Between Interfacial Adhesion and Dielectric Reliability of Cu Alloy Films

AbstractCu alloy has been suggested to enhance reliabilites in future technology. To evaluate the effects of alloying elements on electrical and mechanical reliabilities, Mg and Ru were chosen as alloying elements. Because alloying elements to Cu should not increase resistivity over comparable value to pure Cu, the resistivity of pure Cu, Cu-0.7at%Mg alloy and Cu-2.2at%Ru alloy was compared. Time dependent dielectric breakdown (TDDB) under bias-temperature stress (BTS) tests were accomplished to evaluate the effect of alloying elements on dielectric reliability. The standard four point bending experiments were conducted to measure critical interfacial adhesion energy of conducting metal to SiO2. The relationship of the effect of alloying elements on reliabilities to distribution of alloying elements was analyzed using Auger Electron Spectroscopy (AES). Our results show alloying Mg to Cu can enhance reliability by forming self-passivating layer on its surface and interface while Ru does not.

Thermal and Dielectric Stability of Parylene X

AbstractIntegrating pore sealing and barrier dielectric materials into back-end-of-the-line (BEOL) structures is challenging due to the requirements of high thermal stability, electrical stability (high breakdown, low leakage, and low dielectric constant), and barrier-like properties of the films. With Al etch-back metallization the dielectric needed to be stable to 450 °C due to Al reflow but now the thermal budget is shrinking with Cu metallization. Now the limiting factors are solder and ultra-low k (ULK) dielectric cure temperatures. These temperatures may still require thermal anneals exceeding 400 °C, which is very demanding on organic-based systems. Parylene X, a pore sealing chemical vapor depositable polymer, is deposited a room temperature via a precursor that allows the polymer to be self-initiated and without any by-products. The deposition platform allows controlled penetration of the organic polymer that allows significant fracture toughness improvement for the ULK dielectric. The polymer starts to cross-link at 175 °C with full conversion by 380 °C as measured by FT-IR spectroscopy. The polymer is shown to be stable to 420 °C with a dielectric constant of 2.7 and a leakage current of 0.5 × 10-9 A/cm2 at 0.67 MV/cm using MIMCAP structures. Parylene × was shown to have barrier-like properties in contact with both Ta and Cu metallization using bias-temperature stress (BTS) measurements at 0.5 MV/cm and 150 °C. In a Cu/Ta/parylene X/ULK dielectric stack, Ta a carbide former, can be used as an adhesive layer linking Cu to parylene × or the organic-based surface since parylene × has barrier-like properties.

Mechanism of NBTI degradation in ultra deep submicron PMOSFET’s

The mechanism of negative bias temperature instability (NBTI) degradation in ultra deep submicron PMOSFET's is investigated. We mainly focus on the threshold voltage shift under subsequent positive bias temperature (PBT) stress after the preceding NBT. It's experimentally demonstrated that trapped holes from inversion channel and the diffusion of hydrogen molecules in the gate oxide are the major causes of NBTI degradation in PMOSFET's. When the condition is switched to PBT stress the trapped holes can be rapidly detrapped, but only a part of hydrogen molecules can diffuse back to the interface of gate oxide and substrate and repassivate silicon dangling bond, this is responsible for the threshold voltage being only partially recovered during PBT annealing.

Evidence for bulk trap generation during NBTI phenomenon in pMOSFETs with ultrathin SiON gate dielectrics

Negative bias temperature instability (NBTI) of pMOSFETs with direct-tunneling SiON gate dielectrics was studied in detail. By investigating the effects of applying positive gate bias on pMOSFETs after exposure to NBT stress, the generation of bulk charge traps in the gate dielectrics during NBTI was clearly demonstrated. In particular, it was found that a positive charge generated by negative bias temperature stress (NBT stress) can be neutralized and that the neutralized site can return to the positive state. We consider that the bulk trap is due to hydrogen atoms released from the interface between the SiON gate dielectric and the Si substrate (and this is what has conventionally been considered a positive fixed charge). Moreover, the bulk trap generation was shown to give rise to stress-induced leakage current.

H[sub 2]∕D[sub 2] Isotopic Effect on Negative Bias Temperature Instabilities in SiO[sub x]∕HfSiON∕TaN Gate Stacks

The degradation of Si/SiO x /HfSiON/TaN field effect transistors under negative bias temperature stress was investigated for devices annealed in H 2 /N 2 or D 2 /N 2 ambient. A clear H 2 /D 2 isotopic effect on device degradation was observed at low electric fields, typically below 5 MV/cm. The isotopic effect tended to disappear at higher electric field. These results are explained by assuming that fast interface states, which contribute significantly to device degradation at low electric fields, are related to the (dispersive) transport of H + or D + in the gate dielectric stack. Slow bulk traps, which are responsible for device degradation at high electric fields, are most likely not related to the transport/trapping of hydrogen species, but are rather induced by the trapping of holes injected from the channel during the electrical stress.

Characterization of low dielectric constant plasma polymer films deposited by plasma-enhanced chemical vapor deposition using decamethyl-cyclopentasiloxane and cyclohexane as the precursors

We investigated the properties of plasma polymer films deposited by plasma-enhanced chemical vapor deposition using a mixture of decamethyl-cyclopentasiloxane (C10H30O5Si5) and cyclohexane (C6H12) as the precursors, which we refer to as plasma polymerized decamethyl-cyclopentasiloxane: cyclohexane (PPDMCPSO:CHex) films. The relative dielectric constants, k, of the plasma polymer films were correlated with the Fourier transform infrared absorption peaks of the C–Hx, Si–CH3, and Si–O related groups. As the amount of the CHx species in the as-deposited plasma polymer films increased, the k value and the leakage current density of the thin films decreased. The subsequent annealing of the PPDMCPSO:CHex film at 400°C for 1h further reduced the k value to as low as k=2.05. This annealed PPDMCPSO:CHex thin film showed a leakage current density of the order of 4×10−7A∕cm2 at 1MV∕cm and a breakdown field of 6.5MV∕cm. Through the bias-temperature stress test, it was estimated that the PPDMCPSO:CHex film with a k value of 2.05 would retain its insulating properties for ten years at 167°C under an electrical field of 1MV∕cm, when it is presented as a layer adjacent to Cu∕TaN(10nm).

Bias-temperature instabilities and radiation effects in MOS devices

We report the combined effects of irradiation and bias temperature stress (BTS) on MOS capacitors with HfO/sub 2/ dielectrics. Irradiation is found to enhance BTS-induced degradation in these devices; significant differences in the amounts of enhancement are observed for different irradiation biases. Zero-bias or positive-bias irradiation followed by negative BTS (NBTS) leads to much worse degradation than either irradiation or NBTS alone. This is primarily due to the formation of dipoles during irradiation and the electrostatic repulsion of electrons from the oxide during NBTS. In an integrated circuit application, the worst-case response for these gate stacks will be pMOS transistors irradiated in their "off" states, and annealed in their "on" states. The effects of irradiation and BTS are also reported for Al/sub 2/O/sub 3/-based MOS capacitors with Al gates and SiO/sub 2/-based MOS capacitors with NiSi gates for comparison with HfO/sub 2/. Somewhat less sensitivity to combined irradiation and BTS is observed for the Al/sub 2/O/sub 3/-based devices, and significantly less sensitivity to combined effects is observed for the thermal oxides with NiSi gates.