Beam-lead Devices Research Articles

Silicon nanoelectronics and beyond: An overview and recent developments

This year marks the 40th anniversary of the invention of the first beam-lead device by Lepselter et al. Lepselter and coworkers proposed a method of fabricating a new semiconductor device structure and its application to high-frequency silicon switching transistors and ultra-high-speed integrated circuits. Beam-lead technology, also known as air-bridge technology, has established itself for its unsurpassed reliability in high-frequency silicon switching transistors and ultra-high-speed integrated circuits for telecommunications and missile systems. The beam-lead device became the first example of a commercial microelectromechanical structure (MEMS). Since its inception, MEMS has taken advantage of the evolving silicon technology, resulting in today’s nano-electromechanical structure and nano-optomechanical structure. In this paper, an overview of recent developments of silicon nanoelectronics is presented.

Component Verification System

Typical hybrid microcircuits (HMC's) manufactured at the Bendix Corporation, Kansas City, MO, contain 100 beam lead devices and gold ribbon crossovers. Verification for the presence of these applique components historically has been done manually by comparing a visual aid to the HMC. All HMC's were verified visually, a process requiring 4-5 min/HMC. Approximately 12 percent of the defects were missed. A system has been developed for automatically verifying the presence of beam lead devices and ribbon crossovers. The component verification system (CVS) includes a minicomputercontrolled X-Y stage which indexes the HMC below a vidicon camera. The camera is interfaced to the computer through a video digitizer. Bendix-developed software uses the equipment capabilities to magnify and project a 5.l-mm2 area onto a 177.8-mm2screen with the image data points addressable in a 512 by 480 line matrix. The image analysis software determines component presence based on data point brightness. The CVS can verify beam lead device and crossover presences on a typical. HMC in fewer than 30 s. The part identification of any missing part is printed as an aid to rework. The CVS has reduced the time needed for component verification and has improved verification accuracy.

Failure modes of beam-lead semiconductors in thin-film hybrid microcircuits : Jack H. Swafford. IEEE Trans. Parts, Hybrids, PackagingPHP-12 (4), 298 (December 1976)

Beam-lead semiconductor and passive devices have been utilized in hybrid microcircuits (HMC) to provide higher reliability. This is derived from the beam-lead device's improved bonding integrity plus the silicon nitride coating which reduces sensitivity to coritaminants; however, their size requires special handling techniqbes to prevent handling dam- age. Other failure modes exist such as cracked nitride, pinholes in the nitride, inadiquate plating, and smeared metallization. After two years of production usage totaling approximately 150 000 devices, The Bendix Corporation's Kansas City Divi- sion has compiled significant data on beam-lead devices includ- ing small-signal and power discrete semiconductors and digital integrated circuits. These failure modes are characterized and precautionary measures are described to minimize failures in HMC usage. .

Failure Modes of Beam-Lead Semiconductors in Thin-Film Hybrid Microcircuits

Beam-lead semiconductor and passive devices have been utilized in hybrid microcircuits (HMC) to provide higher reliability. This is derived from the beam-lead device's improved bonding integrity plus the silicon nitride coating which reduces sensitivity to contaminants; however, their size requires special handling techniques to prevent handling damage. Other failure modes exist such as cracked nitride, pinholes in the nitride, inadequate plating, and smeared metallization. After two years of production usage totaling approximately 150 000 devices, The Bendix Corporation's Kansas City Division has compiled significant data on beam-lead devices including small-signal and power discrete semiconductors and digital integrated circuits. These failure modes are characterized and precautionary measures are described to minimize failures in HMC usage.

Development of beam-lead RF integrated circuits : Arthur J. Kline and Arthur W. Kermode. Proc. Reliability and Maintainability Symposium. 28–30 January, 1975. Washington D.C. p. 349

This paper describes the design and development of a set of multifunction VHF/UHF integrated circuits aimed at providing a major improvement in spacecraft radio reliability through low stress operation and the processing of these circuits in beam-lead form. The methods evolved for the high frequency characterization of the devices are discussed together with the design of suitable test fixtures. Typical test results and the distribution of test parameters are presented. A unique carrier for beam-lead devices is described, and the need for such a device is discussed. The application of the carrier to device screening, burn-in and drift measurements is discussed together with the incentives for providing these capabilities. An overview of the integration of the devices into the spacecraft radio is given and candidate assembly processes are discussed. The technology impact of this approach upon future spacecraft radio systems is qualitatively examined.

An evaluation of techniques for bonding beam-lead devices to gold thick films : C. J. Dawes. Solid-State Technol. p. 23 (March 1976)

An evaluation of techniques for bonding beam-lead devices to gold thick films : C. J. Dawes. Solid-State Technol. p. 23 (March 1976)

Thermal characteristics of beam-lead chips : R. L. Gower. IEEE Trans. Parts, Hybrids PackngPHP-8, No. 2 (1972), p. 39

An experimental study of the thermal impedance characteristics of beam-lead chips is presented. A comparison of the thermal impedance of the 2N2222 and 2N3725 and the beam-lead equivalents of these devices is made. The beam-lead B2T2222 is used as a test vehicle to evaluate the effect of chip area, beam design, substrate temperature, and conformal coatings on the thermal impedance of beam-lead chips. Thermal impedance data for use in designing hybrid circuits with beam-lead devices are included.

Analysis and Development of a Thermocompression Bond Schedule for Beam Lead Devices

To obtain consistent and reliable beam lead device attachment by thermocompression bonding, it is necessary to determine an allowable range of bonding parameters over which the mechanical integrity of the device attachment is optimized. This paper discusses the practical considerations of beam lead wobble tool bonding, and describes the theoretical and experimental techniques which were used to establish the critical bonding variables. Using these techniques a bond schedule has been developed in terms of only two variables, bond force and interface temperature.

Beam-lead devices for hybrid integrated circuits : F. J. Francis, A. J. Russo and L. K. Keys. Solid State Technol., August (1971), p. 27

Beam-lead devices for hybrid integrated circuits : F. J. Francis, A. J. Russo and L. K. Keys. Solid State Technol., August (1971), p. 27

Thermal Characteristics of Beam-Lead Chips

An experimental study of the thermal impedance characteristics of beam-lead chips is presented. A comparison of the thermal impedance of the 2N2222 and 2N3725 and the beam-lead equivalents of these devices is made. The beam-lead B2T2222 is used as a test vehicle to evaluate the effect of chip area, beam design, substrate temperature, and conformal coatings on the thermal impedance of beam-lead chips. Thermal impedance data for use in designing hybrid circuits with beam-lead devices are included.

A method for testing and bonding beam-lead devices : P. Mallery, Proc. 1970 20th Electronic Components Conf., Washington, 13–15 May (1970), p. 557

A method for testing and bonding beam-lead devices : P. Mallery, Proc. 1970 20th Electronic Components Conf., Washington, 13–15 May (1970), p. 557

Heat transfer analysis of beam-lead transistor chip

The program package which is applicable to solve problems of heat transfer in transistors or integrated-circuit chips or in their stems has been developed with a three-dimensional lumped network model. The thermal resistances of beam-lead transistors calculated with this program are found to be in good agreement with the observed values. For the better design of beam-lead devices, thermal resistances are evaluated with this program for various geometries of the chips and for the passivation films of 1-micron thick SiO 2 , 2-micron SiO 2 , and 0.2-micron Al 2 O 3 or Si 3 N 4 on 1-micron SiO 2 . The results calculated indicate that the thermal resistance is mainly dependent on the thickness of electroplated Au in the beam-lead structure, and that the heat dissipation is especially sensitive to the distance, which is measured along the beam lead from the chip edge to the nearest end of the joining part of the beam lead to the metallized conductor on the ceramic stem.

Thermal impedance of ceramic packages using beam-lead IC chips : N. E. Hardsick, Proc. IEEE57, No. 9, September (1969), p. 1616

A three-dimensional analytical approximation for the thermal impedance of a beam-lead IC package is obtained by calcu- lating the thermal resistance of the individual elements and solving by the electrothermal analog technique. For a single chip package, thermal impedance values are presented for both a centrally located 0.005 inch diameter junction area and a source evenly distributed over the active surface of the chip under the following meunting condi- tions: a) package with external leads heat-oinked; b) package with ceramic base heat-sinked; c) chip thermally isolated on AI,O, sub- strate. Also, variations in the thermal impedance of the package with changes in the chip component dimensions are shown graphically. For arrays of beam-lead chips on small ceramic substrates, curves are presented for the upper and lower boundaries of maximum chip power as a function of the number of chips appliqued to the sub- strate. The results indicate that the relatively low power levels which are characteristic of most logic-type beam-lead devices create no thermal problems when packaged individually. However, for large chip arrays the ability of a particular substrate to dissipate the heat generated may be a limiting factor even for these seemingly insignificant power levels?

Thermal impedance of ceramic packages using beam-lead IC chips

A three-dimensional analytical approximation for the thermal impedance of a beam-lead IC package is obtained by calculating the thermal resistance of the individual elements and solving by the electrothermal analog technique. For a single chip package, thermal impedance values are presented for both a centrally located 0.005 inch diameter junction area and a source evenly distributed over the active surface of the chip under the following mounting conditions: a) package with external leads heat-sinked; b) package with ceramic base heat-sinked; c) chip thermally isolated on Al 2 O 3 substrate. Also, variations in the thermal impedance of the package with changes in the chip component dimensions are shown graphically. For arrays of beam-lead chips on small ceramic substrates, curves are presented for the upper and lower boundaries of maximum chip power as a function of the number of chips appliqued to the substrate. The results indicate that the relatively low power levels which are characteristic of most logic-type beam-lead devices create no thermal problems when packaged individually. However, for large chip arrays the ability of a particular substrate to dissipate the heat generated may be a limiting factor even for these seemingly insignificant power levels.

Thermal impedance of ceramic packages using beam-lead IC chips

A three-dimensional analytical approximation for the thermal impedance of a beam-lead IC package is obtained by calculating the thermal resistance of the individual elements and solving by the electrothermal analog technique. For a single chip package, thermal impedance values are presented for both a centrally located 0.005 inch diameter junction area and a source evenly distributed over the active surface of the chip under the following mounting conditions: a) package with external leads heat-sinked; b) package with ceramic base heat-sinked; c) chip thermally isolated on Al <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> substrate. Also, variations in the thermal impedance of the package with changes in the chip component dimensions are shown graphically. For arrays of beam-lead chips on small ceramic substrates, curves are presented for the upper and lower boundaries of maximum chip power as a function of the number of chips appliqued to the substrate. The results indicate that the relatively low power levels which are characteristic of most logic-type beam-lead devices create no thermal problems when packaged individually. However, for large chip arrays the ability of a particular substrate to dissipate the heat generated may be a limiting factor even for these seemingly insignificant power levels.

Air-gap isolated microcircuits—Beam-lead devices

The comparison of air-gap isolated integrated circuits with conventionally fabricated circuits shows the advantage of the "beam-lead concept." Utilizing the anisotropic etching properties of single crystalline silicon in the

Beam Lead Devices

Beam Lead Devices

Beam-lead devices and integrated circuits

Beam-lead devices and integrated circuits