Base-collector Capacitance Research Articles

Reduction of UHF power transistor distortion with a nonuniform collector doping profile

The linearity of a class-A, bipolar UHF power transistor is investigated. The device is intended for transmission of signals with multiple (TV) channels. Mixing between the various channels must be suppressed, which makes linearity an important parameter. This paper presents a novel approach, where process technology is specifically optimized to minimize distortion. It is shown that particularly the nonlinear collector-base capacitance strongly affects the linearity of this type of device. With a modified collector-base doping profile, the capacitance is manipulated. A nonuniform profile is introduced that significantly reduces third-order intermodulation. The profile consists of an arsenic doped spike that is grown epitaxially into the (otherwise) lightly doped collector. This reduces the bias dependence of C/sub cb/ and improves the tradeoff between linearity and breakdown or ruggedness. The reduction in third-order intermodulation is demonstrated both experimentally and by mixed-level MDS/MAIDS simulations.

A novel lateral bipolar transistor with 67 GHz f/sub max/ on thin-film SOI for RF analog applications

In this paper, a novel lateral bipolar transistor on thin film silicon-on-insulator (SOI) is presented. With a small emitter size of 0.12/spl times/3.0 /spl mu/m/sup 2/, low base resistance of 270 /spl Omega/ due to a novel Co silicided base electrode and low base-collector parasitic capacitances of 1.4 fF due to SOI material, it achieves the highest f/sub max/ of 67 GHz among SOI bipolar transistors. Also, the low emitter-base capacitance of 1.5 fF and the low collector-substrate capacitance of 2.5 fF are realized. The transistor has a simple structure, which is fabricated with simplified processes without any new sophisticated technologies, excluding trench isolation and epitaxial base used in current bipolar transistors. This can lower the fabrication cost of transistors. We have demonstrated the possibility of lateral bipolar transistor on thin film SOI as next-generation device for RF analog applications.

A new test structure for extracting extrinsic parameters in double-polysilicon bipolar transistors

A new test structure for parameter extraction is presented and implemented in a double-polysilicon bipolar junction transistor (BJT) process. The test structure is basically a real BJT, but without the intrinsic base. The test structure allows extraction of the base, collector and emitter impedances, and the extrinsic base-collector capacitance.

Scalable GaInP/GaAs HBT large-signal model

A scalable large-signal model for heterojunction bipolar transistors (HBTs) is presented in this paper. It allows exact modeling of all transistor parameters from single-finger elementary cells to multifinger power devices. The scaling rules are given in detail. The model includes a new collector description, which accounts for modulation of base-collector capacitance C/sub jc/ as well as for base and collector transit times due to temperature effects and high-current injection. The model is verified by comparison with measurements of GaInP/GaAs HBTs.

Linearity characteristics of GaAs HBTs and the influence of collector design

The linearity characteristics of GaAs heterojunction bipolar transistors (HBTs) are studied through measurement and analysis. Third-order intermodulation distortion behavior of HBTs is examined on devices with various epilayer designs and at various bias points, loads, and frequencies. Calculations from an analytical model reveal a strong bias and load dependence of third-order intercept point (IP3) on the nonlinearities from transconductance and the voltage dependence of base-collector capacitance. However, a simple model is not able to predict the fine details of IP3 with bias. A large-signal HBT model with an accurate description of the base-collector charge is shown to account for the measured trends. The base-collector charge function accounts for the modulation of base-collector capacitance with current, electron velocity modulation, and the Kirk effect (base pushout) for GaAs-based HBTs. A detailed study of the influence of collector design on linearity is also presented.

Submicron transferred-substrate heterojunction bipolar transistors

We report submicron transferred-substrate AlInAs/GaInAs heterojunction bipolar transistors (HBT's). Devices with 0.4-/spl mu/m emitter and 0.4-/spl mu/m collector widths have 17.5 dB unilateral gain at 110 GHz. Extrapolating at -20 dB/decade, the power gain cutoff frequency f/sub max/ is 820 GHz. The high f/sub max/, results from the scaling of HBT's junction widths, from elimination of collector series resistance through the use of a Schottky collector contact, and from partial screening of the collector-base capacitance by the collector space charge.

Collector-up SiGe heterojunction bipolar transistors

SiGe heterojunction bipolar transistors (HBTs) in a collector-up version have been built. This configuration has the advantage of a very low collector-base capacitance. In addition, because the substrate is the emitter, extremely low emitter series inductances may be achieved, e.g., in the case of packaged discrete devices. This is particularly interesting for RF power amplifiers. Transistors fabricated on MBE-grown layers with an emitter size of 1.6 /spl mu/m showed near-ideal Gummel plots, DC current gains of up to 485, an S/sub 21/ gain of 20 dB at 2 GHz and an f/sub max/ of 33 GHz. A problem to be solved is the large parasitic C/sub BE/ capacitance which degrades the transit frequency.

Modeling the bias of the dependence of the base-collector capacitance of power heterojunction bipolar transistors

This paper introduces a modified formulation for the minority charge of a recently published heterojunction bipolar transistor large-signal model that results in an accurate description of the base-collector capacitance bias dependence of power HBTs. The accompanying parameter extraction procedure determines the stored minority charge through simultaneous optimization of the cutoff frequency and the base-collector capacitance bias dependencies. The modified model results in accurate predictions of the HBT small- and large-signal characteristics over a wide range of bias, frequencies, and RF excitations.

Pulsed microwave characterization of an SiGe heterojunction bipolar transistor

This paper presents the first pulsed characterization of a silicon-germanium (SiGe) heterojunction bipolar transistor (HBT). Comparison is made of the SiGe HBT's performance to that of a Si bipolar junction transistor fabricated using the same mask set. Measurements made over a 400-/spl mu/s pulse show how device self-heating dramatically affects the microwave-frequency response of the devices. Using pulse-profiled S-parameters to find the intrinsic base resistance r/sub /spl pi// and base-collector capacitance C/sub jc/, plots reveal how these two elements significantly vary over the length of the pulse. The results emphasize the need for accurate characterization of microwave Si-based devices in pulsed applications.

Reduction of the base-collector capacitance in InP/GaInAs heterojunction bipolar transistors due to electron velocity modulation

The base-collector capacitance of an InP/GaInAs heterojunction bipolar transistor (HBT) was measured as a function of collector current and base-collector voltage. The experimentally obtained results were considerably smaller than the expected dielectric capacitance. For example, at a collector current density of 50 kA/cm/sup 2/ the value of the intrinsic C/sub bc/ was 33% less than the expected dielectric capacitance. A model that takes into account modulation of electron velocity in the collector depletion region by the base-collector voltage was employed to account for the experimental results. An arbitrary profile of the electron velocity in the collector, which accounts for the velocity overshoot effect, was assumed in developing this model. Excellent agreement was obtained with no fitting parameters. The model relates the change in C/sub bc/ to the variation of the collector delay time with base-collector voltage.

A 42-GHz ( fmax) SiGe-base HBT using reduced pressure CVD

A SiGe HBT having a f max higher than f T has been fabricated using a production CVD reactor which allows SiH 2Cl 2-based Si collector epi-growth at high rate as well as SiH 4-based SiGe base epi-growth at low rate. Transistor design together with process integration was focused on lowering the extrinsic base resistance and the collector-base capacitance. To this purpose, a TiSi 2 layer with a sheet resistance of 1.3 Ω/sq was used as a base electrode and a selectively implanted collector was utilized. For the base layer, an undoped-Si (300 Å)/p-SiGe (200 Å, N A=4.4×10 18 cm −3, linearly-graded Ge composition from 0 to 0.19)/undoped-Si 0.81Ge 0.19 (110 Å)/undoped-Si (300 Å) multilayer was deposited on a LOCOS-patterned wafer. In order to form the emitter-base junction and to activate the arsenic dopants in the polysilicon-emitter, rapid thermal annealing (RTA) at 900°C for 20 s was performed only one time so that outdiffusion of the boron in the base could be suppressed. The collector and base currents are shown nearly ideal. We obtained a f T of 37 GHz which is near the theoretical limit imposed by BV CEO and a f max of 42 GHz. The base resistance and the collector-base capacitance extracted from measured S-parameters have a value of 37 Ω and 27.2 fF, respectively.

Reduction of base-collector capacitance in InP/InGaAs HBT's using a novel double polyimide planarization process

The parasitic base-collector capacitance (C/sub BC/) in InP/InGaAs heterojunction bipolar transistors (HBTs) has been reduced using a novel double polyimide planarization process which avoids damage of the extrinsic base layer. The extrinsic base metal outside the base-collector mesa is placed on the polyimide by polyimide coating and etch-back to the base layer. We obtained f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> of 81 GHz and f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> of 103 GHz with a 2×10 μm emitter. Performance comparison between two devices with the same area of 2×2 μm but with different base-collector mesa area showed 56% reduction of C/sub BC/ and 35% increase of f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> and f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> .

Ultra-low-power and high-speed SiGe base bipolar transistors for wireless telecommunication systems

Ultra-low-power and high-speed SiGe base bipolar transistors that can be used in RF sections of multi-GHz telecommunication systems have been developed. The SiGe base and a poly-Si/SiGe base-contact were formed by selective growth in a self-aligned manner. The transistors have a very small base-collector capacitance (below 1 fF for an emitter area of 0.2/spl times/0.7 /spl mu/m) and exhibit a high maximum oscillation frequency (30-70 GHz) at low current (5-100 /spl mu/A). The power-delay product of an ECL ring oscillator is only 5.1 fJ/gate for a 250-mV voltage swing. The maximum toggle frequency of a one-eighth static divider is 4.7 GHz at a switching current of 68 /spl mu/A/FF.

ULTRAHIGH fmax AlInAs/GaInAs TRANSFERRED-SUBSTRATE HETEROJUNCTION BIPOLAR TRANSISTORS FOR INTEGRATED CIRCUITS APPLICATIONS

Transferred-substrate heterojunction bipolar transistors (HBTs) have demonstrated very high bandwidths and are potential candidates for very high speed integrated circuit (IC) applications. The transferred-substrate process permits fabrication of narrow and aligned emitter-base and collector-base junctions, reducing the collector-base capacitance and increasing the device f max . Unlike conventional double-mesa HBTs, transferred-substrate HBTs can be scaled to submicron dimensions with a consequent increase in bandwidth. This paper introduces the concept of transferred-substrate HBTs. Fabrication process in the AlInAs/GaInAs material system is presented, followed by DC and RF performance. A demonstration IC is shown along with some integrated circuits in development.

Si-implanted subcollector heterojunction bipolartransistors

AlGaAs/GaAs n-p-n heterojunction bipolar transistors (HBTs) fabricated using an Si-implant to form the subcollector followed by MOCVD growth of the remaining structure are demonstrated. The common emitter current gain of large test devices is /spl sim/50 at a collector current density of 1.9/spl times/10/sup 3/ A/cm/sup 2/. The base-collector and emitter-base current ideality factors are 1.08 and 1.26, respectively. Co-implantation with Se reduced the subcollector sheet resistance to 13 /spl Omega///spl square/. Patterning of this implanted subcollector results in a significant reduction of extrinsic base-collector capacitance (C/sub hc/).

Fabrication of heterojunction bipolar transistors with buried subcollector layers for reduction of base-collector capacitance by molecular beam epitaxy regrowth

A process for fabrication of heterojunction bipolar transistors (HBTs) with selectively buried subcollectors by molecular beam epitaxy (MBE) regrowth is described. This process can be used to reduce parasitic base-collector capacitance of HBTs and improve the speed of these devices. In situ etching by iodine prior to the regrowth was used for the first time to improve the quality of the substrate epilayer interface in a semiconductor device grown by MBE. The secondary ion mass spectroscopy depth profiles of regrown HBT structures suggest that the in situ surface cleaning by molecular iodine was not sufficient to remove all contamination from the substrate epilayer interface and that the microwave performance of HBTs fabricated by this process may have been affected by that contamination. The dc performance of devices which were fabricated by our process was not affected, however, by the contamination and was comparable to the dc performance of conventional HBTs. Our results suggest that the described process for fabrication of HBTs with selectively buried subcollectors by MBE regrowth would be feasible in conjunction with a more effective surface treatment.

Iodine and carbon tetrabromide use in solid source molecular beam epitaxy

We have studied CBr4 doping of GaAs and In0.53Ga0.47As up to 2×1020/cm3, of InxGa1−xAs across the composition range from x=0 to x=1, and of GaAs and In0.53Ga0.47As on the (211)A, (311)A, (511)A, (511)B, (311)B, and (211)B planes. These data show little evidence of self-compensation in C-doped GaAs, although carbon incorporation is more efficient on the Ga-rich (n11)A surfaces. In0.53Ga0.47As shows a similar dependence of carbon incorporation on surface orientation, and also exhibits self-compensation on the As-rich (n11)B surfaces and at In molar fractions x greater than about 0.7. We have made heterojunction bipolar transistors (HBTs) with abrupt emitter-base junctions and GaAs base layers doped to 1×1020/cm3 which have useful dc current gains, and have also used in situ iodine etching for regrowth over patterned subcollectors to make operating HBTs designed for reduced base-collector capacitance. Despite using CBr4 nearly exclusively as our p-type dopant in solid-source molecular beam epitaxy for more than five years and iodine for more than two years, we have observed no persistant degradation in doped or undoped material quality as measured by photoluminescence intensity, carrier mobility, or npn heterojunction bipolar transistor HBT current gain. Photoluminescence intensity and 77 K carrier mobility have gradually improved coincident with the introduction and continued use of iodine in our system, although there is no direct evidence of causality.

Small-scaled InGaP/GaAs HBTs with WSi/Ti base electrode and buried SiO/sub 2/

This paper describes the fabrication and characteristics of small-scaled InGaP/GaAs HBTs with high-speed as well as low-current operation. To reduce both the emitter size S/sub E/ and the base-collector capacitance C/sub BC/ simultaneously, the HBTs are fabricated by using WSi/Ti as the base electrode and by burying SiO/sub 2/ in the extrinsic base-collector region under the base electrode. WSi/Ti simplifies and facilitates processing to fabricate a small base electrode, and makes it possible to reduce the width of the base contact to less than 0.4 /spl mu/m without the large increase in the base resistance. The DC current gain of 20 is obtained for an HBT with S/sub E/ of 0.3/spl times/1.6 /spl mu/m/sup 2/ due to the suppression of emitter size effect by using InGaP as the emitter material. An HBT with SE of 0.6/spl times/4.6 /spl mu/m/sup 2/ exhibited f/sub T/ of 138 GHz and f/sub max/ of 275 GHz at I/sub C/ of 4 mA; and an HBT with SE of 0.3/spl times/1.6 /spl mu/m/sup 2/ exhibited f/sub T/ of 96 GHz and f/sub max/ of 197 GHz at I/sub C/ of 1 mA. These results indicate the great potential of these HBTs for high-speed and low-power circuit applications.

Intermodulation analysis of the collector-up InGaAs/InAlAs/InP HBT using Volterra series

The intermodulation (IM) distortion of the collector-up InGaAs/InAlAs/InP heterojunction bipolar transistor (HBT) is analyzed using Volterra-series theory. A T-equivalent circuit is used for this analysis. The contribution and interaction of four nonlinear elements: base-emitter resistance, base-emitter capacitance, base-collector capacitance, and common base-current gain are analyzed. For the particular device under investigation, it is found that the cancellation effect is not significant and the base-emitter resistance nonlinearity dominates the third-order IM.

A semianalytical parameter-extraction procedure for HBT equivalent circuit

A parameter-extraction approach for the heterojunction bipolar transistor (HBT), which combines the analytical approach and empirical optimization procedure, is developed. The extraction techniques for extrinsic base-collector capacitance and pad parasitics are also included in this approach. The cutoff operation of the HBT's is utilized to extract the values of the pad capacitances. An excellent fit between measured and simulated S-parameters in the frequency range of 50 MHz-36 GHz is obtained over a wide range of bias points.