Silicon Chip Research Articles

Skin, scalpel and the silicon chip: a systematic review on the accuracy, bias and data governance of artificial intelligence in dermatology, minimally invasive aesthetics, aesthetic, plastic and reconstructive surgery

Skin, scalpel and the silicon chip: a systematic review on the accuracy, bias and data governance of artificial intelligence in dermatology, minimally invasive aesthetics, aesthetic, plastic and reconstructive surgery

Monolithically integrated passive photonic silicon chip for nano-g level acceleration tri-axial detection

This paper proposes a nano-g level monolithically integrated tri-axial passive photonic accelerometer chip using uniform silicon-based micromachining with a low-frequency band. The silicon sensing units are designed with compact gradient-type and asymmetric S-type spring beams, allowing superior sensitivity in low-frequency band and tri-axial consistency. The spring-mass structures behave with uniform 460 μm thickness, significantly simplifying the silicon micromachining and improving process yield. A fiber-based Fabry-Perot interferometer (FPI) is utilized to retrieve the acceleration signal by demodulating optical phase change. In the operating bandwidth of 1 to 80 Hz, the sensitivity of the X-axial and Y-axial sensing units surpasses 43.6 dB with linear responses, while the Z-axial unit exhibits a sensitivity of over 42.8 dB. The average minimum detectable accelerations (MDAs) of the tri-axis directions are measured to be 21.80 ng/Hz1/2, 24.77 ng/Hz1/2, and 32.47 ng/Hz1/2, with the transverse crosstalk below 1.32%, 1.43%, and 2.07%, respectively. These results show that the proposed tri-axial photonic accelerometer is a perspective for detecting low-frequency acceleration vector signals.

Review of: "The growth rate of this industry is so high that as components become smaller, the number of transistors per unit area of ​​each semiconductor chip and nanochip has increased"

Review of: "The growth rate of this industry is so high that as components become smaller, the number of transistors per unit area of ​​each semiconductor chip and nanochip has increased"

Flexible Hybrid Integration Hall Angle Sensor Compatible with the CMOS Process

Silicon-based Hall application-specific integrated circuit (ASIC) chips have become very successful, making them ideal for flexible electronic and sensor devices. In this study, we designed, simulated, and tested flexible hybrid integration angle sensors that can be made using complementary metal-oxide-semiconductor (CMOS) technology. These sensors are manufactured on a 100 µm-thick flexible polyimide (PI) membrane, which is suitable for large-scale production and has strong potential for industrial use. The Hall sensors have a sensitivity of 0.205 V/mT. Importantly, their sensitivity remains stable even after being bent to a minimum radius of 10 mm and after undergoing 100 bending cycles. The experiment shows that these flexible hybrid integration devices are promising as angle sensors.

High-Peak-Power Sub-Nanosecond Laser Pulse Sources Based on Hetero-Integrated “Heterothyristor–Laser Diode” Vertical Stack

Compact high-power sub-nanosecond laser pulse sources with a wavelength of 940 nm are developed and studied. A design for laser pulse sources based on a vertical stack is proposed, which includes a semiconductor laser chip and a current switch chip. To create a compact high-speed current switch, a three-electrode heterothyristor is developed. It is found that the use of heterothyristor-based current switches allows the creation of a low-loss pump current circuit, generating short current pulses and operating the semiconductor laser in gain-switching mode. For the semiconductor laser chip, an asymmetric semiconductor heterostructure with a quantum-well active region is designed. The design of the emitting aperture of the laser chip is optimized to improve the operating characteristics of the laser beam when generating sub-ns optical pulses. It is shown that the transition to a monolithic emitting aperture design reduces the laser pulse turn-on spatial inhomogeneity, which is 90 ps over the entire range of optical powers studied. It is also demonstrated that by increasing the emitting aperture width to 400 μm, laser pulses with a peak power of 39.5 W and a pulse width at full width at half maximum (FWHM) of 120 ps can be generated.

Reduction of nonlinear distortion in condenser microphones using a simple post-processing technique.

In this paper, an approach for effectively reducing nonlinear distortion in single-backplate condenser microphones is introduced, i.e., most microelectromechanical systems (MEMS) microphones, studio recording condenser microphones, and laboratory measurement microphones. This simple post-processing technique can be easily integrated on external hardware such as an analog circuit, microcontroller, audio codec, digital signal processing unit, or within the Application Specific Integrated Circuit chip in a case of MEMS microphones. It effectively reduces microphone distortion across its frequency and dynamic range, and relies on a single parameter, which can be derived from either the microphone's physical parameters or a straightforward measurement presented in this paper. An optimal estimate of this parameter achieves the best distortion reduction, whereas overestimating it never increases distortion beyond the original level. The technique was tested on a MEMS microphone. The findings indicate that for harmonic excitation, the proposed technique reduces the second harmonic by approximately 40 dB, leading to an effective reduction in the total harmonic distortion. The efficiency of the distortion reduction technique for more complex signals is demonstrated through two-tone and multitone experiments, where second-order intermodulation products are reduced by at least 20 dB.

Thermal management enhancement of electronic chips based on novel technologies

Thermal management enhancement of electronic chips based on novel technologies

Enhanced in-glass nonlinear optical modulation by coupling thin ENZ film with a femtosecond laser-written skimming waveguide

Glass-based photonic and electronic chips are attractive due to the high transparency, strong mechanical strength and biocompatibility of such substrates, or where low-loss connections to fiber-optic networks are required. However, efficient nonlinear optical modulation is difficult to achieve in ordinary silicate glass substrates, due to their inherent small optical nonlinearity in the broadband transparency window. In this paper, by integrating low-loss skimming waveguides using femtosecond laser pulses, we report a general strategy to significantly enhance the nonlinear response of glass photonic circuits based on the evanescent-coupling of an epsilon-near-zero (ENZ) thin film with the skimming waveguides. The fabricated device exhibits flexible tuning of absorptive optical nonlinearity between saturable absorption and reverse saturable absorption. This work provides what we believe to be a new method for optical switches and modulators that could offer potential solutions for 3D high-density photonic integration with dynamic programmability.

Bioinspired Superwettability Surface Strategies for Condensation Heat Transfer.

Along with the development of miniaturization, integration, and high power of electronic chips in the 5G and artificial intelligence era and their urgent need for technologies enabled to solve high heat flux dissipation in limited space, investigating bioinspired extreme superwettability surfaces with high-efficiency condensation heat transfer (CHT) performance has attracted great interest in academic and industrial communities. Compared with filmwise condensation of flat hydrophilic surfaces featured with continuous liquid films, dropwise condensation of flat hydrophobic surfaces is a more efficient type of energy transport way. However, discrete condensate drops can only shed off the hydrophobic flat surfaces under gravity until their sizes reach the capillary length of liquid, e.g., 2.7 mm for water. Clearly, these millimeter-sized large drops are adverse to efficient CHT because they have not only a large thermal resistance but also a slow renewal frequency. In principle, more efficient CHT can be achieved by engineering micro/nanostructure surfaces with extreme superwettability to obtain more circularly released nucleation sites and timely removal of condensate at smaller sizes. Inspired from nature, great breakthrough has been made in high-efficiency CHT proofs of concept based on various bioinspired superwettability surfaces, including condensate microdrop-jumping superhydrophobic surfaces mimicking cicada wings, superhydrophobic hybrid surfaces mimicking desert beetles, and superhydrophilic surfaces mimicking plant leaves. In this Perspective, we briefly summarize their latest progress and respective issues. Based on this, we envision the possible challenges and development trends of superwettability micro/nanostructure surfaces in the near future, especially emphasizing their practical application in high-performance phase-change devices for chip cooling.

Unveiling the complex morphologies of sessile droplets on heterogeneous surfaces

Droplets exhibiting a myriad of shapes on surfaces are ubiquitous in both nature and industrial applications. In high-resolution manufacturing processes, e.g., semiconductor chips, precise control over wetting shapes is crucial for production accuracy. Despite the high demand for describing droplet wetting shapes and their transformations across a wide range of applications, a robust model for precisely depicting complex three-dimensional (3D) wetting droplet shapes on heterogeneous surfaces remains elusive. Herein, we fill this gap by developing a universal, high-precision model that accurately describes wetting shapes, including those with polygonal baselines and irregular footprints. Our model reveals the intricate wetting morphologies beyond the classic Young’s law and Cassie-Baxter-Wenzel models. Besides, it aligns quantitatively with physical simulations for various droplet volumes. This work provides a potential method to achieve highly complex morphologies of droplets via low-cost beforehand design of the surfaces, thereby opening up potential applications in 3D printing, printed electronics, and microfluidics.

Ultrasonic vibration-assisted scribing of sapphire: effects of ultrasonic vibration and tool geometry

In recent years, semiconductors, electronics, optics, and various other industries have seen a significant surge in the use of sapphire materials, driven by their exceptional mechanical and chemical properties. The machining of sapphire surfaces plays a crucial role in all these applications. However, due to sapphires’ exceptionally high hardness (Mohs hardness of 9, Vickers hardness of 2300) and brittleness, machining them often presents challenges such as microcracking and chipping of the workpiece, as well as significant tool wear, making sapphires difficult to cut. To enhance the machining efficiency and machined surface integrity, ultrasonic vibration-assisted (UV-A) machining of sapphire has already been studied, showing improved performance with lower cutting force, better surface finish, and extended tool life. Scribing tests using a single-diamond tool not only are an effective method to understand the material removal mechanism and deformation characteristics during such UV-A machining processes but also can be used as a potential process for separating IC chips from wafers. This paper presents a comprehensive study of the UV-A scribing process, aiming to develop an understanding of sapphire’s material removal mechanism under varying ultrasonic power levels and cutting tool geometries. In this experimental investigation, the effect of five different levels of ultrasonic power and three different cutting tool tip angles at various feeding depths on the scribe-induced features of the sapphire surface has been presented with a quantitative and qualitative comparison. The findings indicate that at feeding depths less than 6 μm, UV-A scribing with 40–80% ultrasonic power can reduce cutting force up to 50% and thus improve scribe quality. However, between feeding depths of 6 to 10 μm, this advantage of using ultrasonic vibration gradually diminishes. Additionally, UV-A scribing with a smaller tool tip angle (60°) was found to lower cutting force by 65% and improve scribe quality, effectively inhibiting residual stress formation and microcrack propagation. Furthermore, UV-A scribing also facilitated higher critical feeding depths at around 10 μm, compared to 6 μm in conventional scribing.

Medical student training with next-generation handheld ultrasound devices – hands on examination of fetal biometry in obstetrics

IntroductionThe technical development of ultrasound devices based on silicon chips has revolutionized ultrasound examinations, leading to the implementation of these portable handheld devices (PUD) in different medical fields. However, training on these devices is necessary to assure appropriate use and ensure valid results. While training programs for the use of conventional standard ultrasound devices (SUD) have been described, no training program for these handheld devices has been developed thus far.MethodsA training program for obstetric ultrasound examination was modified through the addition of an extra module focusing on the use of these PUDs. After the module the students had to attend an OSCE in which their skills of using the PUD and the SUD were tested and analyzed by applying the agreement rate, the intraclass correlation coefficient (ICC) and Bland–Altman plots. Furthermore, the students’ ultrasound results were compared with those of trained physicians by employing the one-sample Student's t-test. After the OSCE, the students answered a survey regarding their experience and their expected use of these devices.ResultAn agreement of one hundred percent was reached for basic parameters such as fetal position, placental position, fetal heartbeat and for the classification of the amniotic fluid. The ICC showed a good to moderate agreement between the results of fetal biometry achieved by SUD and PUD. The T-test results confirmed a high reliability between the physicians’ results and the students’ results, independent of the used device. The students remarked a good handling of the ultrasound devices and supported the use in their future specialties.DiscussionThe reliability between the examinations using the SUD and PUD were high but lower than the results observed for trained physicians. Therefore, the implementation of an additional module for portable ultrasound teaches the students to reliably examine basic obstetric parameters and provides a solid basis for further training and improvement of ultrasound skills in use of PUD.

Electronic Components Detection Using Various Deep Learning Based Neural Network Models

Electronic components of different sizes and types can be used in microelectronics, nanoelectronics, medical electronics, and optoelectronics. For this reason, accurate detection of all electronic components such as transistors, capacitors, resistors, light-emitting diodes and electronic chips is of great importance. For this purpose, in this study, an open source dataset was used for the detection of five different types of electronic components. In order to increase the amount of the dataset, firstly, data augmentation processes were performed by rotating the electronic component images at certain angles in the right and left directions. After these processes, multi-class classifications were performed using five different deep learning based neural network models, namely Vision Transformer, MobileNetV2, EfficientNet, Swin Transformer and Data-efficient Image Transformer. As a result of the electronic component detection processes performed with these various deep learning based models, all necessary evaluation metrics such as precision, recall, f1-score and accuracy were obtained for each model, and the highest accuracy value result was obtained as 0.992 in the Data-efficient Image Transformer model.

New Properties of Phosphorus to Zinc Elements - Exploration of Energy Conversion Characteristics Based on Electromagnetic Signal Transmission in Semiconductor Devices

This study aims to explore novel properties of phosphorus (P) to zinc (Zn) elements. On the basis of previous work, we have explored the properties of elements ranging from H to Si. And the chemical elements belong layered, with P to Zn defined as the fourth layer to be researched using a contemporary industrial perspective. Since the late 19th century, there has been a progression in the application of electricity and magnetism to motor technology, leading to the evolution of computer systems capable of receiving, processing, and displaying external signals. These functionalities are recognized as attributes of the P element, serving as sensor modules for energy conversion. Subsequently, the establishment of a global production system through the utilization of the Internet and the Internet of Things has facilitated the growth of the biomedical industry within a vast industrial framework. This framework is characterized as the essence of the S element, functioning as an amplifier module for energy conversion. These 16 elements perform higher-level functions and can be seen as various processes for energy conversion in electromagnetic equipment, exemplified by biological signal transduction. They correspond to semiconductor chip fields such as from sensors and amplification circuits to displays and printing. This exploration is poised to enhance comprehension of the distinctive properties inherent in these elements.

Influence of carbon-based hybrid nanofluids (GnP + MWCNT/H2O) on the heat transfer and entropy generation analysis for electronic cooling applications: an experimental study

The present article examined the thermophysical characteristics of functionalized carbon-based hybrid nanomaterials dispersed in H2O and EG, and studied the optimal combination for cooling electronic chips in a heat sink. Nanomaterials selected were functionalized graphene nanoplatelets (f-GnP) and multiwalled carbon nanotubes (f-MWCNT) mixed in the ratio of 1:1. The carbon-based hybrid nanofluids have been produced by a 2-step technique with vol% ranging from 0.1% to 1%. The thermophysical properties of carbon-based hybrid nanofluids were examined with standard techniques for the temperatures of 20 °C–60 °C in steps of 10 °C. The improvement of ∼100% and 246% for H2O-based hybrid nanofluids in thermal conductivity and thermal diffusivity was detected, while it was ∼95% and 152% for EG-based hybrid nanofluids at 1 vol%. The H2O-based hybrid nanofluids were advantageous in the laminar region for the entire vol% from the predicted effectiveness. Furthermore, the best-performing H2O-based hybrid nanofluids were studied in a microchannel heat sink for electronic cooling applications where Nu enhances by ∼47% at 200 W heat input. No work had been reported so far on the investigation of heat transfer characteristics and the entropy generation rate of carbon-based hybrid nanofluids in a microchannel heat sink, which shows the potential in the novelty of the current study. The addition of 0.2 vol% hybrid nanomaterials could be optimum for enhancing the effectiveness of microchannel heat sinks by enhancing the heat transfer phenomenon, which was evident from the performance evaluation coefficient and thermal entropy generation rate.

Aerosol Jet Printing for Three Dimensional Interconnects

Electrical connections between IC chips and printed circuit boards are typically accomplished by wire bonding. Although a mature technology, wire bonds have limitations due to increased package size, potential for damage during handling, and parasitic inductance which limits high frequency performance. With conformal interconnects, the electrical connections are printed with nanoparticle inks and then heated form solid conductive wires up the sidewall of die. Many advantages result including low profile, ultra thin connections, and high density packages. Unlike wire bonds, printed interconnects can be geometrically tailored to optimize impedance matching, with resulting frequency performance exceeding 90 GHz. Aerosol Jet® is a non-contact printing approach that when combined with multi-axis motion can print both metals and dielectrics in 3D multilayer geometries. The specific presentation will include results of high density gold interconnects, with 25 µm/25 µm line/space, between silicon bare die and alumina substrate. The first step is to print a dielectric fillet over the vertical die edge and junction with alumina. The fillet serves to insulate the die sidewall and form a mechanical buffer layer to match the thermal expansion of the Si, Alumina, and gold. Polyimide is preferred for its high working temperature (~250C) and capability to withstand thermal cycling to cryogenic temperatures. After curing the PI, nano-gold traces are printed between bond pads of the alumina and I/O on the die surface. The nano-gold can be sintered in an oven at 200C or laser sintered in situ to produce interconnect resistances below 1 Ohm.

Chip warpage and stress analysis in power modules of different substrate configurations

Purpose This paper aims to use rigorous finite element simulations to investigate the impact of different substrate systems on the warpage behavior of silicon (Si) chips of power modules exposed to thermal loading. Design/methodology/approach Three common substrate systems: direct copper bonded (DCB), insulated metal substrate (IMS) and printed circuit board (PCB) configurations examined. In addition, three lead-free bonding materials: silver-tin transient liquid phase (TLP), sintered silver (Ag) and sintered copper (Cu). This results in nine assembly configurations. Finite element models of the electronic modules are developed using ANSYS to apply thermal loads from room temperature to 250°C to induce deformations, strains and stresses in the electronic structure. Accordingly, the silicon chip deformations and maximum principal stresses of each assembly configuration are thoroughly examined. Findings The results indicate that DCB-based power modules markedly reduce Si die warpage and maximum principal stresses, suggesting enhanced resistance to thermal loads. In contrast, IMS systems exhibit the highest levels of die warpage and out-of-plane deformation. PCB substrates, however, induce the highest maximum principal stress values in the silicon die, potentially leading to accelerated crack initiation and propagation. While the die attach system has a minimal effect on die warpage, the silver-tin TLP bonds generate significantly higher die stresses compared with sintered Ag and sintered Cu, which both result in reduced stresses. Originality/value Power electronics exceptionally rely on ceramic-based and polymer-based substrate systems due to their superior thermal conductivity, heat resistance and electrical insulation properties. The strategic selection of substrate structures can significantly enhance the robustness of power. Ultimately, the findings of this research provide valuable insights for the design of highly reliable and efficient power modules subjected to thermal stress.

High Density Organic Substrates for Chiplet Technologies

The industry’s increasing demand for high-performance electronic devices with better functionality, lower power consumption and higher speed is driving innovation in advanced packaging technology. Improving semiconductor chip performance and advancing package characteristics are critical. These ever-increasing demands on electronic systems have led to the current trend of increasingly relying on so-called chiplets instead of individual chips. In detail, this means that individual silicon building blocks or functional units, which can also be developed and manufactured independently of each other, are combined to form a very powerful overall system. These then find application, for example, in neural networks or advanced driver assistance systems, and generally in all types of AI systems. Since miniaturization of the semiconductor chip is a major challenge, minimizing the wiring length in the package by using denser and thinner interconnects is crucial. The high number of inputs and outputs (I/O) in these high-density packages reduces the structural size of lines and spaces (L/S), and the quality of interconnection of these fine spaces can drastically affect the performance of the device. This paper presents the development of the required technology blocks for high-density redistribute layers needed to realize such organic substrates. The technology approach used is an advanced semi-additive processing (aSAP) at large panel level. This technology involves the use of dielectric layers, such as ABF or similar, PVD seeding and additive electrolytic copper deposition. The following various interconnect blocks required are discussed in detail: Vertical interconnects can be made by laser drilling, lithography when photo-imageable dielectrics are used, or plasma with reactive ion etching (RIE). The process options and limitations are discussed in detail. Horizontal interconnects are fabricated by seeding, photo-imaging of plating masks and subsequent copper deposition, and resist and seed removal. Photo-imaging is an important process step in this process. The evolution towards line and space structures targeting 5µm and further to 2µm on large panels up to 610x457mm² is described in detail. Finally, first electrical test data and the resulting process yield for different structure sizes are presented and discussed.

A Review of the Application and Development of Ultra-thin Silicon Chips

The widespread applications of ultra-thin silicon chips across industries such as healthcare, telecommunications, automotive, artificial intelligence, and energy management underscore their pivotal role in driving technological advancements and societal progress by enhancing efficiency, sustainability, and overall performance in various electronic systems. This paper provides an in-depth review of the application and development of ultra-thin silicon chips in modern electronic technology. Ultra-thin silicon chips, characterized by small size, low power consumption, and efficient heat dissipation, offer significant advantages over traditional chips in various electronic products such as smartphones, tablets, and smart wearable devices. The paper discusses the basic principles, fabrication methods, and advantages of ultra-thin silicon chips, highlighting their potential applications in emerging fields like artificial intelligence and the Internet of Things. Furthermore, the paper explores the evolving trends in ultra-thin silicon chip manufacturing technology, emphasizing advancements in nano-technology applications and intelligent manufacturing practices. The diverse applications of ultra-thin silicon chips across industries such as healthcare, telecommunications, automotive, artificial intelligence, and energy management underscore their pivotal role in driving technological advancements and societal progress

Advanced Speckle Wavemeter Based on a Silicon Chip

Advanced Speckle Wavemeter Based on a Silicon Chip