This paper presents a CMOS millimeter-wave (mm-wave) receiver designed to meet the challenges in low-power, ultra-broadband, phased-array systems with a large number of array elements. This receiver employs a high intermediate-frequency (IF) heterodyne architecture to reduce the frequency and power consumption associated with distributing a local oscillator (LO). The receiver operates over a bandwidth of 51–71 GHz, while maintaining 20 GHz of bandwidth along the signal chain of the entire mm-wave front end, through a high-IF stage, and to the baseband output. To maintain a high fractional bandwidth (fBW) throughout the signal chain, this receiver employs multiple gain-equalized transformers . Receiver measurements show an overall flat bandwidth response of 20 GHz, with a total gain of 20 dB, a minimum double-sideband noise figure of 7.8 dB, and an input 1 dB compression power of $- 24 \text{dBm}$ while consuming 115 mW from a 1.1 V supply. The test chip, implemented in a six-metal layer 40 nm CMOS process, occupies an area (including pads) of $1.2 \text{mm}^{2}$ .
Read full abstract