Band Gap Of Silicon Carbide Research Articles

Impact of carbon injection in 4H-SiC on defect formation and minority carrier lifetime

Point defects in silicon carbide (SiC) can act as charge carrier traps and have a pronounced impact on material properties such as the mobility and carrier lifetime. Prominent among these traps is the carbon vacancy (VC) with a demonstrated detrimental effect on the minority carrier lifetime in 4H-SiC epitaxial layers. Hence, a variety of methods for VC removal have been proposed. Common to all is that they involve some sort of C-injection into the epi-layer that leads to annihilation of VC with C interstitials (Ci) via the reaction Ci＋ VC→0̸. However, many studies on injection of Ci for removal of VC do not take into account the potential effect of any additional defects that are formed as a result of excess C in the material, including electrically active defects that introduce energy levels in the SiC band gap. Herein, we study the formation and impact of carbon related defects that are introduced in 4H-SiC epi-layers by injection of excess carbon. C-injection is achieved by annealing 4H-SiC epi-layers covered by a graphitized photoresist known as a C-cap at 1250°C for different durations. The resulting appearance of defects in the samples is monitored using deep level transient spectroscopy (DLTS) and minority carrier transient spectroscopy (MCTS) measurements, which reveal the formation of both minority and majority carrier traps as a result of the C-injection. Intriguingly, the injected carbon is also found to interact with a perennially present impurity in 4H-SiC epi-layers and a potentially lifetime limiting defect, namely boron. Furthermore, we monitor the minority carrier lifetime as a function of C-injection time and depth from the surface using cross-sectional time-resolved photoluminescence (TRPL) measurements. Both the defect distributions and the minority carrier lifetime are found to depend strongly on the duration of the C-cap anneal, with a marked depth dependence being present for all samples studied. The moderate temperature C-cap annealing treatment is proposed as a method for enhancing the carrier lifetime in n-type 4H-SiC epi-layers for power device applications.

A Simulator for Investigation of Breakdown Characteristics of SiC MOSFETs

Breakdown characteristics play an important role in silicon carbide (SiC) power devices; however, the wide bandgap of SiC poses a challenge for numerical simulation of breakdown characteristics. In this work, a self-developed simulator employing a novel numerical processing method to prevent convergence issues, based on semi-classical transport models and including several kinds of mobility, generation and recombination models, is used to investigate the performance and breakdown characteristics of 4H-SiC MOSFETs in high-power applications. Good agreement between our simulator and an experiment and commercial TCAD was achieved. The simulator has good stability and convergence and can be used as a powerful tool to design and optimize semiconductor devices. Further, the breakdown characteristics are evaluated with different factors, including lattice temperature, device structure and doping profiles. Our results show that the doping profile plays the most important role in the breakdown voltage, followed by the device structure, while the impact of lattice temperature is found to be minimal.

Evaluation of antiparallel SiC Schottky diode in SiC MOSFET phase-leg configuration of synchronous rectifier

The MOSFET synchronous rectification (SR) is widely used to reduce the conduction loss during the freewheeling period. Due to the wide band gap of silicon carbide (SiC), the intrinsic body diode of SiC MOSFET exhibits a high voltage drop. Therefore, SiC Schottky diodes (SBD) and SiC MOSFETs are usually used in reverse parallel to reduce power loss. However, the increase of equivalent junction capacitance due to the addition of an external SiC SBD could bring larger turn-on current on opposite power transistor of the phase-leg. Furthermore, as the parasitic inductance associated with layout hinders the prompt transfer of current between SiC SBD and body diode, the external SiC SBD cannot be fully utilized, and it may deteriorate the overall performance, especially at heavy load. We comprehensively compare power losses when SiC SBD are antiparallel or not, at different working conditions, including different layout compactness, load current and dead time. It’s hard to get the effect of loss reduction loss when add antiparallel SiC SBD due to the parasitic inductance induced by the layout. The results can provide a guidance to properly select SiC SBD in a phase-leg configuration under SR mode for freewheeling during the dead time.

Near Ultraviolet Photoresponse of a Silicon Carbide and Tantalum Boride Heterostructure

Silicon carbide (SiC) is widely used in abrasives, heating devices, light emitting diodes and high-power electronics, because of its unique physical-chemical properties including high hardness, high melting point, excellent thermal conductivity, and wide bandgap. In recent years, its color centers have also been used as potential sources of single photons. Given that borides and carbides are refractory materials, we decided to study a heterostructure formed by an n-doped silicon carbide substrate and a layer of tantalum monoboride (TaB) for near ultraviolet (UV) photodetection. It is shown that the addition of TaB creates a rectifying device that can handle currents higher than 300 mA, showing its potential for high-power optoelectronic devices. The detector also has a high responsivity of 2.9 A/W at the free-space wavelength of 405 nm and a fast frequency response of 610 kHz. The high performance of the detector is attributed to the high thermal and electrical conductivity, large bandgap of SiC, and its moderately close match in atomic arrangement with TaB. Such heterostructure offers a simple method to produce high-performance near UV photodetectors operating under hard conditions such as high power, high temperature and work in corrosive or oxidizing environments.

Thermal Simulations of a New SiC Detector Design for Neutron Measurements in JSI Nuclear Research Reactor

Today, to respond to the increase of development of accurate, precise and relevant experiments in nuclear research reactors and tokamaks with their severe and intense operating conditions, there is a major need of innovative sensors that can accurately measure key parameters such as neutron and photon fluxes or nuclear heating rates. Thus, innovation in the field of nuclear instrumentation and measurements is a privileged research topic. It is crucial to develop optimized devices for accurate on-line in-core measurements, and scientific/technological requirements for various applications such as ageing of materials, safety applications, beam monitoring or nuclear physics. Nowadays, more and more semiconductors are used as sensor materials in nuclear instrumentation to measure various kinds of nuclear radiations. Silicon Carbide (SiC) is among them. In fact, SiC detectors could be used for the on-line measurement of key quantities such as neutron (thermal and fast) and photon fluxes. One main challenge is to enlarge the measurement range of this detector type. The work presented in this paper deals with this aim. Firstly, an introduction dedicated to the use of SiC versus other wide bandgap semiconductors and the characteristics of the studied sensor is shown. Secondly, this paper presents 3D numerical results obtained with a parametrical thermal study of the SiC detector using COMSOL Multiphysics code for a nuclear heating range corresponding to TRIGA nuclear research reactor conditions (integral neutron flux ~2.0 x1013 n·cm‑2·s-1 leading to a nuclear heating rate of 0.25 W·g-1 in Tungsten). The main objective is to adapt and optimize the design and the housing of the detector by determining its temperature field for different configurations. The influence of various parameters is presented such as that of the housing material nature, the gas nature around the diode, the gas-gap height and the housing thickness.

Study on the Effect of Phosphorus Doping on Nano-SiC Structure

The short-wavelength emission of nano-silicon carbide has long been confirmed. It is an ideal material for making short-wavelength light-emitting and optoelectronic devices. However, due to the relatively large band gap of silicon carbide, it is generally greater than 2eV. In the ideal case of chemical ratio, the energy band formed by the outer electrons of the atom is full, the conduction band is empty, and the Fermi energy level is in the forbidden band. In this paper, n-type nano-SiC films are prepared by P in-situ doping technology, and the structure of n-type silicon carbide with different doping ratios is analyzed.

Silicon carbide planar junctionless transistor for low-medium voltage power electronics

This paper proposes a Silicon Carbide (SiC) based planar junctionless transistor (JLT), designed and simulated for low to medium power electronic applications, with a calibrated deck of SiC parameters. The simple structure of this device avoids the fabrication complexity associated with intricate junction geometries of vertical power devices and growth challenges of lateral heterostructure ones. Because of the wide bandgap (WBG) of SiC, the device exhibits a breakdown voltage of 100 V at channel length of 0.1 μm, which may be enhanced, at the cost of operating speed, by increasing the channel length. Compared to commercial enhancement-mode GaN (e-GaN) devices with similar breakdown voltage specification, the proposed device offers lower specific on-resistance (R on,sp ), and a significant reduction in capacitance due to its naturally self-aligned structure, leading to higher operating speed concluded from the mixed-mode simulations.

Stackable SiC-Embedded Ceramic Packages for High-Voltage and High-Temperature Power Electronic Applications

Abstract This study encompasses the development of a high-voltage and high-temperature–capable package for power electronic applications based on the embedding of silicon carbide (SiC) semiconductor devices in the ceramic circuit carrier such as the direct bonded copper (DBC) substrate. By sealing semiconductor devices into DBC substrates, high temperature, high voltage, and high current capability as well as high corrosion resistance can be achieved compared with the state-of-the-art printed circuit board (PCB) embedding technology. The power devices are attached with high-temperature stable solder and sinter material and are surrounded by thermal conductive ceramic and high-temperature–capable potting materials that enable the complete package to operate at 250°C or above. Furthermore, the single embedded packages can be stacked together to multilevel DBC topologies with increased voltage blocking characteristics. Thus, current limits of the PCB and low-temperature cofired ceramic–based multilayer solutions are exceeded and will be confirmed in the course of this study. This package is designed to carry out the maximal performance of SiC and future wide bandgap devices. It is a promising solution not only for applications in harsh ambient environments such as aerospace and turbine, geothermal well logging, and downhole oil and gas wells but also for hybrid electric/electric vehicle and energy conversion.

Galvanic and Capacitive Effects in n-SiC Conductivity Compensation by Radiation-Induced Defects

JBS diodes based on 4H-SiC irradiated with electrons and protons are studied. This is carried out by using the methods of capacitance–voltage and current–voltage characteristics. It is concluded that, for both kinds of irradiation, deep centers are formed in the upper half of the band gap of silicon carbide. This leads to a sharp decrease in the concentration of ionized carriers in the conduction band and to an exponential increase in the resistance of the base regions of the structures under study.

(Invited) Growing Large Diameter 4H SiC Boules – Furnace, PVT Growth and Characterization

Silicon carbide (SiC) is a semiconductor material which is replacing and outperforming the conventionally used silicon crystal in power applications. The wide bandgap of SiC results in a low leakage current even at high temperatures. SiC single crystals are also becoming popular as Mossanite gem stones competing with diamond because of their excellent brilliance and other properties. However, at present, the production of large size and high quality 4H SiC single crystals is limited to a few industrial entities worldwide. The seeded physical vapor transport (PVT), commonly known as the modified Lely method, which exploits the sublimation at above 1800°C is the only proven method for the industrial production of SiC boules. However, fabrication of the PVT system for the growth of SiC is highly instrumentation oriented, and also due to its commercial importance, the know-how, and technical details are scarcely available in the literature. The complexity is due to the fact that the operating temperatures are extreme (2100–2500°C) and monitoring and controls are difficult. The growth process occurs in a nearly air-tight graphite crucible and it is not feasible to observe the growing boule or determine experimentally the exact thermal conditions in the growth zone due to high operating temperatures and the opacity of the graphite crucible. Seed mounting technologies are critical, and it is still kept as the industry secret. It is difficult to control the radial gradients when the diameter reaches close to 6 inches or beyond. With full modeling knowledge as well as outstanding expertise in equipment and the process technology, Aymont has developed precisely controllable SiC growth systems and process for growing large boule with independently controllable axial as well as radial gradients. The technical details on the design and fabrication of the SiC PVT system, hot zone, modeling, crystal growth and characterization results are presented.

Nanoindentation-induced phase transformation between SiC polymorphs

Nanoindentation-induced phase transformation between silicon carbide (SiC) polymorphs has been investigated by a combined study of transmission electron microscopy and first principles calculations. In situ nanoindentation of 4H-SiC single crystals revealed the occurrence of a phase transformation from 4H to 3C in the vicinity of a crack. First principles calculations pointed out an extremely low energy barrier for this phase transformation, which could be attributed to the very smooth transition in the atomic and electronic structures across the 3C/4H interface. The phase transformation from 4H to 3C may retard the propagation of cracks and reduce the band gap of SiC.

Comparison of SiC Voltage Source Inverters Using Synchronous Rectification and Freewheeling Diode

For power converters with inductive loads, a freewheeling path is needed for the current due to reactive power. The MOSFET synchronous rectification (SR) is widely used to reduce the conduction loss during the freewheeling period. Due to the wide band gap of silicon carbide (SiC), the intrinsic body diode of SiC MOSFET exhibits a high voltage drop. Hence, an antiparallel SiC Schottky diode is normally implemented to eliminate its conduction. However, the external SiC Schottky diode is not fully utilized as it only works during the dead time. In this paper, the hard-switching SR is investigated in an SiC three-phase inverter and compared with a conventional inverter using freewheeling diode (FWD). An improved power loss model for the two inverters has been developed. It is found that the inverter using SR has higher efficiency due to the smaller switching loss. A 7-kW prototype of SiC three-phase inverter is built, which achieves a peak efficiency of 98.8% ( $\pm$ 0.15%) and 98.5% ( $\pm$ 0.15%) at 40 kHz using SR and FWD, respectively. This paper confirms that the SiC MOSFET is an ideal candidate for the SR.

Гальванические и емкостные эффекты при компенсации проводимости n-SiC радиационными дефектами

AbstractJBS diodes based on 4 H -SiC irradiated with electrons and protons are studied. This is carried out by using the methods of capacitance–voltage and current–voltage characteristics. It is concluded that, for both kinds of irradiation, deep centers are formed in the upper half of the band gap of silicon carbide. This leads to a sharp decrease in the concentration of ionized carriers in the conduction band and to an exponential increase in the resistance of the base regions of the structures under study.

Are dangling bond centers important interface traps in 4H-SiC metal oxide semiconductor field effect transistors?

Silicon carbide (SiC) based metal-oxide-semiconductor field-effect transistors (MOSFETs) have great promise in high power and high temperature applications. Unfortunately, effective channel mobilities remain disappointingly low, typically about 30 cm2/Vs. A major contributor to the disappointing effective channel mobilities is the presence of substantial densities of interface traps at the SiC/SiO2 interface. Many investigators have invoked silicon or carbon dangling bonds to be the dominating source of these interface defects, but very little, if any, direct experimental evidence exists to support this assumption in the SiC/SiO2 system. Cantin et al. [Phys. Rev. Lett. 92, 1 (2004)] have used conventional electron paramagnetic resonance measurements on porous oxidized SiC structures to measure the g tensor for the SiC/SiO2 interface carbon dangling bond. These results provide a particularly straightforward means to search for the presence of carbon dangling bonds in fully processed SiC MOSFETs using electrically detected magnetic resonance. Additionally, simple theory provides guidance to search for silicon dangling bond defects. In this study, we utilize K band electrically detected magnetic resonance via spin dependent charge pumping measurements in which almost all of the SiC band gap at the SiC/SiO2 interface is accessed. Although quite high signal to noise measurements are achieved, we are unable to detect any trace of the carbon dangling bond spectra. However, in very poor quality p-channel devices, we observe a spectrum which could be consistent with silicon dangling bonds. Other defect centers are clearly present and we conclude that these other centers dominate the interface trap density of states.

Investigation of SiC Polytypes for PVT Process Control Using Ultraviolet Fluorescence Technique

Silicon carbide (SiC) is a wide-bandgap semiconductor with high saturation velocity and thermal conductivity. So, It is well-known as a potential substrate for high-power, high-temperature and high-frequency devices. Commercial 4H- and 6H-SiC wafers are commonly grown by physical vapor transport (PVT) method and some emerging techniques such as high temperature chemical vapor deposition (HTCVD) and top seeded solution growth (TSSG) is still under developing. Because SiC has large number of polytypes determined by their stacking order during crystal growth, the polytype inclusion has been a common issue during SiC growth, especially at the early stage of development of new process or new equipments. When photon is incident on the surface of SiC crystal and the energy of photon is larger than the band gap of SiC (2.9 ~ 3.3eV in the UV range), the photon excites the electron in the valence band to the conduction band. Excited electron goes to the lower states emitting heat and relaxes to the valence band emitting photon that has longer wavelength that the incident light. The phenomena that wavelength is shifted to the longer wavelength by material is called fluorescence. Thus, polytypes with different energy band gap can be identified with the fluorescence color if UV ray is incident ray with sufficient energy for excite electron in the valence band. In this study, we observed the fluorescent color of various SiC polytypes with a lab-developed UV fluorescence equipment. The UV fluorescence is non-destructive technique to characterize the grown sample without any further sample preparations, so that this technique is applied to develop a new PVT process in the early stages. SIMS, Photoluminescence and Raman spectroscopy were used for identify the fluorescence color considering polytypes, dopants and defects. Stress mapping using high resolution X-ray diffraction and Raman spectroscopy were used for analyzing the effect of polytype formation on residual stress distribution on the grown crystal. Glazing-incidence X-ray topography using white beam were conducted for evaluating the grown SiC crystals at Pohang accelerator laboratory.

High Switching Performance of 1700V, 50A SiC Power MOSFET over Si IGBT/BiMOSFET for Advanced Power Conversion Applications

Due to wider band gap of silicon carbide (SiC) compared to silicon (Si), MOSFET made in SiC has considerably lower drift region resistance, which is a significant resistive component in high-voltage power devices. With low on-state resistance and its inherently low switching loss, SiC MOSFETs can offer much improved efficiency and compact size for the converter compared to those using Si devices. In this paper, we report switching performance of a new 1700-V, 50-A SiC MOSFET designed and developed by Cree, Inc. Hard-switching losses of the SiC MOSFETs with different circuit parameters and operating conditions are measured and compared with the 1700-V Si BiMOSFET and 1700-V Si IGBT, using same test set-up. Based on switching and conduction losses, the operating boundary of output power and switching frequency of these devices are found out in a dc-dc boost converter and compared. The switching dv/dts and di/dts of SiC MOSFET are captured and discussed in the perspective of converter design. To validate the continuous operation, three dc-dc boost converters using these devices, are designed and tested at 10 kW of power with 1 kV of output voltage and 10 kHz of switching frequency. 1700V SiC Schottky diode is used as the blocking diode in each case. Corresponding converter efficiencies are evaluated and the junction temperature of each device is estimated. To demonstrate high switching frequency operation, the SiC MOSFET is switched upto 150 kHz within permissible junction temperature rise. A switch combination of the 1700-V SiC MOSFET and 1700-V SiC Schottky diode connected in series is also evaluated for zero voltage switching turn-ON behavior and compared with those of bipolar Si devices. Results show substantial power loss saving with the use of SiC MOSFET.

Interface Defects and Negative Bias Temperature Instabilities in 4H-SiC PMOSFETs – A Combined DCIV/SDR Study

We study the structure of SiC/SiO2 interface defects and the effects of negative bias temperature stress (NBTS) in lateral 4H silicon carbide (SiC) PMOSFETs. Our devices have 90 nm thick SiO2 gate oxides thermally grown in N2O ambient at 1280°C on n-type SiC. We investigate virgin (unstressed) and stressed devices using two different techniques: (i) for electrical characterization, we use the direct-current current-voltage (DCIV) technique [1] which measures a recombination current via interface defects and charge pumping (CP) which measures the number of interface defects within a certain range of the SiC band gap; (ii) to study the structure of the defects, we use electrically detected magnetic resonance (EDMR) via spin dependent recombination (SDR) [2]. The elevated temperature during NBTS is provided by in-situ heated test structures. This is the first EDMR study of p-doped SiC MOSFETs and the first negative bias temperature instability (NBTI) study of SiC MOSFETs using in-situ (on-chip) heating during stress.

Electromechanical Computing at 500°C with Silicon Carbide

Logic circuits capable of operating at high temperatures can alleviate expensive heat-sinking and thermal-management requirements of modern electronics and are enabling for advanced propulsion systems. Replacing existing complementary metal-oxide semiconductor field-effect transistors with silicon carbide (SiC) nanoelectromechanical system (NEMS) switches is a promising approach for low-power, high-performance logic operation at temperatures higher than 300 degrees C, beyond the capability of conventional silicon technology. These switches are capable of achieving virtually zero off-state current, microwave operating frequencies, radiation hardness, and nanoscale dimensions. Here, we report a microfabricated electromechanical inverter with SiC complementary NEMS switches capable of operating at 500 degrees C with ultralow leakage current.

High-Temperature Electronic Switching

In electronic circuitry, the band gap of a semi-conductor helps to provide the barrier that keeps charge carriers from flowing until a voltage is applied that switches the device. As temperatures rise, the carriers acquire enough thermal energy to overcome the band gap, causing the device to leak current even when they are turned off. The higher band gap of silicon carbide (SiC) makes it an attractive candidate for higher-temperature operations compared to conventional silicon, but several performance issues occur with SiC junction field-effect transistors. T.-H. Lee et al. (p. [1316][1]) describe the fabrication of SiC nano-electromechanical switches that formed inverter circuits with extremely low leakage currents and switched billions of times at 500°C. [1]: /lookup/doi/10.1126/science.1192511

1200 V SiC vertical‐channel‐JFETs and cascode switches

AbstractWide band gap semiconductors like silicon carbide (SiC) are currently being developed for high power/temperature applications. Silicon carbide is ideally suited for power switching due to its high saturated drift velocity, its high critical field strength, its excellent thermal conductivity, and its mechanical strength. For power devices, the tenfold increase in critical field strength of SiC relative to Si allows high voltage blocking layers to be fabricated significantly thinner than those of comparable Si devices. This reduces device on‐state resistance and the associated conduction and switching losses, while maintaining the same high voltage blocking capability. The specific on‐state resistance of 4H‐SiC is approximately 400 times lower than that of Si at a given breakdown voltage. This allows for high current operation at relatively low forward voltage drop. In addition, the wide band gap of SiC allows operation at high temperatures where conventional Si devices fail. In this article, we will review Northrop Grumman's single‐implant no‐epitaxial‐regrowth vertical‐channel JFET. The feasibility of efficient 1200 V normally‐off VJFET operation will be investigated. The all‐SiC VJFET based cascode switch will be introduced and aspects of its operation evaluated. High temperature DC characteristics of VJFETs and 1200 V normally‐off cascode switches will be discussed. Finally, the development of large‐area high‐current 1200 V VJFETs and their edge termination performance will be presented. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)