Baliga's Figure Research Articles

An insulated gate bipolar transistor with three-layer poly gate for improved figure of merit

In this study, an insulated gate bipolar transistor (IGBT) with three-layer poly gate is proposed and investigated by TCAD simulation. Here, gate is spilt in two different workfunction materials of N+ poly ( $$\phi _{g}$$ = 4.17 eV) and P+ poly ( $$\phi _{g}$$ = 5.25 eV). Lower workfunction poly layer is sandwiched between higher workfunction poly, connected via a single metal. The gate oxide thickness is varied in x-direction. This leads to improvement in transconductance and reduction in miller capacitance. Thin oxide near the emitter serves good control over the charge carriers in the channel. This deployment of dual material gate in proposed device results in 36% reduction in area-specific on-resistance without any degradation in breakdown voltage. In addition to this, proposed device exhibits improved transient characteristics with 18.5% and 60% reduction in turn-off time and delay, respectively, as compared to conventional device. Further, the turn-off energy loss is reduced by 23.5% and 29.09% reduction in on-state voltage drop is achieved. Furthermore, proposed device offers 23%, 58%, and 30% improvement in FOM1, Baliga figure of merit (BFOM), and FOM2, respectively.

3.3 kV Multi-Channel AlGaN/GaN Schottky Barrier Diodes With P-GaN Termination

This work demonstrates five-channel AlGaN/ GaN Schottky barrier diodes (SBDs) fabricated on a 4-inch wafer with a sheet resistance of 115 Ω/sq. A novel edge termination based on regrown p-GaN is proposed to manage the electric field crowding in the Schottky contact region. A new self-aligned Ohmic process is developed to form sidewall contact to all five channels in a single lithography step. The fabricated lateral SBDs with a breakdown voltage (BV) of 1.65, 2.55, and 3.35 kV show a Baliga's figure of merit of 3.1, 3.5, and 3.6 GW/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , respectively, which are the highest among all the similarly-rated power SBDs to date. Based on experimental results, the practical limits of multi-channel AlGaN/GaN lateral devices were found to reach the theoretical vertical GaN limit at a BV over ±2 kV. This suggests the great promise of multi-channel AlGaN/GaN lateral devices for medium- and high-voltage power applications.

Structural, electronic, elastic, power, and transport properties ofβ−Ga2O3from first principles

We investigate the structural, electronic, vibrational, power and transport properties of the $\beta$ allotrope of Ga$_2$O$_3$ from first-principles. We find phonon frequencies and elastic constants that reproduce the correct band ordering, in agreement with experiment. We use the Boltzmann transport equation to compute the intrinsic electron and hole drift mobility and obtain a room temperature values of 258 cm$^2$/Vs and 1.2 cm$^2$/Vs, respectively as well as 6300 cm$^2$/Vs and 13 cm$^2$/Vs at 100 K. Through a spectral decomposition of the scattering contribution to the inverse mobility, we find that multiple longitudinal optical modes of B$_u$ symmetry are responsible for the electron mobility of $\beta$- Ga$_2$O$_3$ but that many acoustic modes also contributes, making it essential to include all scattering processes in the calculations. Using the von Hippel low energy criterion we computed the breakdown field to be 5.8 MV/cm at room temperature yielding a Baliga's figure of merit of 1250 with respect to silicon, ideal for high-power electronics. This work presents a general framework to predictively investigate novel high-power electronic materials.

Evaluation of diode characteristics for fully vertical β-Ga2O3 on silicon (100) substrate

In this article, β-Ga2O3 film was deposited on the p-Si (100) substrate using pulsed laser deposition (PLD) technique for rapidly emerging Ga2O3-based Schottky barrier diodes (SBDs). Although X-ray diffraction (XRD) result reveals a polycrystalline trending film, a smooth and uniform as-grown surface has been characterized by atomic force microscope (AFM) and field-emission scanning electron microscope (FESEM). Further, we have investigated metal–semiconductor (M–S) contact behavior of the fully vertical SBDs with the four different metals such as aluminum (Al), silver (Ag), gold (Au), and platinum (Pt) on Ga2O3 after forming ohmic contacts on the backside of the Si substrate. The barrier heights of all four metals are typically in the range of 0.51–0.69 eV and 0.72–1.41 eV as obtained from the current–voltage (I–V) and capacitance–voltage (C–V) characteristics, respectively. The carrier concentration is ~ 1016 cm−3 as calculated using C–V characteristics. The power device indices, namely breakdown voltage (VBR) of 19, 26, 90, and 99 V and the on-state resistance (RON) values ~ 19.82, 149.19, 7.45 and 156.25 Ω cm2 are also obtained for the Al/Ga2O3, Ag/Ga2O3, Au/Ga2O3, and Pt/Ga2O3 diodes, respectively. The Baliga Figure of Merits (V2BR/RON) for the Au/Ga2O3 diode is found out to be the highest (90.73 W cm−2). As the SBDs are fabricated on n-Ga2O3/p-Si heterojunction, it is expected to have two back-to-back diodes in the device structure. However, non-existence of back-to-back diodes has been confirmed by temperature dependence I–V characteristics due to possible Poole–Frenkel (P–F) tunneling at the Ga2O3/Si heterojunction.

Performance enhancement of β-Ga2O3 on Si (100) based Schottky barrier diodes using REduced SURface Field

Schottky barrier diodes (SBDs) have been fabricated laterally on a β-Ga2O3 film grown on both p-type and n-type Si (100) substrates using a pulsed laser deposition technique. The sample of Ga2O3 on p-Si was further annealed at 600 °C to optimize device performance. Platinum (Pt) and Titanium (Ti)/Gold (Au) metal stacks have been utilized for the formation of Schottky and Ohmic contact on the Ga2O3, respectively. Considerably high breakdown voltages (VBR) of 190, and 172 V and a significantly low on-resistance (Ron) of 330, and 15 mΩ.cm2, have been obtained for the as-deposited sample and sample annealed at 600 °C, respectively for lateral Ga2O3/p-Si SBDs. Moreover, a much lower VBR of 56 V and higher on-resistance of 970 mΩ.cm2 have been measured for Ga2O3/n-Si SBDs as compared to the Ga2O3/p-Si. The presence of REduced SURface Field effect in n-Ga2O3/p-Si based diodes is attributed to this enhancement of its VBR as compared to n-Ga2O3/n-Si SBDs. Moreover, the highest Baliga figure of merits (V2BR/Ron) for the Ga2O3/p-Si sample annealed at 600 °C has been found to be 1.97 MW.cm−2. Thus, the present article shall open up a new power device research avenue of Ga2O3 on Si.

Influence of Different Surface Morphologies on the Performance of High-Voltage, Low-Resistance Diamond Schottky Diodes

Vertical diamond Schottky diodes with blocking voltages $V_{\text{BD}} > 2.4 \text{ kV}$ and on-resistances $R_{\text{On}} < 400 \text{ m}\Omega \text{cm}^{2}$ were fabricated on homoepitaxially grown diamond layers with different surface morphologies. The morphology (smooth as-grown, hillock-rich, polished) influences the Schottky barrier, the carrier transport properties, and consequently the device performance. The smooth as-grown sample exhibited a low reverse current density $J_{\text{Rev}} < 10^{-4} \text{ A}/\text{cm}^{2}$ for reverse voltages up to $2.2 \text{ kV}$. The hillock-rich sample blocked similar voltages with a slight increase in the reverse current density ($J_{\text{Rev}} < 10^{-3} \text{ A}/\text{cm}^{2}$). The calculated 1D-breakdown field, however, was reduced by $30 \text{ } \%$, indicating a field enhancement induced by the inhomogeneous surface. The polished sample demonstrated a similar breakdown voltage and reverse current density as the smooth as-grown sample, suggesting that a polished surface can be suitable for device fabrication. However, a statistical analysis of several diodes of each sample showed the importance of the substrate quality: A high density of defects both reduces the feasible device area and increases the reverse current density. In forward direction, the hillock-rich sample exhibited a secondary Schottky barrier, which could be fitted with a modified thermionic emission model employing the Lambert W-function. Both polished and smooth sample showed nearly ideal thermionic emission with ideality factors $1.08$ and $1.03$, respectively. Compared with literature, all three diodes exhibit an improved Baliga Figure of Merit for diamond Schottky diodes with $V_{\text{BD}} > 2 \text{ kV}$.

Meandering Gate Edges for Breakdown Voltage Enhancement in AlGaN/GaN High Electron Mobility Transistors

Herein, a unique device‐design strategy is reported for increasing the breakdown voltage and hence Baliga figure of merit (BFOM) of III‐nitride high electron mobility transistors (HEMTs) by engineering the gate edge toward the drain. The breakdown of such devices with meandering gate‐drain access region (M‐HEMT) are found to be 62% more compared with that of conventional HEMT whereas the on‐resistance suffers by 76%, leading to an overall improvement in the BFOM for by 28%. The 3D technology computer‐aided design simulations show that the decrease in the peak electric field at the gate edge was responsible for increased breakdown voltage.

Trench IGBT with stepped doped collector for low energy loss

In this paper, a novel technique of variation doping profile in collector region for trench IGBT is proposed. The collector region is segregated in three sections such that the section with higher concentration lies towards emitter side while section with lower concentration lie towards gate side. The presence of lightly doped collector section increases the recombination rate by injecting lesser charge carrier leading to reduction in carrier lifetime. This effect further improves turn-off process for proposed device. However, due to increased recombination rate, collector current density reduces. But, this reduction is counter balanced by heavily doped collector section which injects higher charge carriers and maintains current flow through proposed device. The electrical characteristics of proposed and conventional device is simulated and analyzed. It is inferred that proposed device exhibits 48% reduction in turn-off time further minimizing energy loss by 53.3%. The lower doping profile of collector region also reduces corner electric field but due to p++-col section the net electric field increases hence, improving the breakdown voltage by 8.7%. Additionally, proposed structure exhibits 16.7% increment in Baliga figure of merit as compared to conventional design.

Development of Large Diameter Semi-Insulating Gallium Oxide (Ga2O3) Substrates

Beta-phase gallium oxide ( ${{\beta }}$ -Ga2O3) is an emerging ultra-wide bandgap semiconductor targeting next generation high power switching and high voltage RF electronics. ${{\beta }}$ -Ga2O3 possesses a bandgap ( ${\text{E}}_{g}$ ) of approximately 4.9 eV and a theoretical critical field strength ( ${\text{E}}_{c}$ ) of 8 MV/cm. The breakdown field for ${{\beta }}$ -Ga2O3 is 2 - 3 times larger than that of silicon carbide (SiC) or gallium nitride (GaN). The Baliga figure of merit for ${{\beta }}$ -Ga2O3 is at least three times GaN and eight times SiC making it a promising low-loss power switch material. Breakdown voltages of 1.6 kV and 740 V have been achieved for ${{\beta }}$ -Ga2O3 Schottky diodes and MOSFETs respectively. Lateral device electric fields of 3.8 MV/cm have also been demonstrated. Critical to this performance realization are the availability of native ${{\beta }}$ -Ga2O3 substrates. ${{\beta }}$ -Ga2O3 single crystals are produced by crystallization from a melt utilizing high growth rate processes such as Czochralski (CZ) or Edge-defined Film-fed Growth (EFG) techniques. Through Air Force Research Laboratory support, Northrop-Grumman SYNOPTICS has successfully scaled the growth of unintentionally doped (UID), Mg-doped and Fe-doped ${{\beta }}$ -Ga2O3 crystals from self-nucleated polycrystalline grains on iridium wire to seeded (010) oriented 50-mm diameter boules. Efforts directed at establishing growth and fabrication processes will be reviewed.

Electrothermal performance limit of β-Ga2O3 field-effect transistors

A β-Ga2O3 field effect transistor (FET) outperforms a GaN FET in Baliga's figure of merit (FOM) by 400% and Huang's chip area manufacturing figure of merit by 330%, suggesting that β-Ga2O3 could be a substrate of choice for next generation power transistors. However, its low thermal conductivity leads to extreme self-heating, which deteriorates the device performance during high voltage operation. A holistic evaluation of performance from a material-device-circuit perspective is necessary before reaching any conclusion regarding the technological viability of β-Ga2O3. In this paper, we develop a multiphysics and multiscale model for a material-device-circuit analysis of β-Ga2O3 FETs. The framework allows us to explore the effectiveness of various device design strategies (e.g., thermal shunts) for mitigating the thermal chokepoints and compare the performance of improved β-Ga2O3 FETs against that of GaN and SiC FETs. We highlight the limitations of traditional FOMs to analyze the relative performance of the new generation of power transistors whose structure incorporates stacked layers of materials with different thermal conductivities, like those of β-Ga2O3 FETs. We suggest device design strategies, such as wafer thinning, incorporation of heat shunts, and improved channel mobility, so that β-Ga2O3 FETs can compete commercially with GaN and SiC technologies.

Progress of Ultra-Wide Bandgap Ga2O3 Semiconductor Materials in Power MOSFETs

As a promising ultra-wide bandgap semiconductor, the β-phase of Ga 2 O 3 has attracted more and more interest in the field of power electronics due to its ultra-wide bandgap (4.8 eV), high theoretical breakdown electric field (8 MV/cm), and large Baliga's figure of merit, which is deemed as a potential candidate for next generation high-power electronics, including diodes, field effect transistors (FETs), etc. In this article, we introduce the basic material properties of Ga 2 O 3 , and review the recent progress and advances of β-Ga 2 O 3 based metal-oxide-semiconductor field-effect transistors (MOSFETs). Due to the problematic p-type doping technology up to now, the enhancement-mode (E-mode) β-Ga 2 O 3 FETs face more difficulties, compared with depletion mode (D-mode). This article focuses on reviewing the recent progress of E-mode Ga 2 O 3 MOSFETs, summarizing and comparing various feasible solutions when p-type doping is absent. Furthermore, the device fabrication and performances of state-of-art β-Ga 2 O 3 MOSFETs, including D-mode, E-mode, and planar/vertical structure are fully discussed and compared, as well as potential solutions to the challenges of Ga 2 O 3 FETs.

Design and Optimization of SiC Super-Junction MOSFET Using Vertical Variation Doping Profile

In this paper, uniformly doped drift region of silicon carbide (SiC) super-junction (SJ) MOSFET is replaced with vertical variable doping profile (VVD) to achieve a better tradeoff between breakdown voltage (BV) and specific ON-resistance ( ${R}_{\text {sp,on}}$ ). While it is known that the SJ device consists of two vertical columns of n- and p-type, SJ VVD feature lies in increasing the doping concentration from top to bottom in the N-column and vice-versa in the P-column within the drift region. The proposed SJ VVD allows $\text {R}_{{\text {sp, on}}}$ to reduce further due to increased average doping concentration in conducting N-column and BV to increase further due to shifting of an electric field from corners to the center of the drift region. BV and ${R}_{\text {sp,on}}$ improved by 10% in an SJ VVD MOSFET and these parameters follow linear relationship similar to SJ MOSFET. The 2-D numerical simulations from Synopsys TCAD are used for investigating the static and dynamic characteristics of the device. In addition to 30% improvement in Baliga figure of merit, 35% improvement is obtained over SJ MOSFET in turn on and turn off switching energies for a clamped inductive circuit at 1200 V–20 A. Improved dynamic characteristics of SJ VVD can be attributed to reduction in gate charge ( ${Q}_{g}$ ) and miller capacitance ( ${c}_{\text {rss}}$ ) compared to SJ MOSFET.

Technology Computer Aided Design Study of GaN MISFET With Double P-Buried Layers

In this paper, a performance-improved AlGaN-/GaN-Based metal-insulator-semiconductor field effect transistor (MISFET) with double P-buried layers MISFET (DP-MISFET) is proposed. The proposed structure is simulated, and its characteristics are analyzed by the Sentaurus TCAD tool; the results show that with a gate-drain spacing of 6 μm, the optimized DP-MISFET can achieve high Baliga's figure of merit of 3.23 GW · cm -2 due to the modulation of the electric field distribution. Compared with the conventional MISFET (C-MISFET) with the breakdown voltage (BV) of 503.9 V and specific on-resistance (R on,sp ) of 0.63 mΩ · cm 2 , the proposed structure can achieve a better trade-off between the breakdown voltage and specific on-resistance achieving R on,sp and BV of 0.63 mΩ · cm 2 and 1427 V, respectively.

Simulation design of high Baliga's figure of merit normally-off P[sbnd]GaN gate AlGaN/GaN heterostructure field effect transistors with junction field plates

In this paper, we conducted a numerical analysis on novel Normally-off PGaN gate AlGaN/GaN heterostructure field effect transistors with junction field plates (JFP-HFET). The breakdown voltage (BV) was significantly improved with the introduction of the junction field plate (JFP), which can make a rectangular distribution of the electric field in the GaN channel between the gate and the drain. The highest BV of 1340 V of JFP-HFET could be achieved with the gate to the drain distance Lgd = 6 μm, the length of the P-type region of the JFP Lp = 5.8 μm, the thickness of the JFP Tj = 500 nm, the doping concentration of P-type region of the JFP Np = 1 × 1017 cm−3, and the Al fraction of the AlGaN JFP xAl = 0.25. The optimum parameters of the JFP-HFET were achieved by considering both the principle of charge balance and the practical fabrication of the III-V devices. The highest Baliga's figure of merit (BFOM) 1.2 GW/cm2 was obtained under the conditions of Lgd = 6 μm, Lp = 5.8 μm, Tj = 100 nm, Np = 6 × 1017 cm−3, and xAl = 0.3. CV, turn-on and turn-off processes revealed that the JFP-HFET showed better switching characteristics than that of the HFET with metal field plate.

High voltage, high current GaN-on-GaN p-n diodes with partially compensated edge termination

An approach to realizing high-voltage, high-current vertical GaN-on-GaN power diodes is reported. We show that by combining a partially compensated ion-implanted edge termination (ET) with sputtered SiNx passivation and optimized ohmic contacts, devices approaching the fundamental material limits of GaN can be achieved. Devices with breakdown voltages (Vbr) of 1.68 kV and differential specific on resistances (Ron) of 0.15 mΩ cm2, corresponding to a Baliga figure of merit of 18.8 GW/cm2, are demonstrated experimentally. The ion-implantation-based ET has been analyzed through numerical simulation and validated by experiment. The use of a partially compensated ET layer, with approximately 40 nm of the p-type anode layer remaining uncompensated by the implant, is found to be optimal for maximizing Vbr. The implant-based ET enhances the breakdown voltage without compromising the forward characteristics. Devices exhibit near-ideal scaling with area, enabling currents as high as 12 A for a 1 mm diameter device.

The GaN trench gate MOSFET with floating islands: High breakdown voltage and improved BFOM

A novel GaN trench gate (TG) MOSFET with P-type floating islands (FLI) in drift region, which can suppress the electric field peak at bottom of gate trench during the blocking state and prevent premature breakdown in gate oxide, is proposed and investigated by TCAD simulations. The influence of thickness, position, doping concentration and length of the FLI on breakdown voltage (BV) and specific on-resistance (Ron_sp) is studied, providing useful guidelines for design of this new type of device. Using optimized parameters for the FLI, GaN FLI TG-MOSFET obtains a BV as high as 2464 V with a Ron_sp of 3.0 mΩ cm2. Compared to the conventional GaN TG-MOSFET with the same structure parameters, the Baliga figure of merit (BFOM) is enhanced by 150%, getting closer to theoretical limit for GaN devices.

Demonstration of fully vertical GaN‐on‐Si Schottky diode

The realisation of a fully vertical gallium nitride (GaN)-on-silicon (Si) Schottky barrier diode (SBD) without using wafer bonding and Si substrate removal process is reported. The SBD presented a turn-on voltage of 0.69 V at 1 A/cm 2 , breakdown voltage of 148 V with a specific on-resistance of 13.9 mΩ cm 2 . The ideality factor and Schottky barrier height were 1.35 and 0.71 eV, respectively. An effective critical electric field was estimated to be 1.48 MV/cm. The Baliga's figure of merit for the SBD was calculated to be 1.57 MW/cm 2 . These results indicate the great potential of GaN-on-Si in achieving cost-effective fully vertical power device.

Simulation study of high‐reverse blocking AlGaN/GaN power rectifier with an integrated lateral composite buffer diode

In this study, a novel AlGaN/GaN power rectifier with an integrated lateral composite buffer diode (IBD-Rectifier) for reverse blocking capability improvement is proposed and investigated by Sentaurus simulations (this paper includes only simulated data and no real experimental result). AlGaN buffer layer under the anode is adopted to realise great high reverse blocking capability. A minimum turn-on voltage of 0.6 V and a maximum breakdown voltage (BV) >1.3 kV are simultaneously obtained in the IBD-Rectifier, resulting in a high Baliga's figure of merits BV 2/R on,sp (R on,sp is specific-on resistance) of ∼3000 MW/cm2. In comparison with MIS-gated hybrid anode diode and conventional schottky barrier diode, the IBD-Rectifier delivers an excellent theoretical method to achieve superior performances in high-efficiency GaN power applications.

Mechanical Exfoliation of Large Area (100) β-Ga2O3 Onto Arbitrary Substrates for High Power Devices

The single-crystal monoclinic (β) phase of Ga2O3 is an advantageous material for high-power, high-temperature electronic device applications due to its ultra-wide energy gap (~4.9 eV) and high breakdown field (8 MV/cm), yielding a nearly ten-fold higher Baliga figure of merit than that of 4H-SiC (BFOMGa2O3 = 3444, BFOM4H-SiC = 300) [1]. Large diameter, high quality, cost effective native substrates grown from the melt are expected to be the main technology driver for the commercial adoption of this material. Even though substrates with full-width half-maximum values as low as 15 arcsec are routinely obtained by the edge-defined film fed (EFF) and Czochralski growth methods, it is expected that Ga2O3-based power devices will require low dislocation density epitaxial drift layers. While fast, high quality epitaxial growth of β-Ga2O3 is already available in small production volumes, high quality electronic devices can also be demonstrated by exploiting the relatively easy mechanical exfoliation of nano-flakes of β-Ga2O3 as a result of the large a lattice parameter of β-Ga2O3 (1.22 nm) [2, 3]. Indeed, a number of transistor reports have been recently published using mechanically exfoliated β-Ga2O3 nano-flakes as the device channel to demonstrate high current, normally off transistors [4-8]. Because Ga2O3 is not a two-dimensional (2D) material, where a number of monolayers are being held together by Van der Waals forces, mechanically exfoliated Ga2O3 typically yields much thicker (~300 nm) films, which could then be thinned by repeated mechanical exfoliation or dry etching [9]. In this work, we demonstrate that β-Ga2O3 exfoliation is scalable towards mm-sized flakes, and their transfer onto arbitrary substrates is readily feasible [10]. Mechanical exfoliation was performed using (100) and (-201) oriented β-Ga2O3 wafers, grown by the edge-defined film fed (EFF) growth method [11]. A film of medium-tack dicing saw tape was pressed and removed from freshly-cleaved facets of the wafers. The (-201) 2-inch wafer was cleaved in half in order to expose the (100) facet; thus, it was only possible to produce relatively narrow (~700 µm wide) flakes using this crystal orientation. However, the flakes obtained using this approach were more than 40 mm long and only the wafer size limited this dimension. They were also relatively thick (>500 µm) and thus could not be easily transferred onto another substrate. Using the (100) oriented wafer, on the other hand, allowed for ~5 mm wide, ~20 mm long flakes to be exfoliated as freestanding samples. Their yield decreased significantly upon transfer onto a substrate such as SiO2/Si. Nevertheless, about 4 mm long, 100 µm wide flakes were successfully transferred onto a diamond substrate. It was determined that the transfer area yield strongly depended on the force during transfer. While further controlled experiments are required to quantify this relationship, flakes of β-Ga2O3 were successfully transferred onto arbitrary substrates such as GaN, graphene/SiC, and single-crystal diamond, with various degrees of yield. The resulting transferred flakes were characterized by Raman spectroscopy, scanning electron microscopy, and other complementary techniques. Such a process could potentially open further avenues for novel device applications, for example thermally-managed Ga2O3 transistors on diamond. Research at NRL was supported by the Office of Naval Research (ONR). A.K. acknowledges partial support by ONR Global (Dr. Ming-Jen Pan) under a NICOP contract. L.E.L. gratefully acknowledges postdoctoral fellowship support from the National Research Council. [1] M. Higashiwaki, et al., Appl. Phys. Lett. 100, 013504 (2012). [2] K.S. Novoselov, et al., Science 306, 666 (2004). [3] J.B. Varley, et al., Appl. Phys. Lett. 97, 142106 (2010). [4] W.S. Hwang, et al., Appl. Phys. Lett. 104, 203111 (2014). [5] R. Mitdank, et al., Phys. Stat. Solidi A 211, No. 3, 543-549 (2014). [6] S. Ahn, et al., Appl. Phys. Lett. 109, 062102 (2016). [7] M.J. Tadjer, et al., ECS Jour. Solid State Sci. Technol., vol. 5, no. 9, P468-470, 2016. [8] H. Zhou, et al., IEEE Electr. Dev. Lett., vol. 38, no. 1, pp. 103-106, 2017. [9] Y. Kwon, et al., Appl. Phys. Lett. 110, 131901 (2017). [10] J.D. Caldwell, et al., ACS Nano, 2010, 4 (2), pp 1108–1114. [11] H. Aida, et al., Jpn. J. Appl. Phys. 47, 8506 (2008).

Simulation design of uniform low turn-on voltage and high reverse blocking AlGaN/GaN power field effect rectifier with trench heterojunction anode

To achieve uniform low turn-on voltage and high reverse blocking capability, an AlGaN/GaN power field effect rectifier with trench heterojunction anode (THA-FER) is proposed and investigated in this work which includes only simulated data and no real experimental result. VT has a low saturation value when trench height (HT) is beyond 300 nm, confirming it is possible to control the VT accurately without precisely controlling the HT in the THA-FER. Meanwhile, high HT anode reduces reverse leakage current and yields high breakdown voltage (VB). A superior high Baliga's Figure of Merits (BFOM = VB2/Ron,sp, Ron,sp is specific-on resistance) of 1228 MW/cm2 reveals the THA-FER caters for the demands of high efficiency GaN power applications.