Back Contact Layer Research Articles

Effect of Na-doped Mo layer as a controllable sodium reservoir and diffusion barrier for flexible Cu(In,Ga)Se2 solar cells

To overcome the absence of sodium (Na) and to prevent undesired impurity diffusion from stainless steel (STS) substrates, a bi-layer molybdenum (Mo) structure consisting of a 1-μm-thick Mo and Na-doped Mo (Mo:Na) with variable thickness was utilized as the back contact layer in copper–indium–gallium–selenide (CIGS) solar cells. Na ions were supplied to the CIGS absorber layer from the Mo:Na layer, and the amount of Na ions was controlled by changing the thickness of Mo:Na layer. The Na doping to the CIGS layer is verified by the X-ray photoelectron spectroscopy (XPS) and the dynamic secondary ion mass spectroscopy (D-SIMS). The recombination process in the bulk CIGS and the CdS/CIGS junction has been analyzed by temperature dependent current density–voltage (J–V–T) measurement. The D-SIMS showed that the amount of Na ions in the CIGS layer grown on Mo/Mo:Na/STS is comparable with that in the conventional CIGS film deposited on Mo coated soda-lime glass. Moreover, the bi-layer Mo also acts as a diffusion barrier layer against the Fe atoms, which deteriorate the quality of CIGS. The higher content of Na ions and the lower content of Fe ions in the CIGS layer lowered the recombination activation energy, series resistance and ideality factor, leading to improved junction quality. As a result, the short circuit current density and power conversion efficiency of the CIGS on the Mo and 600-nm-thick Mo:Na were improved by 8.1 and 69.4%, respectively, compared with those of CIGS solar cells fabricated without a Mo:Na layer.

Improved Electrical Performance of Perovskite Photovoltaic Mini‐Modules through Controlled PbI2 Formation Using Nanosecond Laser Pulses for P3 Patterning

The upscaling of perovskite solar cells to modules requires the patterning of the layer stack in individual cells that are monolithically interconnected in series. This interconnection scheme is composed of three lines, P1–P3, which are scribed using a pulsed laser beam. The P3 scribe is intended to isolate the back contact layer of neighboring cells, but is often affected by undesired effects such as back contact delamination, flaking, and poor electrical isolation. Herein, the influence of the laser pulse duration on the electrical and compositional properties of P3 scribe lines is investigated. The results show that both nanosecond and picosecond laser pulses are suitable for P3 patterning, with the nanosecond pulses leading to a higher open circuit voltage, a higher fill factor, and a higher power conversion efficiency. It is found that the longer pulse duration resultes in a larger amount of PbI2 formed within the P3 line and a thin Br‐rich interfacial layer which both effectively passivate defects at the scribe line edges and block charge carrier in its vicinity. Thus, nanosecond laser pulses are preferable for P3 patterning as they promote the formation of beneficial chemical phases, resulting in an improved photovoltaic performance.

Effect of Ultrasonic Bonding Parameters on the Contact Resistance and Bondability Performances of CIGS Thin Film Photovoltaic Solar Panel

This article aims to investigate the optimal ultrasonic bonding parameter namely bonding pressure, bonding energy, and bonding amplitude that can minimize the contact resistance (Rc), maximize the peel strength, and identify the possible failure modes of ultrasonic Al bond on Mo back contact layer of copper indium gallium (de)selenide (CIGS) thin-film photovoltaic (TFPV) solar panel. The transmission line method was used to measure Rc and a peel test was carried out to measure the peel strength and the possible failure modes of ultrasonic Al bond on the Mo layer. Design of experiment using D-optimal method was utilized to evaluate the effect of the ultrasonic bonding parameter toward the Rc and peel strength of the Al bond on the Mo layer. Individual and combination of the ultrasonic bonding parameter have a significant effect on the quality of Al bonds on Mo back contact layer of CIGS TFPV solar panel. Possible failure modes could be identified through the application of the higher value of individual ultrasonic bonding parameter while keeping constant other bonding parameters and through the qualitative result of the load-displacement profile obtained from the peel test. However, sample 2 with bonding pressure of 3 bar, bonding energy of 20 Ws, and bonding amplitude of 7.7 μm is the best-optimized bonding parameter window that can be applied to obtain ultrasonic Al bond with lower Rc and higher peel strength. It was noted that bonding pressure is the most sensitive bonding parameter followed by bonding amplitude and bonding energy.

Improving the performance of Sb2Se3 thin-film solar cells using n-type MoO3 as the back contact layer

Antimony Selenide (Sb2Se3) is a promising candidate for thin-film solar cells; however, its low intrinsic doping density, which reduces its power convention efficiency, has limited its further application. In this study, the MoO3 thin films prepared by electron beam (EB) evaporation were used as the back contact layer in an Sb2Se3 thin-film solar cell to compensate for the low intrinsic doping density (insufficient carrier collection) of Sb2Se3 as well as to optimize the back contact issues of Sb2Se3 thin-film solar cell. To achieve this, solar cells with an FTO/CdS/Sb2Se3/MoO3/Au structure were prepared. The thickness and deposition temperature of the MoO3 thin film were optimized, and the device achieved an efficiency of 6.3%, which was approximately 24% higher than that of the solar cells without MoO3. In addition, the material characterization revealed that the EB evaporation-prepared MoO3 thin film was amorphous and exhibited an n-type conductivity with a high work function and deep valence band edge, which facilitated the hole-selective transport. Furthermore, the device performance characterization and analysis revealed that the MoO3 thin film enhanced the efficient charge collection, improved the built-in voltage, and suppressed the carrier recombination at the back contact interface.

Back contact modification of the optoelectronic device with transition metal dichalcogenide VSe2 film drives solar cell efficiency

VSe2 is with high electrical conductivity and high work function, thus it is beneficial for the carrier transport in the optoelectronic devices. However, the performance and mechanism of its effect on the photoelectronic devices conversion efficiency is still beyond understood. In this work, we fabricate VSe2 film between back contact and absorber layer Cu2ZnSn(S,Se)4 (CZTSSe) film. We demonstrate that the VSe2 film in back contact region increases solar cell efficiency by 39%. Besides improving the carrier transport in the back contact region, the increasing can also be attributed to the reduction of the decomposition reaction of CZTSSe during the nucleation of CZTSSe as VSe2 fabricated between back contact and absorber layer. The present work not only provides an effective method to improve the performance of the optoelectronic device, but also shows an attractive application of metallic TMDs in optoelectronic device and solar cell energy generation.

Epitaxial Growth of κ‐(AlxGa1−x)2O3 Layers and Superlattice Heterostructures up to x = 0.48 on Highly Conductive Al‐Doped ZnO Thin‐Film Templates by Pulsed Laser Deposition

(AlxGa1−x)2O3 thin‐film layers in the metastable orthorhombic κ‐modification are deposited heteroepitaxially on unintentionally doped ZnO buffer layers on heavily Al‐doped and highly conductive ZnO back contact layers by pulsed laser deposition. The back contact layers potentially serve as electrodes for ferroelectric hysteresis measurements and improve the performance of device applications such as Schottky barrier diodes or quantum‐well infrared photodetectors (QWIPs). The alloy layers cover a broad composition range of 0 ≤ x ≤ 0.48 for which X‐ray diffraction (XRD) patterns confirm the same high crystal quality as for layers grown on single‐crystalline substrates. Epitaxial relations of the κ‐phase layers to the ZnO thin‐film templates are determined and both in‐ and out‐of‐plane lattice constants follow a linear evolution with Al content in agreement with Vegard's law. Smooth surface morphologies are verified in atomic force microscopy images. Finally, a 15‐layer‐pair κ‐(Al0.27Ga0.73)2O3/κ‐Ga2)O3 quantum‐well superlattice (SL) structure is similarly deposited on the ZnO:Al back contact layer and shows sharp SL fringes up to the fifth order in XRD measurements confirming excellent crystal quality and abrupt interfaces in the heterostructure. The results render ZnO:Al as a promising back contact layer for QWIP applications and the determination of electrical polarizations of κ‐phase alloy layers.

Carbon-nanofibers film as a back-contact buffer layer in CdTe thin film solar cell

Carbon nanofibers (CNFs) based thin films were introduced as a buffer layer in the back contact of of CdTe thin film solar cells. CNFs buffer layer is used to replace the conventional metal contact layer. Quantitative band alignment measurement by using X-ray photoelectron spectroscopy (XPS) demonstrated that a relatively low energy barrier at the CNF/CdTe interface was formed. The valance band offset of 0.47 eV and conduction band offset of 0.80 eV were examined between CNF and CdTe.. The stability of CdTe solar cells was considerably improved by introducing CNF buffer layer with trace amount of Cu to fabricate low-energy barrier back contact. The CNFs as a buffer layer between CdTe and metal Au electrode based fabricated CdTe thin film solar cells demonstrated a conversion efficiency of 11.4 %. From the device stability stressing tests we conclude that CNFs as a buffer layer in a CdTe thin film solar cell meaningfully improved the cell performance and device stability.

Ohmic contact formation and activation for reduced graphene oxide and Sb bilayers contacted CdTe solar cells

Ohmic back contact is one of the keys to fabricate high efficient CdTe solar cells, as it can improve fill factor FF and open-circuit voltage Voc. In this work, antimony-containing reduced graphene oxide (RGO) was prepared and used as a back contact for CdTe thin film solar cells, in which antimony is an effective dopant for CdTe and RGO acts as a hole transport layer and diffusion barrier of antimony in the solar cells. Post deposition annealing was performed to activate the back contact layer and passivate the interface defect states. Electrical performance and apparent quantum efficiency characterization were performed to investigate device performance of CdTe solar cells with antimony-containing RGO back contacts. The results indicate that, the introduction of extrinsic doping near the CdTe back surface serves to reduce the back contact depletion width and enhance the built-in potential to enable the tunnelling of majority carrier holes through the barrier, and the RGO is beneficial for the formation of Ohmic back contact on CdTe.

Reduction of interface recombination current for higher performance of p+-CZTSxSe(1-x)/p-CZTS/n-CdS thin-film solar cells using Kesterite intermediate layers

There have been significant efforts to enhance the performance of CZTS thin-film solar cells. However, the increase in series resistance, formation of the unfavorable MoS2 between the absorber layer and back-contact, and recombination losses are some of the most effective factors for the low values of the efficiency and open-circuit voltage parameters. In this paper, five experimental CZTS solar cells with high efficiency of 8.4–11% have been mainly studied and discussed. Afterwards, two experimental works have been reproduced to validate our results. Additionally, with introducing the thin CZTSxSe(1-x) layer between the Mo back-contact and CZTS absorber layer, the efficiency and open-circuit voltage of solar cells have been notably improved. There is a significant decrease in recombination losses (less than 12 mA/cm2) after using CZTSxSe(1-x) intermediate layers between the absorber layer and back-contact. Using the CZTSe, and CZTS0.2Se0.8 thin layers and optimizing the structure as p+pn structure (p+-CZTSxSe(1-x)/p-CZTS/n-CdS), the following efficiencies (and open-circuit voltage) are achieved as: 15.98% (921 mV) and 17.81% (986 mV), respectively. Simulations demonstrate that at 0.8-V bias for p+-CZTS0.2Se0.8/p-CZTS/n-CdS structure, the recombination current total density is reduced to 6.47 mA/cm2. To obtain the highest performance in the proposed structures, the absorber layer carrier concentration should be 1 × 1016 cm−3 and the intermediate layer carrier concentration needs to be within the range of 1 × 1017 cm−3 to 1 × 1018 cm−3. Furthermore, the optimum thickness of CZTSe and CZTSSe intermediate layers in the proposed structures is 50 nm.

Fabrication and Characterization of Cu2ZnSnSe4 Thin-Film Solar Cells using a Single-Stage Co-Evaporation Method: Effects of Film Growth Temperatures on Device Performances

Kesterite-structured Cu2ZnSnSe4 (CZTSe) is considered as one of the Earth-abundant and non-toxic photovoltaic materials. CZTSe films have been prepared using a single-step co-evaporation method at a relatively low temperature (i.e., below 500 °C). Due to the volatile nature of tin-selenide, the control over substrate temperature (i.e., growth temperature) is very important in terms of the deposition of high-quality CZTSe films. In this regard, the effects of growth temperatures on the CZTSe film morphology were investigated. The suitable temperature range to deposit CZTSe films with Cu-poor and Zn-rich compositions was 380–480 °C. As the temperature increased, the surface roughness of the CZTSe film decreased, which could improve p/n junction properties and associated device performances. Particularly, according to capacitance-voltage (C-V) and derived-level capacitance profiling (DLCP) measurements, the density of interfacial defects of CZTSe film grown at 480 °C showed the lowest value, of the order of ~3 × 1015 cm−3. Regardless of applied growth temperatures, the formation of a MoSe2 layer was rarely observed, since the growth temperature was not high enough to have a reaction between Mo back contact layers and CZTSe absorber layers. As a result, the photovoltaic (PV) device with CZTSe film grown at 480 °C yielded the best power conversion efficiency of 6.47%. It is evident that the control over film growth temperature is a critical factor for obtaining high-quality CZTSe film prepared by one-step process.

Energy Band Alignment in Molybdenum Oxide/Cu(In,Ga)Se2 Interface for High-Efficiency Ultrathin Cu(In,Ga)Se2 Solar Cells from Low-Temperature Growth

In this work, the molybdenum oxide (MoOx) was employed as a back contact layer to improve the device performance of ultrathin Cu(In,Ga)Se2 (CIGS) solar cells with CIGS absorber synthesized through ...

Comparative study of optimised molybdenum back-contact deposition with different barriers (Ti, ZnO) on stainless steel substrate for flexible solar cell application

In this study, we optimised the molybdenum (Mo) back-contact layer for solar cell applications on stainless steel substrates using direct-current (dc) sputtering with varying sputtering powers (100 W to 500 W) and pressures (5 mTorr to 20 mTorr). We comparatively analysed the effectiveness of titanium (Ti) layer deposited using e-beam evaporation deposition and zinc oxide (ZnO) layer deposited using radio-frequency (RF) sputtering for barrier application with Mo. Structural characterisation of the optimised Mo films was carried out using XRD studies confirmed the (110) plane corresponding to the body-centred cubic (bcc) structure. Estimated Mo film parameters for films deposited on barrier layers were compared against films deposited on SS substrate without any barriers as these properties influence the prospective diffusion of Fe and Cr into the absorber layer. Surface characterisation of the deposited films was carried out using a scanning electron microscopy (SEM) to study the morphology of films, and energy-dispersive X-ray (EDX) to identify elemental presence to confirm the blockage of the impurities atoms through the film. Secondary ion mass spectroscopy (SIMS) was employed to study the depth profiles of films while atomic force microscopy (AFM) was used to characterise the topographical properties from the sputtered Mo film and analyse the grain properties of the films. A low resistivity value of 0.511 × 10–6 Ω m for Mo films on the reference glass substrate and 0.625 × 10–6 Ω m for the Mo film on ZnO barrier was measured using the four-point probe. We observed a further 40% reduction in impurities using annealed ZnO barrier combined with an optimised Mo layer.

Study on the Stability of Unpackaged CdS/CdTe Solar Cells with Different Structures

In this work, the stability of unpackaged CdTe solar cells with different configurations was investigated according to the International Electrotechnical Commission IEC 61215-2016. The measurements of thermal cycling from -40°C to +85°C and 24-hour temperature cycling from -40°C to +85°C withstanding the effects of 20-hour penetration of 85°C were carried out in CdS/CdTe solar cells with structures of FTO/CdS/CdTe/Au, FTO/CdS/CdTe/back contact/Au, and FTO/MZO/CdS/CdTe/back contact/Au, respectively. The performances of these cells before and after the thermal aging experiments were investigated by using light and dark I‐V together with C‐V. The results reveal varied performance degradation before and after thermal aging in the cells with different structures. Among these, the most deteriorated device is the one without back contact (BC), whose efficiency decreased by 25.12% after thermal cycling accompanying an obvious roll-over phenomenon when forward bias was greater than open circuit voltage. On the contrary, the reduction in the efficiency was about 16.80% in the case cells with BC, and the roll-over phenomenon was not so significant. Furthermore, for the devices with optimized front contact of FTO/MZO, the thermal stability was improved obviously. Interestingly, short-circuit current density associated with the carrier concentration of cells remained relatively small variations compared with the change of Voc and fill factor. All the results indicated that an efficient back contact layer and an optimized front electrode were the indispensable structural elements to attain high stabilization in the CdS/CdTe solar cells.

Sputtered Mo-bilayer thin films with reduced thickness and improved electrical resistivity

In this study, Mo-bilayer film, the thickness of which was reduced to approximately 270 nm with a very low resistivity of 14 μΩ.cm, was successfully grown by DC magnetron sputter. The Mo-bilayer, whose bottom and top layers were obtained by high pressure sputter (HPS) and low pressure sputter (LPS) respectively, demonstrates good adhesivity and crystalline properties, together with high reflectance. In order to obtain Mo-bilayer with these improved properties, we first determined the optimal growth temperature and pressure parameters by checking the structural and electrical properties respectively of Mo-single layers. As a result, we achieved a deposit of Mo-bilayer thin film that can be used as a good back contact layer in solar cell applications, both in terms of material cost saving and its superior properties, even at such low thickness.

Properties of Arsenic-Doped ZnTe Thin Films as a Back Contact for CdTe Solar Cells.

As-doped polycrystalline ZnTe layers grown by metalorganic chemical vapor deposition (MOCVD) have been investigated as a back contact for CdTe solar cells. While undoped ZnTe films were essentially insulating, the doped layers showed significant rise in conductivity with increasing As concentration. High p-type carrier densities up 4.5 × 1018 cm−3 was measured by the Hall-effect in heavily doped ZnTe:As films, displaying electrical properties comparable to epitaxial ZnTe single crystalline thin films in the literature. Device incorporation with as-deposited ZnTe:As yielded lower photovoltaic (PV) performance compared to reference devices, due to losses in the open-circuit potential (VOC) and fill factor (FF) related to reducing p-type doping density (NA) in the absorber layer. Some minor recovery observed in absorber doping following a Cl-free post–ZnTe:As deposition anneal in hydrogen at 420 °C contributed to a slight improvement in VOC and NA, highlighting the significance of back contact activation. A mild CdCl2 activation process on the ZnTe:As back contact layer via a sacrificial CdS cap layer has been assessed to suppress Zn losses, which occur in the case of standard CdCl2 anneal treatments (CHT) via formation of volatile ZnCl2. The CdS sacrificial cap was effective in minimising the Zn loss. Compared to untreated and non-capped, mild CHT processed ZnTe:As back contacted devices, mild CHT with a CdS barrier showed the highest recovery in absorber doping and an ~10 mV gain in VOC, with the best cell efficiency approaching the baseline devices.

Temperature and Environmental Effects on Resistance of Nano-Resistor Devices

The solid-state incandescent light emitting device (SSI-LED) emits the broadband warm white light [1-5]. The light emission principle is the thermal excitation of the nano-resistors formed from the dielectric breakdown of a MOS capacitor with a nm-thick high-k gate dielectric layer [5]. Besides the light emission, the nano-resistor device shows the diode-like characteristics, i.e., current flow in one direction but not the other direction [1]. Since the nano-sized structures are easily subject to the environmental effect, e.g., oxidation in air [6,7], it is important to understand how the temperature and high humidity affect the electric resistance of the nano-resistors in the SSI-LED. MOS capacitors of 50 μm, 100 μm, 200 μm, 300 μm, and 400 μm diameters were fabricated on a pre-cleaned p-type (10-5 cm-3) (100) Si wafer. Each capacitor contains 1) a 9 nm thick zirconium-doped hafnium oxide (ZrHfO) high-k gate dielectric (including the interface layer with Si), 2) an 80 nm thick ITO gate electrode, and 3) a Mo back side contact layer. Nano-resistors, as shown in Figure 1, were formed after the gate dielectric was broken. The current density vs. voltage (J-V) curve of the nano-resistor device was measured between Vg = 0 V and -20 V at room temperature, 50˚C, 80˚C, 100˚C, and 120˚C. The resistance was extracted from the linear portion of the curve, i.e., between -10 V and -18 V. Then, the sample was loaded in an environmental chamber (Associated Environment System BHD-403 7136) under relative humidity 80% at 80 ̊C for 1 hour. The J-V curve was measured in air at room temperature. Figure 2 shows resistances of various sized nano-resistor devices at 50ºC, 80ºC, 100ºC, and 120ºC. With the increase of temperature, the resistance increases. Since the resistance is contributed by elements in the current path, i.e., the ITO gate electrode, nano-resistors, interfaces, and the Si wafer, each of which can affect the result. Although the Mo resistance is affected by the temperature [8], the value is much smaller than that of the nano-resistor device in Fig. 2. The resistance of the p-type Si (1015 cm3) changes little in the room temperature to 120ºC range [9]. The resistance of ITO also remains in the same temperature range [10]. Therefore, the temperature effect must be contributed by nano-resistors and interfaces. Figure 3 shows the size effect on the resistance after the 80% humidity and 80℃ annealing. The resistance decreases nonlinearly with the increase of the diameter. Assuming that all nano-resistors are of the same dimension and evenly distributed underneath the gate electrode of area, the resistance vs. device size relationship should follow the Pouillet’s law of R = ρ⋅L/A [1] where R is the resistance, ρ is the resistivity, L is the length, and A is the cross-sectional area. The prediction curve in Fig. 3 was calculated based on the resistance of a 400 µm diameter device. It deviates from the measured data especially in the small diameter range. It was reported that the density of nano-resistors near the edge of the gate is larger than that in the center region [1]. As the device diameter is reduced, the area ratio of the edge region to the total gate electrode increases. Therefore, the density of the nano-resistors increases with the shrinking of the device size, which results in the reduction of the resistance. Also, nano-resistors near the gate electrode edge may be of different sizes from those away from the edge. Moe detailed discuss of the environmental effect will be presented. Lingguang Liu acknowledges the financial support of National Natural Science Foundation of China (Grant Number 61771382) and the Shaanxi International Science and Technology Cooperation and Exchange program (2018KW-034). [1] Y. Kuo and C.-C. Lin, Appl. Phys. Lett., 102, 031117 (2013). [2] Y. Kuo and C.-C. Lin, ECS. Solid-State Lett., 2, Q59 (2013). [3] Y. Kuo and C.-C. Lin, Solid-State Electron., 89, 120 (2013). [4] C.-C. Lin and Y. Kuo, J. Vac. Sci. Technol. B, 32, 011208 (2014). [5] C.-C. Lin and Y. Kuo, ECS J. Solid State Sci. Technol., 3, Q182 (2014). [6] H. Matsubara, T. Sasada, M. Takenaka and S. Takagi, Appl. Phys. Lett., 93, 032104 (2008). [7] S. A. Moiz, M. M. Ahmed and K. S. Karimov, Jpn. J. Appl. Phys., 44, 1199 (2005). [8] R. A. Holmwood and R. Glang, J. Chem. Eng. Data, 10, 162 (1965). [9] W. D. Callister and D. G. Rethwisch, Mat. Sci. Eng.: an introduction, Wiley & Sons New York (2007). [10] Z. Ovadyahu, B. Ovryn and H. Kraner, J. Electrochem. Soc., 130, 917 (1983). Figure 1

Measurement of band offsets and shunt resistance in CdTe solar cells through temperature and intensity dependence of open circuit voltage and photoluminescence

Band offsets at the back contact and front window layer in CdTe-based solar cells affect photovoltaic performance and challenge standard characterization methods. By analyzing the temperature and excitation dependence of both open circuit voltage and absolute photoluminescence intensity, we show that the effects band offsets can be separated from the effects of recombination and shunting. Solar cells were grown with MgZnO window layers and compared to cells with CdS window layers containing varying amounts of oxygen. It was demonstrated that band alignment rather than reduced recombination velocity is the reason for the success of MgZnO as a front interface contact. An assortment of thin back contact interlayers were also deposited, and a PbTe interlayer showed some promise as an Ohmic contact to the CdTe, though it appears to induce a photoconductive shunt. Finally, we show that the shunting resistance given by a standard current-voltage curve technique generally does not represent a physically meaningful quantity unless it is well below one kiloOhm square cm.

Effect of CuPc and PEDOT:PSS as hole transport layers in planar heterojunction CdS/CdTe solar cell

This paper presents the fabrication and photovoltaic performance of new architecture based planar heterojunction CdS/CdTe thin film solar cells which were employed with two hole transport layers (PEDOT:PSS as HTL1 and CuPc as HTL2). The reported solar cells were fabricated through various deposition techniques such as sputtering, thermal evaporation, spin coating and characterized by FESEM, AFM, XPS, UPS and AM 1.5 solar simulator. The interfacial layer growth and chemical state identification of the deposited thin films were studied by cross-sectional FESEM and XPS techniques. The band bending occurs between absorbing and transporting layer helps to inject the excited charge carriers effectively into electrode that was explained using UPS analysis. The present work intends to explain the role of additional window layer (TiO2), buffer layer (CdS) and hole transporting layers (PEDOT:PSS and CuPc) in the novel device architecture. Further, these findings will offer new research directions to address the double hole transport (back contact) layers selection concept in CdS/CdTe heterojunction based solar cells.

The Effects of ZnTe:Cu Back Contact on the Performance of CdTe Nanocrystal Solar Cells with Inverted Structure.

CdTe nanocrystal (NC) solar cells have received much attention in recent years due to their low cost and environmentally friendly fabrication process. Nowadays, the back contact is still the key issue for further improving device performance. It is well known that, in the case of CdTe thin-film solar cells prepared with the close-spaced sublimation (CSS) method, Cu-doped CdTe can drastically decrease the series resistance of CdTe solar cells and result in high device performance. However, there are still few reports on solution-processed CdTe NC solar cells with Cu-doped back contact. In this work, ZnTe:Cu or Cu:Au back contact layer (buffer layer) was deposited on the CdTe NC thin film by thermal evaporation and devices with inverted structure of ITO/ZnO/CdSe/CdTe/ZnTe:Cu (or Cu)/Au were fabricated and investigated. It was found that, comparing to an Au or Cu:Au device, the incorporation of ZnTe:Cu as a back contact layer can improve the open circuit voltage (Voc) and fill factor (FF) due to an optimized band alignment, which results in enhanced power conversion efficiency (PCE). By carefully optimizing the treatment of the ZnTe:Cu film (altering the film thickness and annealing temperature), an excellent PCE of 6.38% was obtained, which showed a 21.06% improvement compared with a device without ZnTe:Cu layer (with a device structure of ITO/ZnO/CdSe/CdTe/Au).

Analysis of back contact layers for flexible CdTe/CdS photovoltaic structures

The article shows the comprehensive results of the experiments, conducted in order to select the appropriate metal layers, for back absorber contacts, to apply in flexible, thin-film photovoltaic cells based on cadmium telluride. Preliminary selection of investigated materials was made on the basis of general knowledge and physical data. Deposition techniques, as well as layer parameters, were adjusted to the specific flexible solar cell’s needs. Selected metal layers were deposited either by physical vapour deposition (PVD) or screen-printing method (SP) and tested in terms of their flexibility, thermal resistance, as well as adhesion to CdTe layer. Practical verification of selected configurations is proved by the complete construction of the device.