Aware Computing Research Articles

Introduction to the Special Section on Energy Efficient Computing

ENERGY efficient computing used to be a concern only for designers of untethered computer and mobile communication systems, where battery size and recharge intervals limited their usefulness. In the past few years, the importance of reducing energy has become a central concern for designers of tethered computers as well because of the power limitations of a standard household power outlet and because they are often deployed in large groups, in the case of server farms. To address the research issues that arise in energy efficient computing, the US Defense Advanced Projects Agency began a program several years ago under the heading Power Aware Computing and Communications (PAC/C). This has led to a wide range of new developments in energy efficient computing and communications. This special issue solicited original papers from, but not restricted to, researchers in the PAC/C program. Our goal was to show the wide range of computer related research that is concerned with minimizing energy consumption in one way or another. Our lead-off paper, “Genetic Approach to Minimizing Energy Consumption of VLSI Processors Using Multiple Supply Voltages,” employs genetic algorithm for module selection and scheduling under the constraints of power and area. The next paper, “Charge-Recovery Computing on Silicon,” presents an overview of energy-recovering systems, focusing on recent developments. The third paper, “A Holistic Approach to Designing Energy-Efficient Cluster Interconnects,” looks at interconnecting networks of computers and addresses the problem of designing the interconnects to be energy-efficient. The fourth paper, “Clustered Loop Buffer Organization for Low Energy VLIW Embedded Processors,” focuses on the microarchitectural level and proposes and analyzes a clustered loop buffer for VLIW-style processors. The analysis shows that such buffers are able to generate a significant amount of energy savings. The fifth paper in our series, “Power-Performance Simulation and Design Strategies for Single-Chip Heterogeneous Multiprocessors,” moves to a higher level of abstraction and proposes a fast and efficient approach for designing and estimating energy consumption for single chip heterogeneous multiprocessors—a common platform for mobile system. The sixth paper, “An Energy Efficient Instruction Set Synthesis Framework for Low Power Embedded System Designs,” returns to the microarchitectural level. It proposes a design time instruction set minimization to reduce instruction cache power. The seventh paper, “Power and Performance Analysis of Motion Estimation Based on Hardware and Software Realizations,” looks at the application level, specifically the power-performance of motion detection in an image processing application. The eighth paper, “Design Considerations for Ultra-Low Energy Wireless Microsensor Nodes,” is a tutorial paper on sensor networks with special emphasis on their power requirements. The penultimate paper, “A Speculative Control Scheme for an Energy-Efficient Banked Register File,” again returns to the microarchitectural level and shows how low power register files can be constructed from smaller faster banks of registers. The last paper, “GAARP: A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks,” proposes an adaptive scalable architecture targeted toward algorithm-specific tasks in which power is a constraint. The architectural model derives its scalability from a set of Globally Asynchronous and Locally Synchronous (GALS) building blocks.

Power-aware scheduling for AND/OR graphs in real-time systems

Power aware computing has become popular, recently and many techniques have been proposed to manage processor energy consumption for traditional real-time applications. In this paper, we are concerned mainly with the AND/OR model of real-time applications that have different execution paths consisting of different tasks. The contribution of this paper is twofold. First, we propose a greedy slack stealing algorithm to deal with applications represented by AND/OR graphs and prove its correctness in terms of meeting the timing constraints. Then, using statistical information about the applications, we propose a few variations of speculative scheduling algorithms that intend to save energy by reducing the number of speed changes (and, thus, the overhead) while ensuring that the application meets its timing constraints. Some practical issues are also considered, such as shared memory access contention and idle energy consumption. The performance of the algorithms is analyzed with respect to processor energy savings. The results surprisingly show that the greedy slack stealing scheme is better than some speculative schemes and that the greedy scheme is good enough when a reasonable minimal speed exists in the system or when there are only a few (four to six) voltage/speed levels.

Predicting context aware computing performance

Computer systems will increasingly need to be sensitive to their context to serve their users better.In this paper we forecast the capabilities of context aware computing and relating it to a time frame.Our short-range analysis indicates such systems will become commercially available and common by 2007.Our mid-range analysis indicates that the development pace of Context Aware systems will start to slow down by 2020 and will reach maturity by 2035.

Predicting context aware computing performance

Computer systems will increasingly need to be sensitive to their context to serve their users better.In this paper we forecast the capabilities of context aware computing and relating it to a time frame.Our short-range analysis indicates such systems will become commercially available and common by 2007.Our mid-range analysis indicates that the development pace of Context Aware systems will start to slow down by 2020 and will reach maturity by 2035.

User interaction with machines on the move: Location aware computing

The aim of current mobile computing systems is to hide the network as far as possible from applications. This paper introduces location aware computing which makes details of the networked computing environment explicitly available to applications. Objects which move, such as people as located and equipment, are electronically tagged. Depending upon where a person is located, and the capabilities of the machines around a person, applications will after their behaviour. This will automate tasks such as logging on and telephone re-routing. Applications will automatically modify themselves to make best use of a person's nearby environment. Audit trails may be created detailing the person's or object's movement allowing time and motion studies to be conducted and the analysis of product movement efficiency within a factory. It is argued that a location aware computing system must address the three main issues of information gathering, data structure and querying and access control. Ideas within these areas are introduced and explained and the concepts of co-location and spheres of influence suggested as paradigms of person-machine interaction.