Automatic Layout Optimization Research Articles

Design of public cultural sign based on Faster-R-CNN and its application in urban visual communication.

People are increasingly enthusiastic about pursuing spiritual life as economic and social development continues. Consequently, public cultural content has emerged as a pivotal instrument for promoting international soft power across diverse nations and regions. In today's era of advanced artificial intelligence, cultural sign design optimization has become achievable through its deployment. This article establishes an automatic layout optimization framework, specifically tailored to meet the visual communication requirements of public cultural signage. Our framework employs Faster-R-CNN for detecting and extracting key elements of the poster, yielding an impressive average detection accuracy of 94.6%. Subsequently, we use the three-division method in design to optimize the layout, ensuring that cultural logo design conforms to visual communication principles. Our framework produced an average cultural logo satisfaction rating exceeding 70% in actual tests, providing novel insights for cultural sign design within the artificial intelligence context and significantly enhancing the efficacy of visual communication conveyed through such signage.

Review of power module automatic layout optimization methods in electric vehicle applications

The layout of power modules is a crucial design consideration, especially for silicon carbide devices. For electrical layout, optimizing the parasitic parameters can improving switching loss and dynamic behavior. For thermal layout, reducing the thermal resistance and controlling thermal capacitance can reduce the local hot point. Conventional layout design iterations are based on human knowledge and experience. But the major drawback of manual design methods is a limited choice of candidates, large time consumption and also the lack of consistency. With the introduce of automatic layout design, these challenges can be overcome which in the meanwhile alleviates current and temperature imbalance. By reviewing element representation, placement, routing, fitness evaluation, and the optimization algorithm approaches, a state-of-the-art power module layout design method for electric vehicle applications is introduced.

The Optimum Layout Research Based on the Calculation of Intelligent Automatic

Computational intelligent algorithm in modern life, more and more extensive application in engineering practice, is mainly used to solve the automatic layout optimization problems, the research on it has important significance. This paper mainly studies intelligent computing algorithm in automatic layout optimization problem in the application, intelligent computation algorithm contains more categories, such as genetic algorithm, ant colony algorithm, simulated annealing algorithm, the algorithm in solving automatic optimum layout problem, have its distinctive place.

Parasitic-Aware Optimization and Retargeting of Analog Layouts: A Symbolic-Template Approach

Layout parasitics can significantly affect the performance of analog integrated circuits (ICs). In this paper, a systematic method of optimizing an existing analog layout considering parasitics is presented for technology migration and performance retargeting. This method represents the locations of layout rectangle edges as variables and extracts circuit and layout integrity such as device symmetry, matching, and design rules as constraints. To ensure the desired circuit performance, bounds of layout parasitics are determined first. These bounds are used to constrain the layout geometries while retargeting existing high-quality layouts across technologies and specification sets. The problem is then solved by a graph-based algorithm combined with nonlinear optimization. The proposed method has been implemented in a parasitic-aware automatic layout optimization and retargeting tool (intellectual property reuse-based analog IC layout). Its efficiency and effectiveness are demonstrated by successfully retargeting operational amplifiers within 1 min of CPU time.

Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization

In this article, we first show that existing net ordering formulations to minimize noise are no longer sufficient with the presence of inductive noise, and shield insertion is needed to minimize inductive noise. Using a K eff model as the figure of merit for inductive coupling, we then formulate two simultaneous shield insertion and net ordering (SINO) problems: the optimal SINO/NF problem to find a minimal area SINO solution that is free of capacitive and inductive noise, and the optimal SINO/NB problem to find a minimal area SINO solution that is free of capacitive noise and is under the given inductive noise bound. We reveal that both optimal SINO problems are NP-hard, and propose effective approximate algorithms for the two problems. Experiments show that our SINO/NB algorithm uses from 51% to 82% fewer shields compared to uniform shield insertion and net ordering (US + NO), and uses from 4% to 47% fewer shields compared to separated net ordering and shield insertion (NO + SI). Furthermore, the SINO/NB solutions under practical noise bounds use from 38% to 61% fewer shields compared to SINO/NF solutions, and use up to 36% fewer shields compared to the theoretical lower bound for optimal SINO/NF solutions. Moreover, we show that the K eff model has a high fidelity versus the noise voltage computed using accurate RLC circuit models and SPICE simulations. To the best of our knowledge, it is the first work that presents an in-depth study on the automatic layout optimization of multiple nets to minimize both capacitive and inductive noise.