Automatic Compilation Research Articles

How To Enumerate the Connectional Isomers of a Toroidal Polyhex Fullerene

A simple algorithm is described for enumerating all isomers of a toroidal polyhex fullerene (a boundless network of three-valent carbon atoms embedded in the surface of an imaginary torus where all the rings or faces are hexagons). An implementation for a PC is convenient for structures of at least 10 000 atoms in size. An extension of this program allows fast and automatic compilation of an adjacency matrix and derivation of a closed trigonometric expression yielding eigenvalues for all structures with fewer than 7200 atoms and, apparently, most others, although a few evaluations beyond this size are more complicated. The simplicity of a strictly polyhex toroidal structure means that, in marked contrast to many chemical enumerations, the total number of isomers increases at only a modest rate and (within the range surveyed) does not exceed approximately 30% of the number of atoms.

The potential for mechanical design compilation

Significant potential exists for engineering design research to produce viable approaches to automatic compilation of mechanical systems.

Implementing bit-addressing with specialization

General media-processing programs are easily expressed with bit-addressing and variable-sized bit-fields. But the natural implementation of bit-addressing relies on dynamic shift offsets and repeated loads, resulting in slow execution. If the code is specialized to the alignment of the data against word boundaries, the offsets become static and many repeated loads can be removed. We show how introducing modular arithmetic into an automatic compiler generator enables the transformation of a program that uses bit-addressing into a synthesizes of fast specialized programs.In partiai-evaluation jargon we say: modular arithmetic is supported by extending the binding time lattice used by the static analysis in a polyvariant compiler generator. The new binding time Cyclic functions like a partially static integer.A software cache combined with a fast, optimistic sharing analysis built into the compilers eliminates repeated loads and stores. The utility of the transformation is demonstrated with a collection of examples and benchmark data. The examples include vector arithmetic, audio synthesis, image processing, and a base-64 codec.

A parsing methodology for the implementation of visual systems

The Visual Language Compiler-Compiler (VLCC) is a grammar-based graphical system for the automatic generation of visual programming environments. In this paper the theoretical and algorithmic issues of VLCC are discussed in detail. The parsing methodology we present is based on the "positional grammar" model. Positional grammars naturally extend context-free grammars by considering new relations in addition to string concatenation. Thanks to this, most of the results from LR parsing can be extended to the positional grammars inheriting the well known LR technique efficiency. In particular, we provide algorithms to implement a YACC-like tool embedded in the VLCC system for automatic compiler generation of visual languages described by positional grammars.

A tabular method for guard strengthening, symmetrization, and operator reduction for Martin's asynchronous design methodology

We introduce a tabular method to perform the last two of the four phases of Martin's compilation process for asynchronous circuit design. The method is then demonstrated with three examples, illustrating that our systematic method is very straight forward, flexible, and convenient to apply, and, hence, it lends itself to automatic compilation.

An introduction to partial evaluation

Partial evaluation provides a unifying paradigm for a broad spectrum of work in program optimization compiling interpretation and the generation of automatic program generators [Bjørner et al. 1987; Ershov 1992; and Jones et al. 1993]. It is a program optimization technique, perhaps better called program specialization , closely related to but different from Jørring and Scherlis' staging transformations [1986]. It emphasizes, in comparison with Burstall and Darlington [1977] and Jørring and Scherlis [1986] and other program transformation work, full automation and the generation of program generators as well as transforming single programs. Much partial evaluation work to date has concerned automatic compiler generation from an interpretive definition of programming language, but it also has important applications to scientific computing, logic programming, metaprogramming, and expert systems; some pointers are given later.

Portable parallelizing Fortran compiler

The Portable Parallelizing Fortran Compiler (PPFC) is an additional component for the portable programming environment developed in Tel-Aviv University for scientific code. This environment supports portable and efficient programming of diverse MIMD multiprocessors, both distributed- and shared-memory. Till now this environment has consisted of two tools: the Virtual Machine for MultiProcessors (VMMP) and the Portable Parallelizing Pascal compiler (P3C). We have added the PPFC which is an automatic parallelizer compiler for the Fortran language. The compiler is fully automatic (does not require additional declarations to assist parallelization), which is characterized by loops operating on regular data structures, and produces efficient and portable code for a variety of multiprocessors from the same serial code. The parallel implementation uses the VMMP, which is a software package that provides a coherent set of services for explicitly parallel application programs running on diverse MIMD multiprocessors. VMMP is intended to simplify parallel program writing and to promote portable and efficient programming. The PPFC parallelized 12 out of the 24 Livermore Loops. It was also applied to parallelize all the 14 Fortran application programs that where parallelized by the P3C and achieved the same speed-ups and efficiencies. In most examples the PPFC achieved high speed-ups and efficiencies on all target multiprocessors. The PPFC emphasizes efficiency and code portability. Although PPFC employs a relatively simple data flow analysis, it produces efficient code for various widely used application programs.

Portable parallelizing Fortran compiler

The Portable Parallelizing Fortran Compiler (PPFC) is an additional component for the portable programming environment developed in Tel-Aviv University for scientific code. This environment supports portable and efficient programming of diverse MIMD multiprocessors, both distributed- and shared-memory. Till now this environment has consisted of two tools: the Virtual Machine for MultiProcessors (VMMP) and the Portable Parallelizing Pascal compiler (P3C). We have added the PPFC which is an automatic parallelizer compiler for the Fortran language. The compiler is fully automatic (does not require additional declarations to assist parallelization), which is characterized by loops operating on regular data structures, and produces efficient and portable code for a variety of multiprocessors from the same serial code. The parallel implementation uses the VMMP, which is a software package that provides a coherent set of services for explicitly parallel application programs running on diverse MIMD multiprocessors. VMMP is intended to simplify parallel program writing and to promote portable and efficient programming. The PPFC parallelized 12 out of the 24 Livermore Loops. It was also applied to parallelize all the 14 Fortran application programs that where parallelized by the P3C and achieved the same speed-ups and efficiencies. In most examples the PPFC achieved high speed-ups and efficiencies on all target multiprocessors. The PPFC emphasizes efficiency and code portability. Although PPFC employs a relatively simple data flow analysis, it produces efficient code for various widely used application programs.

Automatic compiler recognition of monitor tasks

Monitor tasks, also known as passive tasks, are a kind of Ada task that is subject to well-known and very powerful optimization. In most compilation systems that perform this optimization, monitor tasks are identified to the complier by the user, via an implementation-defined pragma. This paper describes an alternate approach, whereby the compiler automatically recognizes and optimizes monitor tasks, without need of a pragma, compiler option, or any other user action. The advantages and disadvantages of this approach are discussed, both in terms of the functional impact to the user and the execution-time efficiency of the optimization.

Design and implementation of a parallel unstructured Euler solver using software primitives

This paper is concerned with the implementation of a three-dimensional unstructured-grid Euler solver on massively parallel distributed-memory computer architectures. The goal is to minimize solution time by achieving high computational rates with a numerically efficient algorithm. An unstructured multigrid algorithm with an edge-based data structure has been adopted, and a number of optimizations have been devised and implemented to accelerate the parallel computational rates. The implementation is carried out by creating a set of software tools, which provide an interface between the parallelization issues and the sequential code, while providing a basis for future automatic run-time compilation support. Large practical unstructured grid problems are solved on the Intel iPSC/860 hypercube and Intel Touchstone Delta machine. The quantitative effects of the various optimizations are demonstrated, and we show that the combined effect of these optimizations leads to roughly a factor of 3 performance improvement. The overall solution efficiency is compared with that obtained on the Cray Y-MP vector supercomputer.

Compiling functional parallelism on distributed-memory systems

We have developed an automatic compilation method that combines data- and code-based approaches to schedule a program's functional parallelism onto distributed memory systems. Our method works with Sisal, a parallel functional language, and replaces the back end of the Optimizing Sisal Compiler so that it produces code for distributed memory systems. Our extensions allow the compiler to generate code for Intel's distributed-memory Touchstone iPSC/860 machines (Gamma, Delta, and Paragon). The modified compiler can generate a partition that minimizes program completion time (for systems with many processors) or the required number of processors (for systems with few processors). To accomplish this, we have developed a heuristic algorithm that uses the new concept of threshold to treat the problem of scheduling as a trade-off between schedule length and the number of required processors. Most compilers for distributed memory systems force the programmer to partition the data or the program code. This modified version of a Sisal compiler handles both tasks automatically in a unified framework, and lets the programmer compile for a chosen number of processors. >

DISTRIBUTED DESIGN OF COMPUTER‐BASED SYSTEMS: TRACEABILITY

AbstractDistributed computer‐based systems are complex due to their size, heterogeneous nature, and the dynamic interdependency of their components. Hardware and software are usually developed by a number of companies which the prime contractor and customer must rigorously monitor and control. Engineers and managers need traceability for control. They must trace requirements and design decision dependencies to create a complete and consistent design, to understand the impact of change, and to perform re‐engineering without introducing errors. Automatic compilation of software and silicon may eventually eliminate the need for traceability between formal specification and end‐product, but traceability will still be needed for tracing textual requirements and design decisions to formal specifications and test cases. This paper discusses the need for traceability, current practice and feasibility.

Parallel and vectorial solving of finite element problems on a shared-memory multiprocessor

Some alternatives for speeding up finite-element computations by use of a vector-parallel shared memory multiprocessor are presented. The whole solution process is dealt with, including the calculation of element contributions (integration), global matrix construction (assembly), and resolution of the large sparse linear systems thus arising. The vector-parallel algorithms are implemented and compared on an Alliant FX/80, providing an automatic compiler, thus making parallel programming easier. The best choice between the possible combinations of the algorithms presented is discussed, considering the global performances. The ICCG (incomplete Cholesky preconditioned conjugate gradient) method, associated with parallel assembly and vectorial integration on finite elements, is the best for smooth problems. With nearly singular matrices, or when a smaller residual on the solution is needed, the direct method gives less time-expensive solutions. >

Implementing sequential machines as self-timed circuits

A self-timed finite state machine (FSM) is described. It is based on a formally proven, efficient implementation of self-timed combinational logic and a self-timed master-slave register. Temporal behavioral constraints are formalized, and the system is shown to abide by them. The synthesis method is algorithmic and serves as an automatic compiler of self-timed FSMs. The specification of the FSM is given by a state table, similar to that of synchronous machines. The circuit operates according to a sequence of events that replaces the role of the central clock in the synchronous FSM. The inputs and outputs of the circuit are double-rail (or ternary) and the circuit produces a completion signal. The method is compared with other approaches. >

A comparative study of automatic vectorizing compilers

We compare the capabilities of several commercially available, vectorizing Fortran compilers using a test suite of Fortran loops. We present the results of compiling and executing these loops on a variety of supercomputers, mini-supercomputers, and mainframes.

局所ＤＴＭ手法による等高線の自動編集

局所ＤＴＭ手法による等高線の自動編集

An environment for evaluation of assembly languages (UAL-E)

This paper deals with the development of an environment for evaluation of assembly languages. The environment, called UAL-E (universal assembly languages environment), consists of three main parts: (a) the UAL kernel used as the common translation ground for other assembly languages; (b) the (SP) software packages used for the translation of an assembly language program into its UAL version and vice versa; and (c) the PROTASK command control language for the synchronization of the UAL-E processes. The UAL-E environment could also be used as an automatic compiler generator.

V-Pascal: An automatic vectorizing compiler for Pascal with no language extensions

An automatic vectorizing compiler called V-Pascal is described in detail. The compiler has been designed and implemented with a view to vectorizing Pascal source programs. Using the mechanism of vector indirect addressing, it reduces multiply nestedfor loops to equivalent single loops, which are then executed by vector mode with sufficiently long vector lengths. TheD matrix, which is an adjacency matrix giving dependences between intermediate code nodes, plays an important role in the V-Pascal compiler. It is demonstrated that, in some cases, the V-Pascal compiler yields object code that runs faster than the Fortran counterpart. This paper mainly presents the basic constituents of the Version 1 of the V-Pascal compiler. Version 2 includes higher functions such as vectorization ofwhile-do loops and recursive procedures, vectorization of character string manipulations and relational database operations (written in Pascal), and automatic parallel decomposition for multiprocessor environments.

Mixed computation and compilation: New approaches to old problems

Mixed computations and partial evaluation are powerful programming tools which any be used for different program manipulations such as macroprocessing, compilation, debugging, installation and solution. The most interesting and most significant advances in the area of mixed computation and partial evaluation are connected with automatic compiler generation and were successful recently in Denmark, Japan, USSR and some other places. This paper presents a survey of different approaches to mixed computation and their comparison. It is shown that a non-trivial partial evaluators needs to use some developed mechanisms of polyvariancy and abstract interpretation. The importance and necessary of a user control over mixed computation is discussed. Some other kinds of program manipulations which can be realised via mixed computation are also considered. These are metaprogramming, incremental computation and sequential decomposition.

Automatic compilation of parallelism in visual object recognition

The paper presents the results of investigations into techniques for automatically generating concurrent implementations of visual object recognition systems from high-level visual domain descriptions. Visual knowledge can be represented using ‘schemata’-object-centred recognition models that intentionally represent classes of related objects. Schemata form hierarchies based on relationships such as composition and function. Schema-based representations contain implicit concurrencies that can be exploited by a recognition system called a ‘recognition network’. The paper presents the design of a simple schema representation language, and shows how it can be automatically transformed into concurrent code. This is done by building a compiler that takes schemata as input and produces a recognition network, in occam, as output. The design of the compiler involves several novel features. The existence of large transputer arrays makes it possible to execute the resulting code with high physical, as well as conceptual, parallelism.