Automated Design Methodology Research Articles

Design and implementation of an embedded 512-KB level-2 cache subsystem

Dual on-chip 512-KB unified second level (L2) caches for an UltraSparc processor are implemented using 0.13-/spl mu/m technology. Each 512-KB unit is implemented using 34 million transistors to achieve 1.4 GHz and 2.6 W at 1.3 V and 85/spl deg/C. This fully integrated subsystem is composed of conventional data and tag SRAMs along with datapaths, controller, and test engines. The unit achieves one of the shortest on-chip L2 cache latencies reported for 64-bit microprocessors, with a data latency of only four cycles including ECC correction for 128-bit data. In addition, balanced custom and automated design methodologies are used to achieve the aggressive design cycle. Architectural and physical design solutions to build this integrated short latency L2 cache are discussed.

MOS current mode circuits: analysis, design, and variability

The interest in MOS current-mode logic (MCML) is increasing because of its ability to dissipate less power than conventional CMOS circuits at high frequencies, while providing an analog friendly environment. Moreover, automated design methodologies are gaining attention by circuit designers to provide shorter design cycles and faster time to market. This paper provides designers with an insight to the different tradeoffs involved in the design of MCML circuits to efficiently and systematically design MCML circuits. A comprehensive analytical formulation for the design parameters of MCML circuits using the BSIM3v3 model is introduced. In addition, a closed-form expression for the noise margin of two-level MCML circuits is derived. In order to verify the validity of the analytical formulations, an automated design methodology for MCML circuits is proposed to overcome the complexities of the design process. The effectiveness of the design methodology and the accuracy of the analytical formulations are tested by designing several MCML benchmarks built in a 0.18-/spl mu/m CMOS technology. The error in the required performance in the designed circuits is within 11% when compared to HSPICE simulations. A worst case parameter variations modeling is presented to investigate the impact of variations on MCML circuits as well as designing MCML circuits for variability. Finally, the impact of variations on MCML circuits is investigated with technology scaling and different circuit architectures.

Design of concurrent test Hardware for Linear analog circuits with constrained hardware overhead

Concurrent detection of failures in analog circuits is becoming increasingly more important as safety-critical systems become more widespread. A methodology for automatic design of concurrent failure detection circuitry for linear analog systems is discussed in this paper. The desired hardware bound is specified as a constraint; the methodology aims at providing coverage in terms of all the circuit components while minimizing the loading overhead by reducing the number of internal circuit nodes that need to be tapped. Parameter tolerances are incorporated through either statistical or mathematical analysis to determine the threshold for failure alarm.

Simplifying multiobjective optimization: An automated design methodology for the nondominated sorted genetic algorithm‐II

Many water resources problems require careful balancing of fiscal, technical, and social objectives. Informed negotiation and balancing of objectives can be greatly aided through the use of evolutionary multiobjective optimization (EMO) algorithms, which can evolve entire tradeoff (or Pareto) surfaces within a single run. The primary difficulty in using these methods lies in the large number of parameters that must be specified to ensure that these algorithms effectively quantify design tradeoffs. This technical note addresses this difficulty by introducing a multipopulation design methodology that automates parameter specification for the nondominated sorted genetic algorithm‐II (NSGA‐II). The NSGA‐II design methodology is successfully demonstrated on a multiobjective long‐term groundwater monitoring application. Using this methodology, multiobjective optimization problems can now be solved automatically with only a few simple user inputs.

Toward a unified and automated design methodology for multi-domain dynamic systems using bond graphs and genetic programming

This paper suggests a unified and automated design methodology for synthesizing designs for multi-domain systems, such as mechatronic systems. A multi-domain dynamic system includes a mixture of electrical, mechanical, hydraulic, pneumatic, and/or thermal components, making it difficult use a single design tool to design a system to meet specified performance goals. The multi-domain design approach is not only efficient for mixed-domain problems, but is also useful for addressing separate single-domain design problems with a single tool. Bond graphs (BGs) are domain independent, allow free composition, and are efficient for classification and analysis of models, allowing rapid determination of various types of acceptability or feasibility of candidate designs. This can sharply reduce the time needed for analysis of designs that are infeasible or otherwise unattractive. Genetic programming is well recognized as a powerful tool for open-ended search. The combination of these two powerful methods is therefore an appropriate target for a better system for synthesis of complex multi-domain systems. The approach described here will evolve new designs (represented as BGs) with ever-improving performance, in an iterative loop of synthesis, analysis, and feedback to the synthesis process. The suggested design methodology has been applied here to three design examples. The first is a domain-independent eigenvalue placement design problem that is tested for some sample target sets of eigenvalues. The second is in the electrical domain––design of analog filters to achieve specified performance over a given frequency range. The third is in the electromechanical domain––redesign of a printer drive system to obtain desirable steady-state position of a rotational load.

OPTIMIZATION OF PROCESS CONDITIONS IN GAS-ASSISTED INJECTION MOLDING

Gas-assisted injection molding has been widely used to provide promising solutions to problems in conventional molding. With additional process parameters introduced, optimization in gas-assisted injection molding is much more complex than in conventional injection molding. This paper proposes an automated design methodology for gas-assisted injection molding with robustness in consideration. By introducing a definition of gas penetration cost, the optimization problems dealing with multiple quality issues can be modeled as constrained optimization problems, with the gas penetration cost as main objective function and other quality quantities as constraints. A direct search-based optimization procedure, the Complex method, is used to optimize a bounded single-criterion problem. To illustrate the proposed methodology, a case study is carried out on simulation results.

Automatic design of multi-variable quantitative feedback theory control systems via evolutionary computation

This paper proposes a multi-objective evolutionary automated design methodology for multi-variable quantitative feedback theory (QFT) control systems. Unlike existing analytical and convex optimization-based QFT design approaches, the evolutionary ‘intelligent’ technique is capable of automatically evolving both the nominal controller and the pre-filter simultaneously to meet the usually conflicting multiple performance requirements in QFT, without going through the sequential and conservative design stages for each of the multi-variable subsystems. In addition, it avoids the need of manual QFT bound computation and trial-and-error loop-shaping design procedures, which are particularly useful for multi-variable or unstable plants where stabilizing controllers may be difficult to synthesize. The effectiveness of the proposed QFT design methodology is validated upon a benchmark multi-variable system, which offers a set of low-order Pareto optimal controllers satisfying all closed-loop performances under practical constraints.

Direct-Search-Based Automatic Minimization of Weldlines in Injection-Molded Parts

This article deals with an automated design methodology for minimization of weldlines by optimizing the part and mold design. Weldlines are quantitatively evaluated based on their length and location and the melt front movement with the aid of commercial injection-molding simulation software which provides an integrated analysis. A combined implementation of the Complex method and injection-molding simulation was developed to reduce and relocate the weldline or to improve the weldline strength. Two parts, Gillette's deodorant base and Cavallero's capacitor can, were chosen for the weldline minimization. Reduction and relocation of weldlines for the deodorant base prevented the cracking problem in the original design. For the capacitor can, the original 15.5-mm weldline was minimized to zero and the burnt mark due to air trap was eliminated by optimizing the gate location. The results of simulation based on the automated design methodology agree well with the experimental findings.

Automated Design Optimization for the P2 and P8 Hypersonic Inlets

An automated design methodology incorporating industry-standard Navier ‐ Stokes codes and a gradient-based optimizer has been developed. This system is used to redesign the well-known NASA P2 and P8 hypersonic inlets. First, the Navier ‐ Stokes simulations of the original P2 and P8 inlet designs are validated using numerical convergence studies and comparison with wind-tunnel experimental data for the original inlets published by NASA in the early 1970s. Second, the P2 and P8 inlets are redesigned with the objective of canceling the cowl shock (and, in the case of the P8 inlet, the additional cowlgenerated compression ) at the centerbody by appropriate contouring of the centerbody boundary. The original inlets were intended to achieve these same objectives, but detailed experimental measurements indicated that a substantial ree ected shock system was present. The choice of the objective function, which is used to drive the optimization, has a signie cant impact on the e nal design. Several different formulations for the objective function have been employed, and improvements of 60 ‐ 90% in the objective function have been achieved. This automated design system represents one of the e rst successful combinations of numerical optimization methods with Reynolds-averaged Navier ‐ Stokes e uid dynamics simulation for high-speed inlets, and demonstrates a new area in which high-performance computing may have considerable impact on problems of military and industrial signie cance.

FSL: a fast structured logic design methodology for high speed GaAs digital integrated circuits

FSL (fast structured logic) is an automated design methodology concept, directed toward the rapid design of III–V integrated circuits and based on the use of small PC orientated workstations. The FSL approach is a flexible and hierarchical design method which offers high levels of integration and performance, and reduced design time while ensuring ‘first pass’ success. Control of onchip high speed interconnects and automatic design verification by construction are important attributes of FSL. This unique chip design approach is technology independent, in that the chip design and functional logic simulation is completed before the semiconductor technology is selected. The chip performance characteristics and topological layout are automatically defined when the GaAs (Gallium arsenide) fabrication process is selected. FSL is a structured logic design approach which allows control of critical parameters through high speed interconnect constraints and significantly shortens the IC development cycle. The design, fabrication and evaluation testing of a 4-bit up/down counter circuit and a 16 stage PN code generator designed with FSL and implemented in GaAs semiconductor technology are described. GaAs chips implemented with FSL have been compared with other design methods. These comparisons indicate packing densities comparable to standard cell approaches, with design cycle times in the order of those required for gate array implementations, while approaching performance levels achieved with handcrafted designs.