Authenticated Encryption Algorithm Research Articles

Reliable Hardware Architectures for Cryptographic Block Ciphers LED and HIGHT

Cryptographic architectures provide different security properties to sensitive usage models. However, unless reliability of architectures is guaranteed, such security properties can be undermined through natural or malicious faults. In this paper, two underlying block ciphers which can be used in authenticated encryption algorithms are considered, i.e., light encryption device and high security and lightweight block ciphers. The former is of the Advanced Encryption Standard type and has been considered area-efficient, while the latter constitutes a Feistel network structure and is suitable for low-complexity and low-power embedded security applications. In this paper, we propose efficient error detection architectures including variants of recomputing with encoded operands and signature-based schemes to detect both transient and permanent faults. Authenticated encryption is applied in cryptography to provide confidentiality, integrity, and authenticity simultaneously to the message sent in a communication channel. In this paper, we show that the proposed schemes are applicable to the case study of simple lightweight CFB for providing authenticated encryption with associated data. The error simulations are performed using Xilinx Integrated Synthesis Environment tool and the results are benchmarked for the Xilinx FPGA family Virtex-7 to assess the reliability capability and efficiency of the proposed architectures.

Research on Applied-Information Technology with Management Pattern of Multi-Media Devices and Design of RFID System

With the extensive development of ways of teaching, multi-media device has become more accessible on campus and its inconveniences of both management and maintenance are also manifested. On the basis of RFID (Radio Frequency Identification) technology, the passage proposes an achievable solution aimed at handling inconveniences with the management and maintenance, including a functional management pattern and a design of RFID system, which uses a two-way authentication and SMS4 encryption algorithm, and moreover, the system adopts CFB pattern to improve its adaptability.

Authenticated encryption on FPGAs from the static part to the reconfigurable part

Recently, techniques have been invented to combine encryption and authentication into a single algorithm which is called Authenticated Encryption (AE). Combining these two security services in hardware produces smaller area compared to two separate algorithms.AE is implemented in the static part of the FPGA (FPGA silicon) in order to secure the reconfiguration process to ensure the confidentiality and integrity of the bitstream. Also, it is used in the reconfigurable part of the FPGA to support applications which need security requirements like Virtual Private Networks (VPNs).This paper presents two different directions for implementing AE cores on FPGAs. First, we present efficient ASIC implementations of AE algorithms, counter with Cipher Block Chaining Mode (CCM) and Galois Counter Mode (GCM), which are used in the static part of the FPGA in order to secure the reconfiguration process. Our focus on state of the art algorithms for efficient implementations leads to propose efficient compact architectures in order to be used for FPGA bitstream security. Presented ASIC architectures were evaluated by using 90 and 130nm technologies. Second, high-throughput GCM architectures are implemented in the reconfigurable part of the FPGA by taking the advantage of slow changing key environments like VPNs and embedded memory protection. The proposed architectures were evaluated using Virtex5 and Virtex4 FPGAs. It is shown that the performance of the presented work outperforms the previously reported ones.

Authenticated Encryption: Toward Next-Generation Algorithms

Wondering whether researchers have a cryptographic tool able to provide both confidentiality (privacy) and integrity (authenticity) of a message? They do: authenticated encryption (AE), a symmetric-key mechanism that transforms a message into a ciphertext. This article discusses standard AE algorithms, classic security models' shortcomings for AE algorithms, and related attacks. Motivated by these attacks, the crypto community started CAESAR (Competition for Authenticated Encryption: Security, Applicability, and Robustness) to promote the development of next-generation AE algorithms.

A lightweight authenticated encryption algorithm for RFID systems

Security of RFID systems is a very important issue with the increasing of their applications. To achieve secure communications between a reader and a tag in RFID systems, encryption of the communication data is usually performed. However, in case of low-cost RFID tags, it is difficult for them to adopt the well-known encryption algorithms because the tags have very limited resources to implement the encryption algorithms. Therefore, in this paper, we propose a new lightweight authenticated symmetric key encryption algorithm for RFID systems which use low-cost tags. To achieve a secure message authentication in the proposed algorithm, redundant bits are contained in a ciphertext. Even though the proposed algorithm uses very lightweight operations for the encryption/decryption, it provides confidentiality, authentication, and integrity.

Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption

Protecting the confidentiality and integrity of a configuration bitstream is essential for the dynamic partial reconfiguration (DPR) of field-programmable gate arrays (FPGAs). This is because erroneous or falsified bitstreams can cause fatal damage to FPGAs. In this paper, we present a high-speed and area-efficient bitstream protection scheme for DPR systems using the Advanced Encryption Standard with Galois/Counter Mode (AES-GCM), which is an authenticated encryption algorithm. Unlike many previous studies, our bitstream protection scheme also provides a mechanism for error recovery and tamper resistance against configuration block deletion, insertion, and disorder. The implementation and evaluation results show that our DPR scheme achieves a higher performance, in terms of speed and area, than previous methods.