Atomic Registers Research Articles

Optical multiqubit gate operations on an excitation-blockaded atomic quantum register

We consider a multiqubit system of atoms or ions with two computational ground states and an interacting excited state in the so-called blockade regime, such that only one qubit can be excited at any one time. Examples of such systems are rare-earth-ion-doped crystals and neutral atoms trapped in tweezer arrays. We present a simple laser excitation protocol that yields a complex phase factor on any desired multiqubit product state, and which can be used to implement multiqubit gates such as the $n$-bit Toffoli gates. The operation is performed using only two pulses, where each pulse simultaneously address all qubits involved in the operation. By relying on the well-established complex hyperbolic secant pulse shape, our scheme is also robust and permits complete transfers to and from the excited states despite variations in Rabi frequencies and transition frequencies. A detailed analysis of the multiqubit gate performance is provided.

Precise and extensive characterization of an optical resonator for cavity-based quantum networks

Cavity-based quantum node is a competitive platform for distributed quantum networks. Here, we characterize a high-finesse Fabry-Pérot optical resonator for coupling single or few atomic quantum registers. Our cavity consists of two mirrors with different reflectivities: One has minimal optical loss, and the other high transmission loss where more than 90% of the intracavity photons would be emitted. Cavity finesse, birefringent effects, and mechanical resonances are measured using the lasers at 780, 782, and 795 nm. In order to obtain cavity geometric parameters, we drive the adjacent longitudinal or transverse modes with two lasers simultaneously, and measure those frequencies using a precision wavelength meter (WLM). A major novelty of this method is that the parameters’ uncertainties are solely determined by the resolution of the WLM, eliminating all of the temporal environment fluctuations. Our scheme makes it possible to quantify the atom-cavity coupling constant up to four significant figures, the most precise and accurate estimation so far, which would become a key ingredient for benchmarking a cavity-based quantum node. Furthermore, the distortion of polarized photonic qubits would be minimized owing to the small birefringent splitting, below 4.9% of the cavity linewidth. Our system should operate in the intermediate atom-cavity coupling regime that would allow us to implement various quantum network protocols.

On atomic registers and randomized consensus in M&M systems

Motivated by recent distributed systems technology, Aguilera et al. introduced a hybrid model of distributed computing, called the message-and-memory model or m&m model for short. In this model, processes can communicate by message passing and also by accessing some shared memory (e.g., through some RDMA connections). We first consider the basic problem of implementing an atomic single-writer multi-reader (SWMR) register shared by all the processes in m&m systems. Specifically, we give an algorithm that implements such a register in m&m systems and show that it is optimal in the number of process crashes that it tolerates. This generalizes the well-known ABD implementation of an atomic SWMR register in a pure message-passing system. We then combine our register implementation for m&m systems with a randomized consensus algorithm of Aspnes and Herlihy, and obtain a randomized consensus algorithm for m&m systems that is also optimal in the number of process crashes that it can tolerate. Finally, we determine the minimum number of RDMA connections that is sufficient to implement a SWMR register, or solve randomized consensus, in an m&m system with t process crashes, for any given t.

Randomized consensus with regular registers

The well-known randomized consensus algorithm by Aspnes and Herlihy (1990) for asynchronous shared-memory systems was proved to work, even against a strong adversary, under the assumption that the registers that it uses are atomic. With atomic registers every read or write operation is instantaneous (and thus indivisible). As pointed out by Golab, Higham, and Woelfel (2011), however, a randomized algorithm that works with atomic registers does not necessarily work if we replace the atomic registers that it uses with linearizable implementations of registers. This raises the following question: does the randomized consensus algorithm by Aspnes and Herlihy still work against a strong adversary if we replace its atomic registers with linearizable registers? We show that the answer is affirmative; in fact we show that even linearizable registers are not necessary. More precisely, we prove that the algorithm by Aspnes and Herlihy works against a strong adversary even if the algorithm uses only regular registers.

RMWPaxos: Fault-Tolerant In-Place Consensus Sequences

Building consensus sequences based on distributed, fault-tolerant consensus, as used for replicated state machines, typically requires a separate distributed state for every new consensus instance. Allocating and maintaining this state causes significant overhead. In particular, freeing the distributed, outdated states in a fault-tolerant way is not trivial and adds further complexity and cost to the system. In this paper, we propose an extension to the single-decree Paxos protocol that can learn a sequence of consensus decisions 'in-place', i.e. with a single set of distributed states. Our protocol does not require dynamic log structures and hence has no need for distributed log pruning, snapshotting, compaction, or dynamic resource allocation. The protocol builds a fault-tolerant atomic register that supports arbitrary read-modify-write operations. We use the concept of consistent quorums to detect whether the previous consensus still needs to be consolidated or is already finished so that the next consensus value can be safely proposed. Reading a consolidated consensus is done without state modifications and is thereby free of concurrency control and demand for serialisation. A proposer that is not interrupted reaches agreement on consecutive consensus decisions within a single message round-trip per decision by preparing the acceptors eagerly with the previous request.

A scalable two-dimensional moving electric lattice on a chip for polar molecules

Cold atoms and polar molecules have long been candidates for the implementation of quantum information processing. Although many schemes of two-dimensional (2D) moving optical or magnetic lattices have been proposed for atomic shift register, little work has been done on 2D electric lattice for molecular shift register, mainly due to the complexity of molecular energy level structures as well as the challenge to build micropotentials that are scalable, smoothly moving and accurately controlled. Here we present a design of chip-based 2D electric lattice for molecular shift register capable of scaling and controlling, which mainly consists of arrays of equidistant gold electrodes for generating a moving electric lattice. Our theoretical analysis and trajectory calculations, based on the polar molecules ammonia-D3 (ND3) and methylidyne radical (CH), show explicitly that the 2D lattice is able to directly slow down arrays of polar molecules from supersonic speeds to a standstill over a distance of a few centimeters, and then hold them for a certain time or shift them back in a smooth manner. Besides, it also enables decelerating and trapping of the two molecular species simultaneously, which contributes to the understanding towards new phenomena such as novel quantum mechanical collisions and cold chemistry.

Nondestructive Cooling of an Atomic Quantum Register via State-Insensitive Rydberg Interactions.

We propose a protocol for sympathetically cooling neutral atoms without destroying the quantum information stored in their internal states. This is achieved by designing state-insensitive Rydberg interactions between the data-carrying atoms and cold auxiliary atoms. The resulting interactions give rise to an effective phonon coupling, which leads to the transfer of heat from the data atoms to the auxiliary atoms, where the latter can be cooled by conventional methods. This can be used to extend the lifetime of quantum storage based on neutral atoms and can have applications for long quantum computations. The protocol can also be modified to realize state-insensitive interactions between the data and the auxiliary atoms but tunable and nontrivial interactions among the data atoms, allowing one to simultaneously cool and simulate a quantum spin model.

The computational structure of progress conditions and shared objects

We study the effect of different progress conditions on the computability of distributed systems. For a system with n processes, we define exponentially many new progress conditions and explore their properties and relative strength. We cover many known and new interesting conditions and propose a new classification for evaluating the strength of shared objects. The classification is based on finding, for each object of type o, the strongest progress condition for which it is possible to solve consensus for any number of processes, using any number of objects of type o and atomic registers. Comparing our classification with the traditional one, which is based on fixing the progress condition (namely, wait-freedom) and finding the largest number of processes for which consensus is solvable, reveals interesting results. Together with our technical results, the new definitions provide a deeper understanding of synchronization and concurrency.

Anonymous Readers Counting: A Wait-Free Multi-Word Atomic Register Algorithm for Scalable Data Sharing on Multi-Core Machines

In this article we present Anonymous Readers Counting (ARC), a multi-word atomic (1,N) register algorithm for multi-core machines. ARC exploits Read-Modify-Write (RMW) instructions to coordinate the writer and reader threads in a wait-free manner and enables large-scale data sharing by admitting up to $(2^{32}-2)$ concurrent readers on off-the-shelf 64-bit machines, as opposed to the most advanced RMW-based approach which is limited to 58 readers on the same kind of machines. Further, ARC avoids multiple copies of the register content when accessing it—this is a problem that affects classical register algorithms based on atomic read/write operations on single words. Thus it allows for higher scalability with respect to the register size. Moreover, ARC explicitly reduces the overall power consumption, via a proper limitation of RMW instructions in case of read operations re-accessing a still-valid snapshot of the register content, and by showing constant time for read operations and amortized constant time for write operations. Our proposal has therefore a strong focus on real-world off-the-shelf architectures, allowing us to capture properties which benefit both performance and power consumption. A proof of correctness of our register algorithm is also provided, together with experimental data for a comparison with literature proposals. Beyond assessing ARC on physical platforms, we carry out as well an experimentation on virtualized infrastructures, which shows the resilience of wait-free synchronization as provided by ARC with respect to CPU-steal times, proper of modern paradigms such as cloud computing. Finally, we discuss how to extend ARC for scenarios with multiple writers and multiple readers—the so called (M,N) register. This is achieved not by changing the operations (and their wait-free nature) executed along the critical path of the threads, rather only changing the ratio between the number of buffers keeping the register snapshots and the number of threads to coordinate, as well as the number of bits used for counting readers within a 64-bit mask accessed via RMW instructions—just depending on the target balance between the number of readers and the number of writers to be supported.

Time-efficient read/write register in crash-prone asynchronous message-passing systems

The atomic register is one of the most basic and useful object of computing science, and its simple read-write semantics is appealing when programming distributed systems. Hence, its implementation on top of crash-prone asynchronous message-passing systems has received a lot of attention. It was shown that having a strict minority of processes that may crash is a necessary and sufficient requirement to build an atomic register on top of a crash-prone asynchronous message-passing system. This paper visits the notion of a fast implementation of an atomic register, and presents a new time-efficient asynchronous algorithm that reduces latency in many cases: a write operation always costs a round-trip delay, while a read operation costs a round-trip delay in favorable circumstances (intuitively, when it is not concurrent with a write). When designing this algorithm, the design spirit was to be as close as possible to the original algorithm proposed by Attiya, Bar-Noy, and Dolev.

Optimal self-stabilizing synchronous mobile Byzantine-tolerant atomic register

This paper addresses for the first time the problem of MWMR atomic memory in a Mobile Byzantine Agents model. The register is maintained by n servers and faulty (Byzantine) agents move from one server to another and when they are affecting a server, this one behaves arbitrarily. This paper addresses the round-based synchronous communication model. We focus on four Mobile Byzantine Failure models differing in the diagnosis capabilities at server side. We address the case when servers can diagnose their failure state (that is, servers are aware that the mobile Byzantine agent has left), and the case when servers cannot self-diagnose.We first prove lower bounds on the number of servers n necessary to construct a safe register tolerant to the presence of f<n Mobile Byzantine Failures for four Mobile Byzantine Failure models. Additionally, we prove that our lower bounds do not change when the system is affected by any number of transient failures.Furthermore, we propose a parametric algorithm that implements an atomic MWMR register algorithm working in all the above models and matches the lower bounds. Additionally, our algorithm is also self-stabilizing. That is, started in an arbitrary state (i.e. after the occurrence of a transient failure) it is able to self-recover a correct behavior in a finite, bounded number of rounds. Our algorithm tolerates (i) any number of transient failures and (ii) up to f Mobile Byzantine Failures.

A Closer Look at Fault Tolerance

The traditional notion of fault tolerance requires that all the correct participating processes eventually terminate, and thus, is not sensitive to the number of correct processes that should terminate as a result of failures. Intuitively, an algorithm that in the presence of any number of faults always guarantees that all the correct processes except maybe one terminate, is more resilient to faults than an algorithm that in the presence of a single fault does not even guarantee that a single correct process ever terminates. However, according to the standard notion of fault tolerance both algorithms are classified as algorithms that can not tolerate a single fault. To overcome this difficulty, we generalize the traditional notion of fault tolerance in a way which enables to capture more sensitive information about the resiliency of an algorithm. Then, we present several algorithms for solving classical problems which are resilient under the new notion. It is well known that, in an asynchronous systems where processes communicate either by reading and writing atomic registers or by sending and receiving messages, important problems such as, consensus, set-consensus, election, perfect renaming, implementations of a test-and-set bit, a shared stack, a swap object and a fetch-and-add object have no deterministic solutions which can tolerate even a single fault. We show that while, some of these problems have solutions which guarantee that in the presence of any number of faults most of the correct processes will terminate; other problems do not even have solutions which guarantee that in the presence of just one fault at least one correct process terminates. All our results are presented in the context of crash failures in asynchronous systems.

Anonymous obstruction-free (n, k)-set agreement with $$n-k+1$$ n - k + 1 atomic read/write registers

The k-set agreement problem is a generalization of the consensus problem. Namely, assuming that each pro- cess proposes a value, every non-faulty process must decide one of the proposed values, under the constraint that at most k different values are decided. This is a hard problem in the sense that it cannot be solved in a pure read/write asyn- chronous system, in which k or more processes may crash. One way to sidestep this impossibility result consists in weak- ening the termination property, requiring only that a process decides if it executes alone during a long enough period of time. This is the well-known obstruction-freedom progress condition. Consider a system of n anonymous asynchronous processes that communicate through atomic read/write reg- isters, and such that any number of them may crash. This paper addresses and solves the challenging open problem of designing an obstruction-free k-set agreement algorithm with only (n −k +1) atomic registers. From a shared memory cost point of view, our algorithm is the best algorithm known to date, thereby establishing a new upper bound on the number of registers needed to solve this problem. For the consensus case (k = 1), the proposed algorithm is up to an additive factor of 1 close to the best known lower bound. Further, the paper extends this algorithm to obtain an x-obstruction- free solution to the k-set agreement problem that employs (n − k + x) atomic registers (with 1 ≤ x ≤ k < n), as well as a space-optimal solution for the repeated ver- sion of k-set agreement. Using this last extension, we prove that n registers are enough for every colorless task that is obstruction-free solvable with identifiers and any number of registers

A necessary condition for Byzantine k-set agreement

This short paper presents a necessary condition for Byzantine k-set agreement in (synchronous or asynchronous) message-passing systems and asynchronous shared memory systems where the processes communicate through atomic single-writer multi-reader registers. It gives a proof, which is particularly simple, that k-set agreement cannot be solved t-resiliently in an n-process system when n≤2t+tk. This bound is tight for the case k=1 (Byzantine consensus) in synchronous message-passing systems.

Read/write shared memory abstraction on top of asynchronous Byzantine message-passing systems

This paper is on the construction and use of a shared memory abstraction on top of an asynchronous message-passing system in which up to t processes may commit Byzantine failures. This abstraction consists of arrays of n single-writer/multi-reader atomic registers, where n is the number of processes. These registers enable Byzantine tolerance by recording the whole history of values written to each one of them. A distributed algorithm building such a shared memory abstraction is first presented. This algorithm assumes t<n/3, which is shown to be a necessary and sufficient condition for such a construction. Hence, the algorithm is resilient-optimal.Then the paper presents distributed objects built on top of this read/write shared memory abstraction, which cope with Byzantine processes. As illustrated by these objects, the proposed shared memory abstraction is motivated by the fact that, for a lot of problems, algorithms are simpler to design and prove correct in a shared memory system than in a message-passing system.

Symbolic abstract data type inference

Formal specification is a vital ingredient to scalable verification of software systems. In the case of efficient implementations of concurrent objects like atomic registers, queues, and locks, symbolic formal representations of their abstract data types (ADTs) enable efficient modular reasoning, decoupling clients from implementations. Writing adequate formal specifications, however, is a complex task requiring rare expertise. In practice, programmers write reference implementations as informal specifications. In this work we demonstrate that effective symbolic ADT representations can be automatically generated from the executions of reference implementations. Our approach exploits two key features of naturally-occurring ADTs: violations can be decomposed into a small set of representative patterns, and these patterns manifest in executions with few operations. By identifying certain algebraic properties of naturally-occurring ADTs, and exhaustively sampling executions up to a small number of operations, we generate concise symbolic ADT representations which are complete in practice, enabling the application of efficient symbolic verification algorithms without the burden of manual specification. Furthermore, the concise ADT violation patterns we generate are human-readable, and can serve as useful, formal documentation.

Distributed Universality

A notion of a universal construction suited to distributed computing has been introduced by Herlihy in his celebrated paper "Wait-free synchronization" (ACM Trans Program Lang Syst 13(1):124---149, 1991). A universal construction is an algorithm that can be used to wait-free implement any object defined by a sequential specification. Herlihy's paper shows that the basic system model, which supports only atomic read/write registers, has to be enriched with consensus objects to allow the design of universal constructions. The generalized notion of a k-universal construction has been recently introduced by Gafni and Guerraoui (Proceedings of 22nd international conference on concurrency theory (CONCUR'11), Springer LNCS 6901, pp 17---27, 2011). A k-universal construction is an algorithm that can be used to simultaneously implement k objects (instead of just one object), with the guarantee that at least one of the k constructed objects progresses forever. While Herlihy's universal construction relies on atomic registers and consensus objects, a k-universal construction relies on atomic registers and k-simultaneous consensus objects (which are wait-free equivalent to k-set agreement objects in the read/write system model). This paper significantly extends the universality results introduced by Herlihy and Gafni---Guerraoui. In particular, we present a k-universal construction which satisfies the following five desired properties, which are not satisfied by the previous k-universal construction: (1) among the k objects that are constructed, at least$$\ell $$l objects (and not just one) are guaranteed to progress forever; (2) the progress condition for processes is wait-freedom, which means that each correct process executes an infinite number of operations on each object that progresses forever; (3) if any of the k constructed objects stops progressing, all its copies (one at each process) stop in the same state; (4) the proposed construction is contention-aware, in the sense that it uses only read/write registers in the absence of contention; and (5) it is generous with respect to the obstruction-freedom progress condition, which means that each process is able to complete any one of its pending operations on the k objects if all the other processes hold still long enough. The proposed construction, which is based on new design principles, is called a $$(k,\ell )$$(k,l)-universal construction. It uses a natural extension of k-simultaneous consensus objects, called $$(k,\ell )$$(k,l)-simultaneous consensus objects ($$(k,\ell )$$(k,l)-SC). Together with atomic registers, $$(k,\ell )$$(k,l)-SC objects are shown to be necessary and sufficient for building a $$(k,\ell )$$(k,l)-universal construction, and, in that sense, $$(k,\ell )$$(k,l)-SC objects are $$(k,\ell )$$(k,l)-$$ {universal}$$universal.

Practically stabilizing SWMR atomic memory in message-passing systems

A fault-tolerant and practically stabilizing simulation of an atomic register is presented. The simulation works in asynchronous message-passing systems, and allows a minority of processes to crash. The simulation stabilizes in a practically stabilizing manner, by reaching a long execution in which it runs correctly. A key element in the simulation is a new combinatorial construction of a bounded labeling scheme accommodating arbitrary labels, including those not generated by the scheme itself.

The Space Complexity of Long-Lived and One-Shot Timestamp Implementations

This article is concerned with the problem of implementing an unbounded timestamp object from multiwriter atomic registers, in an asynchronous distributed system of n processes with distinct identifiers where timestamps are taken from an arbitrary universe. Ellen et al. [2008] showed that √ n /2 − O (1) registers are required for any obstruction-free implementation of long-lived timestamp systems from atomic registers (meaning processes can repeatedly get timestamps). We improve this existing lower bound in two ways. First we establish a lower bound of n /6 − 1 registers for the obstruction-free long-lived timestamp problem. Previous such linear lower bounds were only known for constrained versions of the timestamp problem. This bound is asymptotically tight; Ellen et al. [2008] constructed a wait-free algorithm that uses n − 1 registers. Second we show that √2 n − log n − O (1) registers are required for any obstruction-free implementation of one-shot timestamp systems (meaning each process can get a timestamp at most once). We show that this bound is also asymptotically tight by providing a wait-free one-shot timestamp system that uses at most ⌈2√ n ⌉ registers, thus establishing a space complexity gap between one-shot and long-lived timestamp systems.

Computing with infinitely many processes

We explore four classic problems in concurrent computing (election, mutual exclusion, consensus, and naming) when the number of processes which may participate is unbounded. Partial information about the number of processes actually participating and the concurrency level is shown to affect the computability and complexity of solving these problems when using only atomic registers. We survey and generalize work carried out in models with known bounds on the number of processes, and prove several new results. These include improved bounds for election when participation is required and a new adaptive starvation-free mutual exclusion algorithm for unbounded concurrency. We also survey results in models with shared objects stronger than atomic registers, such as test&set bits, semaphores or read–modify–write registers, and update them for the unbounded case.