ATLAS Module Research Articles

Breakdown voltage enhancement in Ga2O3 based Schottky diode

The easiness of today’s era cannot be visualized with generation and distribution of power. The loss of power during its distribution and management is the prime focus of power device community. For this, wide bandgap semiconductors are choice compared to its conventional counterparts. However the power devices developed on wide bandgap semiconductor have reliability issues like long term operation and limited performance in reverse bias. The aim of the present study is to introduce a technique to improve the early breakdown of the device, which is area efficient as well. Efforts have been made to enhance the blocking voltage of the device via terminating its edges. In this work, device is designed with atlas module of the Silvaco TCAD software. Relevant models like Schokely-Read-Hall recombination, conductivity dependent mobility, impact ionization, etc., have been. The electric field and potential profiles in the unterminated and terminated devices have been compared. Moreover, breakdown voltage in the same structures have been estimated and compared.

Simulation study on electrical properties of p-GaN gate normally-off HEMT devices affected by Al mole fraction in AlGaN barrier layer

The reason that p-GaN gate normally-off high electron mobility transistor (HEMT) device is able to draw prevail interests is not only for its outstanding electric properties of low on-resistance and high thermal conductivity, but also for its applications under high frequency and high voltage. In HEMT devices, the setting of Al component in the AlGaN barrier layer is a key parameter to affect the formation of two-dimensional electron gas (2DEG) at the AlGaN/GaN heterojunction, and therefore directly determines the performance of the devices. This paper uses the Atlas module of the Silvaco-TCAD software to design and simulate p-GaN gate normally-off HEMT devices to investigate the effect of Al mole fraction content in the AlGaN barrier layer on the electrical performance, as well as the causes in terms of the conduction band energy structure diagram. The results show that the threshold voltage of the HEMT device decreases, the maximum saturation drain current increases, and the peak transductance of the HEMT device increases with increasing the Al content. In the off-state (zero gate voltage), the AlGaN/GaN potential well depth becomes deeper as the Al mole fraction increases, resulting in a lower driven force to rebuild the minimized 2DEG concentration in the GaN layer for switching from off-state to on-state, and this leads to a lower threshold voltage. While, in the on-state (5 V gate voltage), the deeper AlGaN/GaN potential well depth as the Al mole fraction increases, the higher of the 2DEG concentration of the GaN layer, leading to a higher maximum saturation output drain current. After optimization, the integrated electrical performance of the HEMT devices has been found best when the Al mole fraction content is about 0.25. The results obtained from the simulations are helpful for the experimental design of p-GaN gate normally-off HEMT devices

Performance Evaluation of Fully Depleted Silicon on Insulator MOSFET

VLSI technology development nowadays is mostly focused on the downsizing of semiconductor devices, which is significantly reliant on advancements in complementary metal-oxide-semiconductor technology. Due to capacitance, shorter channel length, body biassing, faster-switching transistor, limited variability, and faster running transistor, Silicon-on-Insulator technology has seen a lot of changes. In comparison to traditional bulk technology, Silicon on Insulator offers intriguing new possibilities. The recent stalling of advancement in CMOS technology has been noticed. A fully depleted silicon on the insulator provides additional performance. Power usage and communication speed are two areas where performance can be improved. Silicon on insulator technology has the potential to reduce power consumption by nearly half while increasing speed by about 40%. Using the Atlas module of the SILVACO software, the research presents a comprehensive analysis of silicon on insulator-based nano metal oxide semiconductor field-effect transistors. Atlas is used to virtually construct a 20 nm silicon on insulator MOSFET. The gate metals employed are Aluminum, N. poly, W (Tungsten), and WSi2 (Tungsten Silicide), and their respective characteristics are obtained and compared. Finally, WSi2 was chosen as the final gate metal because it has the desired band offset, resulting in a positive threshold voltage without the need for any further implants in the channel region. Other metrics are collected, such as the variation of ID vs. VGS features at various values. There is also a fluctuation in drain current as a function of drain to source voltage.

Cost-saving and performance-enhancement of CuInGaSe solar cells by adding CuZnSnSe as a second absorber

CuInGaSe (CIGS) based solar cells are promising, but involve costly and hazardous and costly indium element. This work aims at solving these problems, without sacrificing the benefits of CIGS systems. The approach is to use thinner CIGS layers. However, very thin layers minimize absorption and lower cell performance. Adding a second CuZnSnSe (CZTSe)-layer absorber should maintain high cell performance. The new proposed cell that has been simulated is MgF2/ZnO/Al/ZnO:i/CdS(n)/CZTSe(p)/CIGS(p)/Mo, with MgF2 antireflection layer, ZnO:i passivating layer, CdS emitter layer, CZTSe/CIGS double absorber layer, ZnO-Al transparent conductor oxide(TCO) and element almolybdenum (Mo) back contact. A ZnO-Al film has been experimentally electrodeposited onto FTO/Glass substrate, and then characterized. TCAD SILVACO using ATLAS module has been used in the simulation. Various parameters, including layer-thickness and doping-concentration, are optimized, keeping smaller CIGS-layer thickness. Band-diagrams, carrier-concentrations and current–density, in addition to possible recombination processes, are investigated to assess performance enhancement. The results show that increasing the one-absorber CIGS-layer thickness by 2.5-fold, increases conversion efficiency from 22.3 to 24.3% only, which does not justify the extra costs. Alternatively, efficiency improves from 22.40 to 29.22% by adding CZTSe to a thin 1.0 μm CIGS layer. In conclusion, the study highlights the added value for the second-absorber layer.

Statistical Optimization Influence on High Permittivity Gate Spacer in 16nm DG-FinFET Device

In this paper, the effect of high permittivity gate spacer on short channel effects (SCEs) for the 16 nm double-gate finFET is investigated, with the output responses optimized using L9 orthogonal array (OA) Taguchi method. The determination is done through Signal-to-noise ratio to the effectiveness of the process parameters towards four output responses such as threshold voltage (VTH), drive current (ION), leakage current (IOFF) and Subthreshold Swing (SS). The virtual fabrication of the 16 nm double-gate fin FET was performed using ANTHENA module while the electrical characteristics of the device were simulated using ATLAS module. These two modules were combined with Taguchi method to aid in designing and optimizing the process parameters. The electrical characterization was performed and significant improvement could be seen on the TiO2 and HfO2 material in terms of the ION/IOFF ratio obtained at 4.03106 and 3.61106 respectively for 0.179±12.7% V of VTH. It can be observed that when approaching a higher value of dielectric constant (high-K), the ION increases while the SS and IOFF decreases. As conclusion, the output responses from high-K materials have been proven to meet the minimum requirement by International Technology Roadmap Semiconductor (ITRS) 2013 for high performance Multi-Gate technology for the year 2015.

Simulation Study on the Effect of Doping Concentrations on the Photodetection Properties of Mg2Si/Si Heterojunction Photodetector

To develop and design an environmentally friendly, low-cost shortwave infrared (SWIR) photodetector (PD) material and extend the optical response cutoff wavelengths of existing silicon photodetectors beyond 1100 nm, high-performance silicon-compatible Mg2Si/Si PDs are required. First, the structural model of the Mg2Si/Si heterojunction was established using the Silvaco Atlas module. Second, the effects of the doping concentrations of Mg2Si and Si on the photoelectric properties of the Mg2Si/Si heterojunction PD, including the energy band, breakdown voltage, dark current, forward conduction voltage, external quantum efficiency (EQE), responsivity, noise equivalent power (NEP), detectivity, on/off ratio, response time, and recovery time, were simulated. At different doping concentrations, the heterojunction energy band shifted, and a peak barrier appeared at the conduction band of the Mg2Si/Si heterojunction interface. When the doping concentrations of Si and Mg2Si layer were 1017, and 1016 cm−3, respectively, the Mg2Si/Si heterojunction PD could obtain optimal photoelectric properties. Under these conditions, the maximum EQE was 70.68% at 800 nm, the maximum responsivity was 0.51 A/W at 1000 nm, the minimum NEP was 7.07 × 10−11 WHz–1/2 at 1000 nm, the maximum detectivity was 1.4 × 1010 Jones at 1000 nm, and the maximum on/off ratio was 141.45 at 1000 nm. The simulation and optimization result also showed that the Mg2Si/Si heterojunction PD could be used for visible and SWIR photodetection in the wavelength range from 400 to 1500 nm. The results also provide technical support for the future preparation of eco-friendly heterojunction photodetectors.

Application of Computer-assisted Surgery in Urology

The purpose of this scientific article is to show the possibility of using the HoloDoctor software and hardware complex, which includes the following modules: the anatomical atlas module, the data analysis module and the surgical intervention simulation module. HoloDoctor allows us to perform surgical operations in real time. The time of operations using the HoloDoctor is reduced by 20-30% compared to traditional methods. The developed complex provides diagnostics of treatment planning, correction of the treatment plan, minimizing the risk of medical error. The developed product can be used in educational practice by introducing it into educational programs of medical specialties.

Cap layer effect in DC and RF characteristics of InP based n-p-n metamorphic δ-doped heterojunction bipolar transistor

ABSTRACT The effect of InGaAsP and InGaAs cap layers in InP n-p-n heterojunction bipolar transistor (HBT) is presented. The common figures of merit (FOM) in each case are compared to assess their potentials for operation at high frequency. The Gummel-Poon plot of experimental reported result has been used to validate the data obtained from simulation using ATLAS module of Silvaco software tool. After models validation in TCAD tool, the DC and RF characteristics of the HBTs with different cap layers are examined and then a comparative analysis is carried out based on the characteristics such as I–V behaviour, frequency response, minimum noise figure and maximum cut-off frequency. With the change in InGaAs cap to InGaAsP cap, the DC current gain increases from 255 to 300, VCE,offset is reduced from 131 to 76 mV, Early Voltage (VA) increases from −42 to −190 V, cut-off frequency ft is increased from 24.34 MHz to 8.04 GHz, and the maximum oscillation of frequency(fmax) is improves from 13.79 to 37.11 GHz

Design and simulation of Mg<sub>2</sub>Si/Si avalanche photodiode

InGaAs and HgCdTe materials are widely used in short wave infrared photodetectors, which contain heavy metal elements. The massive use of the heavy metal elements naturally results in their scarcity, and the nonnegligible environmental pollution. Searching for other suitable materials for infrared devices becomes a key to solving the above problems. As a kind of abundant and eco-friendly material, Mg<sub>2</sub>Si has a high absorption coefficient in the near-infrared band. Its application in infrared detector makes it possible to replace the infrared devices containing toxic elements on the market in the future. The Mg<sub>2</sub>Si/Si avalanche photodiode(APD) with separation structure of absorption layer, charge layer and multiplication layer, with Mg<sub>2</sub>Si serving as the absorption layer, is constructed by using the Atlas module in Silvaco software. The effects of the thickness and doping concentration of the charge layer and multiplier layer on the distribution of internal electric field, punch-through voltage, breakdown voltage (<i>V</i><sub>b</sub>), <i>C-</i><i>V</i> characteristics, and transient response of Mg<sub>2</sub>Si/Si SACM-APD are simulated. The effects of bias voltage on the <i>I-</i><i>V</i> characteristics and spectral response are analyzed. The punch-through voltage, breakdown voltage, dark current density, gain coefficient (<i>M</i><i><sub>n</sub></i>) and the current amplification factor (<i>M</i>) after avalanche effect of APD are obtained after the structure optimization. According to the simulation results, the spectral response wavelength of the device is extended to 1.6 μm, so the selection of Mg<sub>2</sub>Si as the absorption layer effectively extends the spectral response band of Si based APD. When the wavelength of incident light is 1.31 µm and the optical power is 10 mW/cm<sup>2</sup>, the obtained punch-through voltage is 17.5 V, and the breakdown voltage is 50 V. When the bias voltage is 47.5 V (0.95<i>V</i><sub>b</sub>), the peak value of spectral response is 25 A/W at a wavelength of 1.1 μm, a density of dark current is about 3.6 × 10<sup>–5</sup> A/cm<sup>2</sup>, a multiplication factor <i>M</i><i><sub>n</sub></i> is 19.6, and <i>M</i><i><sub>n</sub></i> achieves a maximum value of 102 when the device is broken down. Meanwhile, the current amplification factor <i>M</i> after avalanche effect is 75.4, and the current gain effect of the SACM structure is obvious. The peak value of spectral response for the pin-type photodiode in the previous study is only 0.742 A/W. Comparing with the pin-type photodiode, the spectral response of Mg<sub>2</sub>Si/Si SACM-APD is greatly improved. In this work, the structure parameters of the device are optimized, which lays a nice foundation for fabricating the high-performance devices.

Numerical analysis of dopant‐free asymmetric silicon heterostructure solar cell with SiO 2 as passivation layer

Conventional silicon heterojunction solar cells employ defects-prone a-Si:H layers for junction formation and passivation purposes. Substituting these layers with hole-selective MoOx and electron-selective TiOx can reduce parasitic absorption and energy band offsets issues associated with doped silicon films. In this work, dopant-free asymmetric heterostructure Si solar cells are studied with and without SiO2 passivation layer, and their performance has been compared. The inclusion of ultrathin SiO2 insulator as a passivation layer promotes significant band bending that induces interface inversion of crystalline silicon as well as maintains the electric field required to tunnel charge carriers. The energy band diagram studies and variation of oxide thickness show that the IV characteristics of the solar cell critically depend on the insulator thickness; as the carriers tunnelling through the insulator becomes negligible at larger thicknesses. The simulated structure with MoOx as front hole-selective contact and without any passivation exhibited conversion efficiency of 15.73%, which improved to 18.69% by incorporating passivated a-Si:H. However, by employing rear SiO2/TiOx stack with the front SiO2/MoOx, the device performance enhanced to open-circuit voltage of 785 mV, short-circuit current density of 41 mA/cm2, fill factor of 77%, and simulated conversion efficiency of 24.83%, which is ∼10% enhancement in the performance as compared to reference device employing traditional a-Si:H with dopant-free films. Novelty Statement For the first time, a dopant-free asymmetric silicon heterostructure solar cell (DASH) employing silicon oxide (SiO2) as a passivation layer has been physically modelled using Silvaco TCAD. The dopant-free MoOx and TiOx as hole- and electron-selective contacts have been incorporated. An ultrathin SiO2 promotes band bending that induces interface inversion of absorber as well as facilitating carrier tunnelling. An efficiency of 24.83% has been numerically attained which is the best performance among DASH structures designed with oxide passivation. The 2-D cross-section view of the proposed device employing dopant-free layers and oxide passivated film is illustrated in Figure 1 for which we have applied memory intensive numerical method based on the computation of Poisson, charge transport and continuity equations in the Silvaco ATLAS module. In order to undertake in-depth analysis of the proposed structure, a simple device based on MoOx/cSi wafer was first designed and simulated in order to understand the charge transport behaviour. The electrical and optical parameters for various layers have been shown in the Table and the current density due to tunnelling of charge carriers across Silicon oxide (SiO2) passivated layer has been calculated via Fowler-Nordheim approximation. The reference structure with traditional intrinsic a-Si:H has also been simulated.

Optimization of 16 nm DG-FinFET using L25 orthogonal array of taguchi statistical method

<span>The impact of the optimization using Taguchi statistical method towards the electrical properties of a 16 nm double-gate FinFET (DG-FinFET) is investigated and analyzed. The inclusion of drive current (I<sub>ON</sub>), leakage current (I<sub>OFF</sub>), and threshold voltage (V<sub>TH</sub>) as part of electrical properties presented in this paper will be determined by the amendment of six process parameters that comprises the polysilicon doping dose, polysilicon doping tilt, Source/Drain doping dose, Source/Drain doping tilt, V<sub>TH</sub> doping dose, V<sub>TH</sub> doping tilt, alongside the consideration of noise factor in gate oxidation temperature and polysilicon oxidation temperature. Silvaco TCAD software is utilized in this experiment with the employment of both ATHENA and ATLAS module to perform the respective device simulation and the electrical characterization of the device. The output responses obtained from the design is then succeeded by the implementation of Taguchi statistical method to facilitate the process parameter optimization as well as its design. The effectiveness of the process parameter is opted through the factor effect percentage on Signal-to-noise ratio with considerations towards I<sub>ON</sub> and I<sub>OFF</sub>. The most dominant factor procured is the polysilicon doping tilt. The I<sub>ON</sub> and I<sub>OFF</sub> obtained after the optimization are 1726.88 μA/μm and 503.41 pA/μm for which has met the predictions of International Technology Roadmap for Semiconductors (ITRS) 2013. </span>

Enhanced performance of 19 single gate MOSFET with high permittivity dielectric material

<p><span>In this research, the performance of the 19 nm single gate MOSFET is enhanced through the implementation of the high permittivity dielectric material. The MOSFET scaling trends necessities in device dimensions can be satisfied through the implementation of the high-K dielectric materials in place of the SiO2. Therefore, the 19 nm n-channel MOSFET device with different High-K dielectric materials are implemented and its performance improvement has also been analysed. Virtual fabrication is exercised through ATHENA module from Silvaco TCAD tool. Meanwhile, the device characteristic was utilized by using an ATLAS module. The aforementioned materials have also been simulated and compared with the conventional gate oxide SiO2 for the same structure. At the end, the results have proved that Titanium oxide (TiO2) device is the best dielectric material with a combination of metal gate Tungsten Silicides (WSix). The drive current (ION) of this device (WSix/TiO2) is 587.6 µA/um at 0.534 V of threshold voltage (VTH) as opposed to the targeted 0.530 V predicted, as well as a relatively low IOFF that is obtained at 1.92 pA/µm. This ION value meets the minimum requirement predicted by International Technology Roadmap for Semiconductor (ITRS) 2013 prediction for low performance <br /> (LP) technology. </span></p>

Effect of the PEDOT:PSS buffer layer on the performance of hybrid ZnO nanorods/polymer electroluminescent diode

Hybrid ZnO nanorods/polymer light-emitting diodes have excited much attraction because of the combination of high optoelectronic properties of ZnO nanorod with the variety and processability of polymers. In this research, the hybrid ZnO nanorods/polymer heterostructure UV-LED is investigated using ATLAS module of SILVACO TCAD software. In order to observe the influence of PEDOT:PSS hole injection layer/buffer layer in a AZO/ZnO NRs/MEH-PPV heterostructure device, first an ab initio approach have been done on PEDOT:PSS, MEH-PPV and AZO layers. The density of states, electronic band structure and the imaginary part of the dielectric function have been analyzed to deduce the electronic and optic features of the aforesaid layers. In continue, current–voltage characteristics and electroluminescence (EL) spectra of three structures of ITO/MEH-PPV/Al, ITO/ZnO/MEH-PPV/Al and ITO/ZnO/ZnO NR/MEH-PPV/Al have been simulated and compared with the literature experimental works to verify the simulation approach. Moreover, Langevin recombination rate, radiative recombination rate and luminescence power of the mentioned structures have been carefully investigated. Finally, the current–voltage characteristics, luminescence power and EL spectra of the novel proposed devices with the structures of ITO/PEDOT:PSS/AZO/ZnO NR/MEH-PPV/Al and ITO/PEDOT:PSS/ZnO/ZnO NR/MEH-PPV/Al have been investigated. The turn-on voltage of the proposed structure is decreased from 22 to 16 V because of the insertion of the PEDOT:PSS buffer layer and lowering of the hole injection barrier between ITO and ZnO layers. A little blue shift is observed around the wavelength of 380 nm which is attributed to the AZO layer.

Optimization of anti-reflection layer and back contact of Perovskite solar cell

A perovskite-based solar cell is a solar cell introduced in recent years. One of its obvious weaknesses is its low efficiency, which makes it possible to consider this type of solar cell in multiple (paired) forms with a solar cell of the other type. The CIGS and a-si and c-si solar cells are typical examples paired with perovskite solar cells to increase efficiency. The efficiency of 28% was achieved without the presence of a pair of other types by changing some parameters such as the thickness of the absorbent layer and the right choice of the anti-reflection layer and the back contact layer.To investigate the effect of the anti-reflection layer on the efficiency of Perovskite solar cells, materials such as Al2O3, SiO2 and ZnO with various thicknesses were placed as an anti-reflection layer, with the best efficiency achieved by SiO2 with an optimum value of 100 nm. Graphite connector was also considered as an optimal choice because the inexpensiveness and flexibility of this material compensate for a 2% reduction in efficiency.This study shows that solar cell can be constructed based on the only perovskite, which represents a new generation of cheap and economical solar cells, which are very easy to construct and their raw materials are very accessible. The numerical simulation tool used in this study was the Silvaco software atlas module. The J-V specification is simulated under the standard AM 1.5G lighting.

Simulation of Transient Processes in 4H-SiC Based Semiconductor Devices (Taking into Account the Incomplete Ionization of Dopants in the ATLAS Module of the SILVACO TCAD Software Package)

Transient process in a resistor–capacitor (RC) circuit with a reverse-biased 4H-SiC p–n diode as the capacitive element is simulated. Simulation is performed with the ATLAS software module from the SILVACO TCAD system for technology computer-aided design (TCAD). An alternative way, to that in ATLAS, to set the parameters of doping impurities partly ionized in 4H-SiC at room temperature is suggested. (The INCOMPLETE physical model available in the ATLAS module, which describes the incomplete ionization of doping impurities in semiconductors, is unsuitable for simulating the dynamic characteristics of devices.) The simulation results are discussed in relation to previously obtained experimental results.

Моделирование переходных процессов в полупроводниковых приборах на основе 4H-SiC (учет неполной ионизации легирующих примесей в модуле ATLAS программного пакета SILVACO TCAD)

AbstractTransient process in a resistor–capacitor (RC) circuit with a reverse-biased 4 H -SiC p – n diode as the capacitive element is simulated. Simulation is performed with the ATLAS software module from the SILVACO TCAD system for technology computer-aided design (TCAD). An alternative way, to that in ATLAS, to set the parameters of doping impurities partly ionized in 4 H -SiC at room temperature is suggested. (The INCOMPLETE physical model available in the ATLAS module, which describes the incomplete ionization of doping impurities in semiconductors, is unsuitable for simulating the dynamic characteristics of devices.) The simulation results are discussed in relation to previously obtained experimental results.

Process Parameters Optimization of 14nm MOSFET Using 2-D Analytical Modelling

This paper presents the modeling and optimization of 14nm gate length CMOS transistor which is down-scaled from previous 32nm gate length. High-k metal gate material was used in this research utilizing Hafnium Dioxide (HfO 2 ) as dielectric and Tungsten Silicide (WSi 2 ) and Titanium Silicide (TiSi 2 ) as a metal gate for NMOS and PMOS respectively. The devices are fabricated virtually using ATHENA module and characterized its performance evaluation via ATLAS module; both in Virtual Wafer Fabrication (VWF) of Silvaco TCAD Tools. The devices were then optimized through a process parameters variability using L9 Taguchi Method. There were four process parameter with two noise factor of different values were used to analyze the factor effect. The results show that the optimal value for both transistors are well within ITRS 2013 prediction where V TH and I OFF are 0.236737V and 6.995705nA/um for NMOS device and 0.248635 V and 5.26nA/um for PMOS device respectively.

A Comparative Study on SiGe HBTs and SiBJTs in Nanoscale

In this paper, a comparative study is done on performance of strained SiGe Heterojunction Bipolar Transistors (HBTs) with 100nm base width of conventional transistor. The device parameters like energy band gap variation, electron current density, electron drift velocity, electron and hole mobility are discussed. Here the current gain of strained SiGe layers was observed to increase by seven times as compared to bulk Si, because of the improvement in mobility in the trapezoid-base Si0.88Ge0.12 HBT. The strained SiGe HBT had 0.07 v lower turn on voltage than BJTs. The DC current gain of SiGe HBT can be improved further, by increasing Ge mole fraction. The simulation and parameter extraction have been done through the device simulator atlas module of SILVACO software.

Optimization of Process Parameter Variability in 45 nm PMOS Device using Taguchi Method

This study reports on an investigation of the effect and optimization of process parameter variability on poly sheet resistance (RS) and leakage current (ILeak) in 45 nm PMOS device. The experimental studies were conducted under varying four process parameters, namely Halo implantation, Source/Drain Implantation, Oxide Growth Temperature and Silicide Anneal Temperature. Taguchi Method was used to determine the settings of process parameters. The level of importance of the process parameters on the poly sheet resistance and leakage current were determined by using Analysis of Variance (ANOVA). Virtual fabrication of the devices was performed by using ATHENA module. While the electrical characterization of the devices was implemented by using ATLAS module. The optimum process parameter combination was obtained by using the analysis of Signal-to-Noise (S/N) ratio. The confirmation tests indicated that it is possible to decrease the poly sheet resistance and leakage current significantly by using the Taguchi method. The results show that the RS and ILeak after optimizations approaches are 67.53 Ω sq-1 and 0.1850 m A μm-1, respectively. In this study, S/D implantation was identified as one of the process parameters that has the strongest effect on the response characteristics.

Hybrid and module designs for ATLAS silicon tracker upgrade for super LHC

Based on the ATLAS SCT experience, hybrid and module designs of a short strip silicon detector for an upgraded ATLAS inner tracker for the super LHC have been pursued. At the super LHC, which provides 10 times more intense beam collisions than the LHC, the detectors envisage a very high rate operation in a much harsher radiation environment. Immediate concern is an increase of leakage current due to a radiation damage, which may induce a catastrophic break down of a thermal runaway. We have deduced a simple model for the thermal runaway, which can be conveniently utilized for the module designs. The thermal runaway model was verified by comparing with the corresponding FEM thermal analyses. The upgraded module is structurally similar to the present SCT barrel module. Two rectangular sensors, each of 12.5 × 6.4 cm 2 , are sandwiched along with a thermo-mechanical baseboard to provide two-dimensional space points. A one-piece wrap-around hybrid bridged over the sensors serves both the top and bottom sensors. Mounting and cooling schemes also follow the present barrel SCT designs with necessary modifications and improvements.