Asynchronous Serial Communication Research Articles

Ethernet Controller and Serial Interface Conversion Technology Based on FPGA

The FPGA-based 10/100M Ethernet MAC controller and universal asynchronous serial communication controller are designed and connected on chip in this paper. Such functions as writing data transmitted by the serial interface to the Ethernet controller and sending them to the network, and serially outputting network data received by the Ethernet controller are implemented and interconnection communications between Ethernet and the serial are achieved, possessing great practical values in system test. Modularization design is performed on the whole system with VHDL in this study, whose hardware application is verified on Xilinx Virtex2P XC2VP30 development board. The simulation results prove that the design has reliability, stability and good applications in the data transmission test.

Multi-DSP and -FPGA-Based Fully Digital Control System for Cascaded Multilevel Converters Used in FACTS Applications

In this paper, a fully digital controller based on multiple digital signal processor (DSP) and field-programmable gate array (FPGA) boards has been proposed for parallel-operated cascaded multilevel converters (CMC) used in flexible AC transmission system (FACTS) applications. The proposed system is composed of a DSP-based master controller in combination with a multiple number of slave DSP boards, FPGA boards, microcontrollers, a programmable logic controller (PLC), an industrial computer, and their peripherals in interaction. Intercommunication of these digital controllers is achieved mainly through fiber-optic links, via synchronous serial data link wherever a high-speed, full duplex communication is needed, and via asynchronous serial communication interface wherever relatively slow communication speed is required. The proposed fully-digital control system has been implemented on a sample 11-level CMC-based 154-kV, <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$+/-$</tex></formula> 50-MVAr transmission type static synchronous compensator (T-STATCOM). Field test results have shown that the proposed fully digital control system provides good transient response and steady-state characteristics for the oveall system including protection and monitoring functions.

NC Processing Network Platform RS-232-C Interface Circuit Design

RS-232-C and a modem together, the interface can connect all kinds of different types of micro computer, so that they can direct communication. Nowadays more popular FANUC series CNC system, and the machine is equipped with a 25 injection of RS-232-C asynchronous serial communication interface standards, connect the computer and programmer and peripherals. With MAX232 chip design of interface circuit DB9.

Design of UART with CRC Check Based on FPGA

In order to realize the accurate serial communication, a simple and practical scheme for URAT design and implementation was put forward based on the analysis of CRC generation algorithm. The reliability of serial communication can be improved by adding CRC into the asynchronous serial communication. The CRC checksum module is achieved with Verilog language on the basis of FPGA and obtained consistence between the results of simulation and theoretical analysis. Therefore, the expected design target was met, and the communication speed and efficiency was improved.

REINFORCING THE DESIGN FOUNDATION OF ASYNCHRONOUS SERIAL DATA COMMUNICATIONS USING LOGIC AND PROTOCOLS ANALYZERS

The foundation behind asynchronous serial data communications in microprocessor-based systems is generally taught through the theoretical timing diagrams and implementation of a protocol in a laboratory setting. Although students can extract the necessary information from the timing diagram to program a selected microprocessor, they face a number of challenges during the implementation because of the lack of tools to debug and observe the output of the microprocessor incrementally. More specifically, students cannot apply some of the acquired debugging skills like the use of breakpoints or oscilloscopes because (i) programming breakpoints can confirm the logic state of a signal and sequence of events, but not the timing of events, (ii) oscilloscopes can only capture portions of timing signals, and (iii) the signals captured are not digitized, thus displaying uncertainty in noisy environments. Once the programming task is completed, the protocol is verified by transmitting a known message, with the expectation that it will be received at the other end of the serial transmission link - an approach (all-or-nothing) that can be very frustrating during a lab session. This paper presents the use of a logic/protocol analyzer to enhance learning of asynchronous serial data communications by capturing and visualizing the real timing diagrams from a laboratory unit. The use of the Saleae Logic Analyzer provides students with a visual representation of the waveforms at every stage of their design and establishes a very clear link between the timing diagrams discussed in a class and their actual implementations in the lab.

비동기 시리얼 통신의 성능 향상을 위한 인터럽트 통합 기법

The request of interrupt accompanies a context switching. If the interrupt is frequently requested, this overhead of context switching can reduce seriously the performance of embedded systems. In order to reduce processing overhead due to frequently requested communication interrupts at Asynchronous Serial Communication, this paper introduces the method of Expanded Asynchronous Serial Communication with the Interrupt Coalescence(IC) that accumulates a fixed number of interrupts and processes them in one time. we implement the existing Asynchronous Serial Communication that requests communication interrupts by one byte at an LN2440SBC embedded board with a uC/OS-II and compare interrupt processing time for the performance evaluation about proposed method. As a result, the communication interrupt processing time of proposed method appears in case of low speed(9,600 bps), the decline of an average 25.18% at transmission, the decline of an average 41.47% at reception. and in case of hight speed(115,200 bps), the decline of an average 16.67% at transmission, the decline of an average 25.61% at reception.

Ultra Storage-Efficient Time Digitizer for Pseudorandom Single Photon Counter Implemented on a Field-Programmable Gate Array

Pseudorandom single photon counting is a novel time-resolved optical measurement method, which is advantageous over convention techniques in terms of data-acquisition speed and system cost. As a critical component of the pseudorandom single photon counter, the photon arriving time digitizer should be storage efficient for a high photon counting rate, while maintaining good time accuracy. We report an ultra storage-efficient time digitizer for a pseudorandom single photon counter in this paper, which is based on the asynchronous serial communication and can store the arriving time of every photon in 1-b memory space. In addition, a novel comb-wave modulator is proposed to achieve the dc balance required for asynchronous serial communication. Our prototype implemented on field-programmable gate arrays provides a time resolution of 400 ps. It can register up to 4.2-Giga photon arriving time tags with 1024 × 32-b memory space.

A novel technique to implement frequency hopping planar antennas with a computer interface

AbstractIn this paper, a novel configuration for a computer‐controlled frequency hopping microstrip antenna is presented. A circular microstrip antenna, loaded with a series LC tuned circuit in the form of a varactor diode with a metallic pin, is electronically tuned by sending digital words using the asynchronous serial communication facility of a computer. An analytical formulation, useful for the design of such an antenna, is presented. A computer interface circuit has been developed which, unlike embedded systems, offers flexibility in the choice of hopping sequence and facilitates remote operation. Design details and measured results are given. The results illustrate the feasibility of the proposed scheme to convert a low‐profile antenna into an adaptive antenna system. © 2003 Wiley Periodicals, Inc. Microwave Opt Technol Lett 38: 270–274, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.11035

A new approach to motor condition monitoring in induction motor drives

A new method for condition monitoring of an electrical machine is proposed. The method uses the power leads to the machine itself as the communication link between the sending station located within the machine and the receiving station located remotely outside the machine. The required communication circuit to realize data transmission in both the cases of the ordinary 60 Hz power line and the special PWM inverter-fed power line is then constructed. The communication circuit uses an asynchronous serial communication protocol and an FSK modulation for realizing frequency multiplexing in the power line. An on-line winding temperature monitoring system for an inverter-fed induction machine is constructed using this power line communication link. Experimental results demonstrate satisfactory operation of the system.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

An inexpensive experiment controller for stand-alone applications or distributed processing networks

An inexpensive microprocessor-based experiment controller available as a commercially produced bare printed circuit board is described. It provides for up to 8 inputs and 40 outputs. An 8K Experiment Control BASIC (ECBASIC) and a compiled Experiment Control Language (ECL) are also available. Both languages have internal structures that enable time and responses to be dealt with in a very convenient and error-free manner. Time and response count are automatically incrementing variables that need only to be tested by the user program. ECBASIC provides a 10-msec accuracy, whereas ECL provides a l-msec accuracy. ECL provides extensive support for event-driven programs. The board and software are designed to provide an orderly migration from a stand-alone controller running ECBASIC as a relay-rack replacement, to a network of ECBASIC machines on a small computer, to a true error-checking network of ECL machines on a time-sharing operating system of a large computer. Network communication is over the three wires of a single unmodified RS232 asynchronous serial communication line.

Design of a microcomputer-based LOGO turtle interface

An Intel 8035 microcomputer-based system which interfaces a LOGO turtle robot drawing device to an asynchronous serial communications line is described. The system was required to receive and interpret commands and to control the turtle wheels, pen mechanism and hooter in obedience to commands. The use of a microcomputer made it possible to simplify the turtle mechanism, improve the drawing accuracy and minimize the number of components used in the interface.

A General Purpose Stepping Motor-Encoder Positioning Subsystem with Standard Asynchronous Serial Line Interface

A general purpose mechanical positioning subsystem for open loop control of experiment devices which have their positions established and read out by stepping motor-encoder combinations has been developed. The subsystem is to be used mainly for experiments to be conducted at the National Synchrotron Light Source at Brookhaven National Laboratory. The subsystem unit has been designed to be compatible with a wide variety of stepping motor and encoder types. The unit may be operated by any device capable of driving a standard RS-232-C asynchronous serial communication line. An informal survey has shown that several experiments at the Light Source will use one particular type of computer, operating system, and programming language. Accordingly, a library of subroutines compatible with this combination of computer system elements has been written to facilitate driving the positioning subsystem unit.

Teaching Microcomputer Interfacing to Non-Electrical Engineers

Anticipation of the future social impact of the microcomputer has underscored the need on the part of most institutions of higher education to develop methods of teaching non-electrical engineers the basic principles and applications of microcomputers. During the past two years at Virginia Polytechnic Institute & State University, we have made significant progress in that direction: we have developed laboratory hardware and written several selfinstructional laboratory workbooks that permit a novice in electronics to learn the basic principles of digital electronics, the 7400-series of integrated circuit chips, asynchronous serial digital communication techniques, microcomputer programming, and 8080A microcomputer interfacing. Within only two quarters, our students-many of whom have had no prior exposure to electronics and none of whom have substantial undergraduate or graduate course time available for studying electronics—can learn sufficient digital electronics and microcomputer interfacing to undertake projects of modest complexity. Student response to the course has been enthusiastic.