Asymmetric Voltage Sources Research Articles

SHE PWM based 21 level inverters with hardware analysis

Recently, the advancement of multilevel inverters (MLI) has been a crucial factor in high power and medium voltage applications. This MLI has multiple topologies and has been used in a variety of applications. Cascaded MLI is preferred over other forms of multilevel inverter topologies. Nonetheless, significant obstacles are encountered when implementing these topologies. They necessitate an increased number of switches, DC sources, capacitors, and diodes. Increased losses and total harmonic distortion (THD) will be present in the system. In addition, the MLI is more expensive. The better construction of a multilevel inverter results in more output levels with fewer switches, sources, and driver circuits, as well as low THD. A new single-phase cascaded asymmetrical DC voltage sources based multilevel inverter design and the selective harmonic elimination (SHE) approach are used to attain these goals. After confirming in MATLAB/Simulink, the hardware implementation of the multilevel inverter in 21 levels was completed in this article.

Description of a three-phase, four-wire system with a nonlinear receiver and an asymmetric voltage source using CPC power theory

This article mathematically describes a three-phase, four-wire circuit in the case of a nonlinear, unbalanced load, asymmetry of the power source with a periodic, non-sinusoidal waveform. This description uses Currents' Physical Components (CPC) power theory for three-phase circuits. Determining the energy flow between the source and the load is possible by decomposing the phase current into components depending on the physical nature of the phenomena in this circuit. Mathematical relationships were determined enabling decomposition into components depending on the direction of energy flow and the causes of their creation. A calculation example using the determined relationships and calculation results has been presented. The presented computational concept is important for mathematical analyzes in circuits with nonlinear three-phase receivers. Knowing the nature of physical phenomena, it is possible to perform measures that limit the value of the current supplying the load.

Implementation of the Fuzzy Logic Controlled 31‐Level Diode Switched Multilevel Inverter with Optimal Components for Solar PV‐Fed System

This work presents a novel architecture for the 31‐level asymmetrical DC voltage source configured diode switched multilevel inverter, which has a single phase and fewer components. Using asymmetric DC sources and an H‐bridge, the proposed topology generates a maximum output voltage of 31 levels. This 31‐level topology is suitable for both renewable energy source conversion (RES) and electric vehicle (EV) applications. This topology requires fewer total components, lower cost, and smaller size. Along with the numerous benefits of MLIs, reliability issues are critical due to the larger number of devices required to minimize THD. Several characteristics, such as total standing voltage (TSV), reliability, cost function (CF), efficiency, and overall power losses, are investigated for the developed 31‐level MLIs. The TSV and CF of the proposed MLI are critical factors in demonstrating that the proposed topology is cost‐effective when compared to other recent topologies. Many parameters are thoroughly compared and tabulated, as well as represented graphically. The suggested MLI has lower TSV and component demand. Total harmonic distortion complies with IEEE specifications. The reliability aspects were also calculated and validated. The proposed MLI is controlled by a fuzzy logis controller (FLC) to achieve efficient results. The topology is simulated in MATLAB/Simulink software under a variety of conditions and dynamic load changes, and a prototype with a dSPACE controller is also implemented.

A novel generalized multi input boosting multi-level inverter (MIB-MLI) for high-frequency AC (HFAC) power distribution

The simplified topology for the high-frequency ac (HFAC) power distribution method with a multi-level inverter (MLI) hybrid switched capacitor (SC) is introduced. Capacitors, switches, diodes, and DC sources are among the components that are reduced in the designed MIB-MLI (Multi Input Boosting Multi-level Inverter). Where asymmetric dc voltage sources are available, such as in renewable energy farm-based ac microgrids and current electric vehicle, this architecture is advantageous. The proposed inverter has the feature of self-balancing the capacitor voltages and voltage boosting by using the series-parallel conversion scheme. The quality of output power is increased when a dc source array is connected with the unidirectional switched converter. Moreover, if a major phase variation betwixt the output current along with the voltage is no more mandatory, multiple alive switches may be recouped with diodes. In the switched capacitor group ripple volatge is reciprocal to the output frequency, so the MIB-MLI is favorable for HFAC implementations. Also, this paper clarifies the operating theory of the complete network and switching condition covered by the sinusoidal pulse width modulation (SPWM) technique. Mathematical equation related to power loss and capacitor voltages are provided. The modeling and simulation results of the proposed seventeen-level (17-L) inverter are depicted in this paper. The findings have shown that the proposed inverter is superior at HFAC along with the power efficiency of the inverter is adequate with SPWM technique.

THD Reduction of Improved Single Source MLI Using Upgraded Black Widow Optimization Algorithm

An upgraded Black Widow Optimization algorithm for obtaining the ideal switching angles of a reduced structure multilevel inverter is proposed in this paper with minimum voltage THD. The conventional BWO algorithm has been modified and proposed to solve the THD minimization problem with faster convergence rate, lesser tuning variables, and lesser number of equations than the other existing nature inspired algorithms. The reduced structure MLI is designed with three asymmetrical DC voltage sources of ratio 1 : 2 : 4 to generate 15-level output voltage which requires reduced number of switching devices in comparison with the existing topologies of equivalent voltage level. The asymmetrical DC voltage sources to the MLI are derived from a single DC voltage source using a multisecondary winding DC-DC converter in order to provide the isolation between the load side and source side. The proposed modified BWO algorithm reduces the complexity of solving the nonlinear equations to achieve the best result by avoiding the local optima. To verify the effectiveness of the upgraded BWO algorithm, the optimization problem for three phase fifteen level MLI has been solved using the genetic algorithm, BFO algorithm, and PSO algorithm. The results for the above three applied algorithms are compared with the upgraded BWO and presented. The proposed algorithm has minimized the output voltage THD to 1.83% at 0.88 modulation index. The developed scheme has been corroborated with the help of MATLAB simulation and the results have been verified through a hardware model developed in laboratory.

A Modular DC-DC Converter as a Hybrid Interlink Between Monopolar VSC and Bipolar LCC-Based HVDC Links and Fault Management

High voltage dc (HVdc) transmission has gradually gained its popularity in long distance transmission of power. The possibility of multi-terminal HVdc network has further projected HVDC as a potential mode of power trading across geographical boundaries. The emergence of modular multilevel converter (MMC)-based dc-dc converters has led to the interconnection of HVdc networks across voltage levels, converter technologies and line topologies. This paper puts forward a topological modification in an existing MMC-based dc-dc converter topology, acting as a hybrid interconnect between different converter technologies, for interface of an asymmetric monopolar voltage source converter (VSC) and a bipolar line commutated converter (LCC)-based HVdc links. The proposed operation of the topology is validated experimentally in a down-scaled laboratory prototype. The proposed topology is further investigated for short-circuit fault conditions in any of the poles of HVdc bus and appropriate fault mitigation strategies are adopted for short-cicuit fault in both LCC and VSC bus. The fault mitigation strategies are validated by simulation in Matlab/Simulink platform.

Switched-Capacitor-Based Multi-Source Multilevel Inverter With Reduced Part Count

This paper proposes a switched-capacitor (SC) based multi-source multilevel inverter (MSMLI) for high-frequency AC power distribution systems. The proposed topology is a potential alternative in applications involving asymmetric dc voltage sources (in the case of renewable source-based AC microgrids). Using the available dc sources as an aggregated input eliminates the need for paralleling of inverters. In addition, the proposed topology offers a common ground among the multiple input sources and, thus, has a more straight forward design and avoids stacking voltage sources. By employing nine switches, two diodes, and two SCs, an 11-level voltage waveform is synthesized. The SC voltages are self-balanced owing to their series-parallel charging technique. A simple selective harmonic elimination technique is used to obtain the desired output voltage level and simultaneously eliminate the lower-order harmonics. A detailed comparison of the proposed MSMLI is carried out, and the test results obtained from a laboratory prototype are presented to validate the feasibility and highlight the benefits of the proposed topology.

DESIGN AND DEVELOPMENT OF 51 LEVEL NON MODULAR MULTILEVEL INVERTER TOPOLOGY WITH REDUCED NUMBER OF SWITCHES AND CONDUCTION PATH

In this paper, a 51 level multilevel inverter topology with non modular design is developed, which can be operated in asymmetrical mode with a reduced number of power switches and lesser conduction path. The proposed design has three separated DC sources and eleven active power switches, i.e., ten unidirectional switch and one bidirectional switch. The topology can be used with asymmetrical voltage source configuration to generate fifty one levels. This structure can be cascaded to produce maximum level by a series connection to produce higher voltage levels with less voltage stress on the switches without modifying the topology structure. A detailed Comparison is made with existing topology and recently introduced topologies based on the number of active switches, Separated DC sources, number of gate driver circuits. To prove the presented topology’s superiority, a simple Multicarrier pulse width modulation has been deployed as the switching scheme. Validation on the viability of the proposed topology has been carried out through Matlab/Simulink simulation. KEYWORDS: Non Modular Multilevel Inverter, Reduced Switch.

DESIGN OF MODULAR AND NON MODULAR MULTILEVEL INVERTER TOPOLOGY WITH REDUCED NUMBER OF SWITCHES

In this paper, a new multilevel inverter topology with modular and non modular design is developed, which can be operated both symmetrical and asymmetrical mode with a reduced number of power switches. The proposed design has four separated DC sources and Nine active power switches. The topology can be used with symmetrical and asymmetrical voltage source configuration to generate seventeen and seven voltage levels. This structure can be cascaded to produce maximum level by a series connection to produce higher voltage levels with less voltage stress on the switches without modifying the topology structure. Comparison is made with existing topology and recently introduced topologies based on the number of active switches, Separated DC sources, number of gate driver circuits. To prove the presented topology’s superiority, a simple Multicarrier pulse width modulation has been deployed as the switching scheme. Validation on the viability of the proposed topology has been carried out through Matlab/Simulink simulation. KEYWORDS : Modular, Non Modular Multilevel Inverter, Reduced Switch.

Self-Balanced Twenty Five Level Switched Capacitor Multilevel Inverter With Reduced Switch Count and Voltage Boosting Capability

Multilevel inverters (MLI) are gaining wider popularity owing to their increasing power handling capability and improving power quality output. With an inclining trend towards renewable energy utilization, they find a vital application in wind and solar power generation systems. This article proposes a new multilevel dc–ac inverter. The proposed MLI produces a twenty five level output and offers an inherent capacitor self-balancing capability. The inherent self-balancing eliminates the requirement of auxiliary sensor circuit or capacitors voltage balancing algorithms. Dual asymmetric voltage sources and switched capacitors along with their proper charging/discharging pattern are utilized for the generation of output levels. A voltage gain of 2 and a total standing voltage (TSV) of 10 is achieved though the proposed inverter. In order to realize the merit of the proposed MLI over recently developed topologies, a comparative analysis in terms of system components such as numbers of power electronic switches, gate driver circuits, diodes, and capacitors as well as system parameters such as voltage gain, TSV and power loss is presented. The proposed MLI is developed in the laboratory and is controlled through the digital signal processor TMS320F28379D using nearest level control technique. The experimental results are acquired for different loads and under varying modulation index to validate the feasibility of the proposed inverter.

Design and Analysis of Cascaded Hybrid-Bridge Multi-Cell Multilevel Inverter with Reduced Total Harmonic Distortion Profile

This multilevel inverter methodology is the center of focus among researchers in recent era. It has been focused due to its advantages over existing topologies, drawbacks and improvement of power quality, Multi-level inverter has the ability to generate nearly sinusoidal waves. This sinusoidal wave can be further improved by increasing the level of output voltage or with the help of filter design, and this manuscript presents single-phase Multi cell Multi-Level Inverter (MLI). It has been considered for reducing component count to get a higher number of output voltage levels and lower Total harmonics distortion profile. It comprises with four symmetric DC input voltage and 10 IGBT switches to produces stepped output of 9 level, and when deploy asymmetric Dc voltage source the same circuit will produce 31 level output with some changes in firing scheme, moreover this circuit is the family of cascaded hybrid bridge inverter so this circuit covered advantage of CHB MLI, This circuit uses lower no. of switch as compared to existing conventional MLIs such as FC-MLI, CHB-MLI, NPC-MLI, This paper also provides one of most pertinent controls and modulation mechanisms for a MLI using a hybrid reference/carrier-oriented sinusoidal PWM mechanism. At last, simulated outcomes are to validate the performance of both architectures in MLI structure as well as verify the concept.

Improved 25-level inverter topology with reduced part count for PV grid-tie applications

<span lang="EN-US">A new bidirectional multilevel inverter topology with a high number of voltage levels with a very reduced number of power components is proposed in this paper. Only TEN power switches and four asymmetric DC voltage sources are used to generate 25 voltage levels in this new topology. The proposed multilevel converter is more suitable for e-mobility and photovoltaic applications where the overall energy source can be composed of a few units/associations of several basic source modules. Several benefits are provided by this new topology: Highly sinusoidal current and voltage waveforms, low Total Harmonic Distortion, very low switching losses, and minimum cost and size of the device. For optimum control of this 25-level voltage inverter, a special Modified Hybrid Modulation technique is performed. The proposed 25-level inverter is compared to various topologies published recently in terms of cost, the number of active power switches, clamped diodes, flying capacitors, DC floating capacitors, and the number of DC voltage sources. This comparison clearly shows that the proposed topology is cost-effective, compact, and very efficient. The effectiveness and the good performance of the proposed multilevel power converter (with and without PWM control) are verified and checked by computational simulations.</span>

Analysis of Three Phase Nine Level Diode Clamped Multi Level Inverter

Compared to conventional inverter (square wave) multi-level inverter offers quality power owing to different voltage levels utilization in average and high voltage. Besides it also reduces Total Harmonic Distortion in the distributed system and dv/dt across power switches. This advantage is transcendently appropriate for cascaded diode connected converter that can be worked to create more number of levels using asymmetrical voltage source because of their integrated arrangement. However, this benefit no longer exist because it requires many dc links (batteries or rectifiers) which is costlier. Substitute method of implementing single low voltage floating DC link is to recompense voltage distortion using Neutral-Point-Clamped (NPC) converter. This NPC output and controlled floating single DC-link voltage along with controlled PWM strategy reduces the THD. This improves the bandwidth and make simpler the current control scheme. These motivated the study and analyze the performance of a Diode Clamp based three phase nine level multilevel inverterusingnovel PWM approaches in MATLAB 2014b and PROTEUS for hardware development. Thus low power prototype is developed and its performance is shown.

Silicon made switches for the development of low cost asymmetric 25 level inverter

This paper proposes the development of 25 level asymmetric inverter using four sources and ten switches. The proposed system consists of four sources which are asymmetrical in nature. Different structures of MLI were developed by researches to decrease the switch count and cost. The design of T-type inverter made using silicon MOSFET fed with asymmetric voltage source. In this topology staircase output voltage of twenty-five level is generated with minimum components count. The designed topology can be used for renewable energy sources to obtain inverted output.

New Asymmetrical Modular Multilevel Inverter Topology With Reduced Number of Switches

In this article, a new single-phase multilevel inverter is introduced with a reduced number of power switches and reduced voltage stress on power switches. The proposed topology consists of four input dc sources and nine semiconductor switches (eight unidirectional and one bidirectional switch). The topology can be used for asymmetrical voltage source configuration to generate seventeen voltage levels. The extended topology is constructed by a series connection of the topology circuit to produce higher voltage levels with less voltage stress on the switches without modifying the existing structure. Comparison is made with traditional and recently introduced topologies based on the number of power switches, dc sources, total blocking voltage of switches, and gate driver circuits, to prove the proposed topology’s superiority. A simple nearest level modulation has been deployed as the switching scheme. Validation on the viability of the proposed topology has been carried out through simulation and hardware experimental setup.

Design Level Shifted Multicarrier Techniques for Cascaded H-Bridge Sub-Multilevel Inverter

The key aim of this paper is to implement and analyze level-shifted multicarrier techniques in Cascaded H Bridge (CHB) - Sub multi-level inverter to produce multiple level output voltage. The multi-level inverter is to synthesize a near sinusoidal voltage from several levels of dc voltages. The asymmetrical DC voltage sources are used for CHB Sub-Multilevel inverter, and the 15-level output voltage is obtained. The asymmetrical DC voltage Sources 12V, 24V, and 48V are used to get the 15 Level output voltage. The multicarrier Pulse Width Modulation (PWM) is used to get the desired voltage at the output. The Level Shifted Phase Disposition (LSPD) and Level Shifted Phase Opposition Disposition (LS-POD) multicarrier PWM techniques are used to reduce the Total Harmonic Distortion (THD) in the output voltage. The circuit is developed and analyzed in MATLAB software. The THD, measured by using the FFT tool of MATLAB software From the simulated results, the level-shifted phase opposition disposition multicarrier PWM has better performance than level-shifted phase disposition multicarrier PWM technique because it contains fewer harmonics so to improve the system reliability and quality. The performance analysis and mitigation of harmonics can enhance the power quality of the supply voltage delivered to the customers. However, power quality occurs several problems such as voltage sag, swell, under-voltage, overvoltage, transients, etc.

Voltage Quality Enrichment using Transformerless Dynamic Voltage Compensator based on Asymmetrical Multilevel Inverter

In this article, Asymmetrical voltage source Multilevel Inverter based Transformerless Dynamic Voltage Compensator (ASMLI-TDVC) for load Voltage Quality (VQ) enrichment is proposed. The ASMLI-TDVC is controlled such that it compensates different levels of VQ problems with lesser Total Harmonic Distortion (THD). Synchronized voltage injection achieved through series transformer from traditional DVC leads to rise in the size of DVC and make system cumbersome. ASMLI based on less switch count topology is utilized for TDVC to overcome these aforementioned issues. Simulation studies of ASMLI-TDVC are carried out using Matlab Simulink software. Further, an experimental model is developed and tested in real-time using OP4500. Results prove that dynamic compensation for VQ improvement is achieved by ASMLI-TDVC.

Asymmetric hybrid multilevel inverter with reduced harmonic using hybrid modulation technique

<span>This paper studies the Asymmetric cascaded three phase multilevel inverter developed with hybrid modulation technique applied for an industrial application. The aim of this paper to reduce the Total harmonics distortion in the cascaded multi level inverter by introducing the new concept to develop the three phase CMLI. This inverter has two segments, one segment has H-bridge inverter and another segment has sequential arrangement of power semi conductor switches with asymmetrical voltage source in the ratio of 1:2. Similarly develop the segments for other phases. This new topology is called as Hybrid MLI. This hybrid MLI is used to reduce the no of semiconductor device requirement and the Total harmonics distortion. The inverter is controlled by Phase disposition (PD) and alternative phase opposition disposition PWM technique (APOD). This control technique is used to minimize the current harmonic and increase the system performance. The circuit is simulated using Matlab circuit and its performance is compared using PD and APOD PWM techniques and verified with simulation results.</span><p> </p>

Dual asymmetrical dc voltage source based switched capacitor boost multilevel inverter topology

The superior power quality of the multilevel inverter (MLI) compared to the two-level counterpart has increased its suitability for medium and high power applications. In the present work, a switched capacitor MLI topology has been presented, which utilises lesser switches and dc power supply and generates a 13-level output voltage. The detailed analysis along with simulation and hardware results have been presented. The comparative performance of the proposed topology has also been presented.

Balancing reactive compensation at three-phase four-wire systems with a sinusoidal and asymmetrical voltage source

Balancing reactive compensation at three-phase four-wire systems with a sinusoidal and asymmetrical voltage source