Asymmetrical Multilevel Inverter Research Articles

A Novel Higher Level Symmetrical and Asymmetrical Multilevel Inverter for Solar Energy Environment

ABSTRACT In this paper, a higher level symmetrical and asymmetrical multilevel inverter (MLI) with reduced device count is proposed for renewable energy systems. Multilevel inverters are recently gaining importance in renewable energy systems and other DC to AC conversion applications due to reducing voltage stress, low total harmonic distortion (THD) and high-quality output as compared to classical inverters. This paper present a basic cell unit of reduced device count (RDC) MLI with six switching devices is proposed. The topology has advantages of reduced device count over existing topologies for the same number of output levels, thus improving operating efficiency and reliability. Upon cascading two such basic cells with 12 devices synthesizes a 49 level output with an estimated THD of 1.63%. The other advantages accrued due to reduced device count are a reduction in switch driver circuits, less number of required dc voltage sources, less installation space and reduction in cost. The major benefit of the proposed topology is that it can deliver power from an asymmetrical source to load even under sudden variation in environmental conditions. The proposed MLI topology is simulated in MATLAB/Simulink environment and a laboratory prototype is developed and tested in the lab. The control paradigm is developed as the Simulink model, which is interfaced with dSPACE DS-1104 for generating control pulses to drive switches of proposed MLI topology. The experimental results validate the concept and paradigm of the proposed MLI topology.

Asymmetrical Multilevel Inverter with Low THD

Asymmetrical Multilevel Inverter with Low THD

Asymmetric diode-clamped multi-level inverter based renewable power generation system

ABSTRACT In this paper, a grid-connected power conversion topology is developed to convert a DC power from the renewable energy into a high-quality AC power. This grid-connected power conversion topology consists of an asymmetric diode-clamped multi-level inverter (DCT-MLI) and a dual-output DC-DC power converter. The asymmetric DCT-MLI includes two diode-clamped arms, two DC capacitors, and a filter inductor. The novelty of proposed asymmetric DCT-MLI is that the voltages of the two DC capacitors are in a multiple relationship. As a result, the asymmetric DCT-MLI will generate an AC voltage with more voltage levels by the power circuit similar to the symmetric DCT-MLI, and the capacity of filter inductor is further reduced. The dual-output DC-DC power converter combines a boost converter and a charge pump circuit to generate two DC voltages in a multiple relationship to supply the asymmetric DCT-MLI. The salient feature is that only a power electronic switch is used in the dual-output DC-DC power converter such that the control circuit is simplified. A hardware prototype is set up to verify the performances of the proposed grid-connected power conversion topology.

Compact symmetrical and asymmetrical multilevel inverter with reduced switches

The need for a multilevel inverter for medium voltage high power applications has attracted researchers and industrialists to focus on the design of hybrid multilevel inverter topology that uses a considerably lesser number of switches and sources. This paper proposes a symmetrical and asymmetrical multilevel inverter with reduced switches. The novelty of the proposed arrangement is lesser ON state switches and reduced total blocking voltages across switches. The optional series connection of the basic unit increases output voltage levels with high-quality output voltage. There are multiple algorithms proposed by varying the DC sources to generate different voltage levels using the same configuration. A suitable comparison is presented with conventional topologies and inverters of the same structure. The proposed topology is simulated and validated on hardware setup for both 7 levels, symmetrical and 15 levels, asymmetrical is performed using dSPACE 1104 controller. The impact of change in modulation index on the power and efficiency of the proposed 15-level inverter is validated under laboratory setup. The feasibility of this topology favors renewable energy integration applications.

A New Asymmetrical MLI with Reduced Switch Count for a Three Phase Induction Motor

This work explores a novel multilevel inverter (MLI) topology to minimize the number of power switches in the passage of current to accomplish each level of the output voltage. The unequal magnitudes of the dc voltage sources in attempt to realize higher levels of the output voltage bring in the asymmetrical nature of operation. It involves a series parallel switched configuration with bidirectional switches to avert the flow of circulating current in between the two H - bridges in each phase of the MLI. The effort incites to use the theory of a new Pulse Width Modulation (PWM) strategy for mitigating the higher frequency components of the voltage applied to the stator. It imbibes the Phase Disposition (PD) principles in the modulating strategy for arriving at the sinusoidal shape for the output voltage . Total Harmonic Distortion (THD) indexed by lower values for the output voltage over the traditional firing scheme serves to be the highlight for the MLI in acclaiming its place in the inverter world. The results obtained through MATLAB based simulation over a range of modulation indices. The performance measured in terms of the THD claims its suitability for use in Induction Motor (IM) drives.

A Novel Multilevel Inverter with Reduced Number of Switches Using Simplified PWM Technique

Multilevel inverter (MLI) topologies greatly sustained the emergence of modish power-electronic device as an expressive substitute of traditional two-level inverters in the area of medium-voltage high-power energy conversion schemes. It recommends the most outstanding solutions for high-power applications particularly in distributed generation schemes and plays a key role for establishment of novel MLI structures with fewer switching components. This paper proposes the novel 7-level asymmetric MLI topology and administered by both fundamental frequency-based pulse-width modulation (PWM) scheme and advanced multi-carrier PWM scheme. The proposed asymmetric 7-level smart MLI topology offers low switching elements, low gate drive circuits, low cost, minimum space requirement, low-voltage dv/dt switch stress, low switching loss and high efficiency over the traditional topologies. The critical evaluation of proposed 7-level asymmetric MLI performance is verified by MATLAB/Simulink platform and validated through experimental prototype; results are illustrated with proper comparisons.

Operation and Control of a Grid-Connected Asymmetrical Cascaded Multilevel Inverter

This article presented a new structure for the grid-connected multilevel inverters (MLIs) circuit with the ability of the cascaded connection. The proposed inverter is capable of transformerless connection of distributed generation resources to the network. The control system manages the power injection to the grid by minimizing the output current harmonics as well as exchanging reactive power with the grid. The self-balancing state of the capacitors' voltage is occurred only with the switching technique without any measurement sensors. An enhanced phase-locked loop (EPLL) and a proportional resonant (PR) controller are employed for the proposed asymmetric MLI. An important feature of the proposed inverter is the ability of stable performance and fast dynamics of the control system to the changes of the reference values. Simulation and experimental results are presented in order to validate the performance accuracy of the proposed MLI.

27-Level asymmetric multilevel inverter for photovoltaic energy conversion

This paper presents a novel structure to inject the electric energy from photovoltaic modules to the grid based on a 27-level asymmetric multilevel inverter. This work proposes mixing existing approaches based on string and central inverters to implement a hybrid structure that generates highly sinusoidal waveforms. Indeed, the presented structure allows for a staircase AC voltage waveform with a low level of harmonic distortion, which is a key feature for photovoltaic energy conversion. The proposal is supported with theoretical analyses that include system modeling and a suitable control strategy to track both the active and reactive power. A low power proof-of-concept prototype was built to validate the properness of the proposal. Several dynamic tests were performed, such as severe load impacts, partial shading and fault ride-through capability.

An asymmetrical multilevel inverter with optimum number of components based on new basic structure for photovoltaic renewable energy system

In this paper, a new basic structure of asymmetrical multilevel inverter with optimum number of components for photovoltaic (PV) renewable energy system is proposed. The aim is to reduce the number of components required to achieve a high number of output levels compared to older topologies. The inverter configuration comprises of two basic units connected to a packed H-Bridge. Cascaded operation of the inverter configuration is feasible for higher level generation. The magnitudes of the DC sources are selected in binary sequence to maximize the number of output levels. Solar panels with proportional-integral (PI) controlled DC-DC converters are used as the DC sources. The switch modulations are achieved by pre-defined switching angles which are calculated to minimize total harmonic distortion (THD) in the AC output waveforms. This method is used instead of the classic pulse width modulation (PWM) technique to reduce the total switching loss and the required processing power in generating the switching signals. Compared to the conventional multilevel inverter topologies, the proposed inverter is a better choice in terms of the number of components. It also achieves a good balance between the number of components and total blocking voltage. Hence, its installation will require smaller space and cost. Another merit of the proposed topology is that it produces AC output with low THD at high efficiency. The efficacy of the proposed asymmetrical 31-level inverter topology is simulated using MATLAB/Simulink and is further verified through experimental analysis.

Performance evaluation of a reduced components count single‐phase asymmetric multilevel inverter with low standing voltage

Performance evaluation of a reduced components count single‐phase asymmetric multilevel inverter with low standing voltage

FPA Optimized Selective Harmonic Elimination in Symmetric–Asymmetric Reduced Switch Cascaded Multilevel Inverter

Symmetrical and asymmetrical multilevel inverters (MLIs) have demonstrated its usefulness in a wide range of applications. This is accomplished due to the ongoing improvement by reducing the converter size and enhancement in the voltage quality. In this article, a generalized cascaded MLI structure is developed, which can operate in both symmetric and asymmetric modes. Comparative assessment in terms of the number of components and voltage stress warrants the design superiority. A new selective harmonic elimination (SHE) control using flower pollination algorithm (FPA) is investigated for the developed asymmetrical MLI. The salient features of the FPA such as less burdensome compilation and ability tos single-stage local and global search ascertain the elimination of the targeted harmonics through optimum angles computation. Moreover, the competence of the FPA is verified by comparing it with well-known SHE algorithms. Simulation analysis is carried out in MATLAB/Simulink environment, which validates the workability of the developed system. Experimental tests using fundamental and high switching frequency control techniques are further conducted under a dynamic environment to demonstrate the efficacy of the proposed methodology.

Novel harmonic elimination strategy based on Multi-Objective Grey Wolf Optimizer to ameliorate voltage quality of odd-nary multi-level structure.

In this paper, a novel Asymmetrical Multi-Level Inverter (AMLI) is suggested to solve the voltage quality problem. The suggested AMLI has been constructed based on series connection of sub-AMLIs to create a high-step quasi-sinusoidal voltage with considering few semiconductor switches. The ladder capacitors of sub-AMLI have been clamped to the H-bridge structure via several bi-directional switches. Based on an innovative geometric progression for DC power supplies of AMLI, it can operate as so-called odd-nary AMLI. It has effectually created a quasi-sinusoidal with high steps i.e., low Total Harmonic Distortion (THD) with respect to low number of switches. The performance of suggested AMLI has been thoroughly compared with other inventive asymmetrical and symmetrical multilevel inverters. Following that, scission-style harmonic elimination based on Pulse Width Modulation (PWM) is introduced to enhance voltage quality of AMLI. Three prominent criterions related to voltage quality i.e., desired fundamental component, elimination of third harmonic and reduction of THD have been assigned as objective functions of optimization problem. Considering the multi-objective nature of the optimization problem, non-dominated sorting Multi-Objective Grey Wolf Optimizer (MOGWO) has been implemented to solve the optimization problem, and then compared with Non-dominated Sorting Genetic Algorithm II (NSGA-II). To sum up, the relevant analytical studies along with both the simulation and experimental results have transparently validated the performance of suggested AMLI. Also, the voltage quality problem using MOGWO-based scission-style harmonic elimination strategy has been well approved.

Modelling and Simulation of an Asymmetrical Modular Multilevel Inverter with Less Number of Components

ABSTRACT This paper presents a modified topology for asymmetric modular multilevel inverter as a fundamental block. It consists of eight switches (including six bidirectional-conducting unidirectional-blocking switches and two bidirectional-conducting bidirectional-blocking switches) and four DC sources with unequal magnitudes, which generates 13-level output voltage. The proposed topology offers special features such as reduced number of switches, isolated DC sources, economical and less complexity with modular structure as compared to other contemporary topologies. Moreover, significant reduction in switch voltage can be achieved. The comparative study of proposed topologies with the conventional and recent topologies have been presented in terms of power switches, gate drivers, isolated DC voltage sources and total standing voltage on the switches. A multicarrier-based sinusoidal pulse width modulation scheme is adopted for generating the gate pulses using real-time simulation with dSPACE DS 1104. The proposed topology offers a fewer number of ON-state switches which lead to the reduction in power loss. The feasibility of proposed multilevel inverter, the simulation and experimental results are analysed under steady state and dynamic states.

Research on Modified Hybrid Frequency Modulation Technology of Type-III Asymmetric CHB Multilevel Inverters

Asymmetric Cascaded H-bridge (ACHB) level inverters can output more voltage waveforms with fewer cascaded units while ensuring the quality of output voltage waveforms, so they have attracted more and more attention. Taking the topology of Type-III asymmetric CHB multilevel inverters as the research object, a Modified Hybrid Frequency Pulse Width Modulation (MHF-PWM) strategy is proposed in this paper. This modulation strategy overcomes the local overshoot of low-voltage unit in the presence of traditional Hybrid Frequency Pulse Width Modulation (HF-PWM), thus completely eliminating the low frequency harmonics in the output voltage waveform of Type-III ACHB nine-level inverters, and the Total Harmonic Distortion (THD) of output line voltage of the modulation strategy is lower than that of PS-PWM strategy in the whole modulation degree, which effectively improves the quality waveform of the output line voltage. At the same time, the strategy can also improve the problems of current backflow and energy feedback caused by the high-voltage unit pouring current to the low-voltage unit, thereby reducing the imbalance of the output power of the high-voltage and low-voltage units. Finally, the Matlab/Simulink simulation model and experimental platform are established to verify the validity and practicality of the modulation strategy.

A novel PV fed asymmetric multilevel inverter with reduced THD for a grid‐connected system

A novel PV fed asymmetric multilevel inverter with reduced THD for a grid‐connected system

Research on Current Backflow of Asymmetric CHB Multi-Level Inverter

For the traditional asymmetric cascaded H-bridge multi-level inverters, the conventional hybrid modulation method has the problem of current backflow in a certain modulation index range. Although the monopolar modulation method effectively solves this problem, the high-voltage unit participates in the high-frequency operation in part of the range, which limits the improvement of the switching frequency of the whole system. The hybrid frequency modulation method can reduce the switching frequency of the high voltage unit to a certain extent, but the harmonic characteristics of the output voltage will be affected. In order to solve the above problems, a double frequency modulation method based on level-shifted PWM (LS-PWM) is proposed. On the one hand, it solves the inherent power back filling problem of the traditional hybrid modulation method, on the other hand, it ensures that the output voltage of the inverter has good harmonic characteristics when the switching frequency of the high voltage unit is low. The results of simulation and experiment prove the correctness of the theoretical analysis.

Fuzzy based optimal switching angle-PWM controller for 27-level asymmetric multi-level inverter

This work aims to improve the operation of multi-level inverter with reduced switching losses, thereby propose a new structure for an MLI with a reduced component count. A 27-level asymmetric Multi Level Inverter (MLI) with a minimal number of static switches is considered as a test system. The proposed MLI is developed with three input DC sources and thirteen power electronic switches. The hardware prototype is developed for 40 V and 3.5 A output. The control logic is developed in dsPIC30F410 controller. The main objective of this work is to effectively bring down the Total Harmonic Distortion (THD) of the resulting output voltage by analyzing the harmonic spectrum of the proposed MLI configuration with various low frequencies switching techniques and optimizing their switching angles and to choose an appropriate switching state using fuzzy logic controller (FLC). The proposed FLC covers wide range of operating conditions i.e. 10 switching states and variables 9*9 rules to predict the suitable switching angel. The performance metrics of the proposed structure of 27-level MLI has been evaluated upon simulation results and experimental results based on hardware prototype. The comparative study also carried out with the recent MLI topologies.

Analysis of Asymmetrical Multilevel Inverter Driving Induction Motor

In this paper thirteen level asymmetrical multilevel inverter (MLI) is presented. The topology produces thirteen level at the output using eight switches and three voltage sources. The main problem associated with power electronic converters are lower order harmonics. In this paper two control techniques are discussed, which are used to reduce the total harmonic distortion (THD) without using any filter circuit. Nearest level control (NLC) pulse-width modulation and selective harmonic elimination (SHE) technique has been used to generate gating pulse to get better output voltage. The generated pulse has low switching frequency which reduces the switching losses. A three phase MLI topology with reduced number of switches will improve the efficiency and reliability of the topology. Detailedanalysis of MLI topology has been carried out to show the special features of the topology. Comparison of different modulation technique has also been done and various simulation result have been included in this paper.

A New Three-Phase Multi-Level Asymmetrical Inverter With Optimum Hardware Components

In this article, a novel three-phase asymmetrical multilevel inverter is presented. The proposed inverter is designed with an optimal hardware components to generate three-phase nineteen output voltage levels. The proposed inverter exhibits various advantages like a suitable output voltage waveform with improved power quality, lower total harmonic distortion (THD), and more moderate complexity, reduction in cost, reduced power losses, and improved efficiency. A comparison of the proposed topology in terms of several parameters with existing methods illustrates its merits and features. The proposed inverter tested with steady-state and dynamic load disturbances. Various experimental results are included in this article to validate the performance of the proposed inverter during various extremities. In addition, a detailed comparison is tabulated between simulation and experimental results graphically. The proposed inverter has been stable even during load disturbance conditions. The simulation and feasibility model are verified using a prototype model.

Hardware Implementation of 15-Level Cascaded Multilevel Inverter using Pic16f877a

Multilevel inverters can manufacture a high- power, high- voltage inverter with a multilevel structure to control the voltage of the device. A symmetrical multilevel cascaded standard inverter requires 'n' DC sources for' 2n+1' levels that require isolated DC sources for power conversions. The objective of this paper is to increase the number of levels by reducing the number of dc sources. The proposed scheme is to use a multilevel asymmetrical inverter with a separate DC power supply. The analysis is extended to the use of the single DC power source with the remaining ' n-1 ' DC source being a capacitor and simultaneously maintains the capacitor 's DC voltage level and selects a fundamental frequency switching pattern to produce an almost sinusoidal output. Matlab simulink simulation is performed to verify the performance of the Asymmetrical Multilevel Inverter using isolated Dc source. The results of simulation and hardware are presented and discussed in this paper.