The use of digital pulse-width modulators (DPWMs) as controllers for dc–dc converters is becoming more and more popular, due to the lower sensitivity to process variations, programmability, and easiness to translate complex control algorithm in digital architecture. DPWMs require high resolution to avoid limit cycling. Moreover, especially in high-frequency switching power converters, the reduction of the electromagnetic interference (EMI) is of primary importance. A novel DPWM circuit is proposed in this paper. The circuit uses only standard cells, easing portability to new technological nodes. The DPWM includes a coarse delay stage, based on an enhanced counter-based architecture, which is able to modulate both the frequency and duty cycle. As a result, the proposed DPWM supports spread-spectrum modulation, with arbitrary modulation law, to reduce the EMI. The DPWM also includes a fine delay stage that employs digitally controlled NAND-based delay lines with excellent linearity and resolution. A measurement unit is used to compensate at run time, the process, voltage, and temperature variations. The circuit has been fabricated in low-cost UMC 130-nm CMOS technology and is fit in a 44-pin package. The chip can generate spread-spectrum pulse-width waveforms up to 10 MHz. Measurement of the conducted EMI in buck dc–dc converter is reported in this paper.