Arbitrary Faults Research Articles

Routing in wormhole-switched clustered networks with applications to fault tolerance

This paper presents a novel technique for routing in wormhole-switched multiprocessor interconnection networks with clustered configuration. The network model used here consists of a set of clusters interfaced through a common central network. We assume that the central network and the clusters use independent algorithms to route messages between their internal nodes. A technique for deriving a global routing algorithm based on the local algorithms is presented, which allows the transfer of messages between any pair of nodes in the network. This proposed method is shown to be deadlock-free with two virtual channels. The clustered network model and the proposed routing technique can be used to enhance the fault tolerance capability of existing routing algorithms. In particular, we describe fault-tolerant routing methods for meshes, which can tolerate any arbitrary fault distribution without disabling connected healthy nodes.

Byzantine agreement in the presence of mixed faults on processors and links

In early stage, the Byzantine agreement (BA) problem was studied with single faults on processors in either a fully connected network or a nonfully connected network. Subsequently, the single fault assumption was extended to mixed faults (also referred to as hybrid fault model) on processors. For the case of both processor and link failures, the problem has been examined in a fully connected network with a single faulty type, namely an arbitrary fault. To release the limitations of a fully connected network and a single faulty type, the problem is reconsidered in a general network. The processors and links in such a network can both be subjected to different types of fault simultaneously. The proposed protocol uses the minimum number of message exchanges and can tolerate the maximum number of allowable faulty components to make each fault-free processor reach an agreement.

Multistep interactive convergence: an efficient approach to the fault-tolerant clock synchronization of large multicomputers

We present a new approach for fault-tolerant internal clock synchronization in multicomputer systems employing not completely connected networks (NCCNs). The approach is referred to as multistep interactive convergence and is locally implemented in each multicomputer node by a time server process (TSP). We describe a specific algorithm that uses multistep interactive convergence and bases its operation on a logical mapping of the system's TSPs into an m-dimensional array. A TSP executes m steps per round of synchronization, with each step including a call to an interactive convergence procedure. For any TSP, clock readings in step i are gathered only from TSPs with which it shares a row along dimension i of the array. Hence, a TSP reads clocks only from a small subset of the TSPs in the system, which reduces the number of messages by orders of magnitude over a conventional interactive convergence algorithm in which reliable all-to-all broadcast of clock values is done. The algorithm can be used in systems of arbitrary topology and provides the added benefit of increased locality of communication in regular NCCNs such as hypercubes and tori. These advantages can be combined with a variety of message staggering mechanisms to maintain network contention at a minimum. We present expressions for the maximum clock skew, maximum clock drift, maximum clock discontinuity, and number of messages produced by the algorithm, and show that it tolerates arbitrary faults. A comparison with other algorithms that elucidates the advantages of multistep interactive convergence is also provided.

A general model for representing arbitrary unsymmetries in various types of network analysis

When dealing with unsymmetric faults various proposals have been put forward. In general they have been characterized by specific treatment of the single fault in accordance with the structure and impedances involved. The model presented is based on node equations and was originally developed for transient stability studies in order to allow for an arbitrary fault representation as seen from the positive sequence network. The method results in impedances -or admittances-combining the negative sequence and zero sequence representation for the symmetrical network with the structure and electrical constants of the unsymmetry involving one or more buses. These impedances are introduced in the positive sequence network in the nodes involved in the unsymmetrical conditions. In addition the model can be used for static fault current analysis and presents also in this connection a general method of solution; the method is easy to use since the task of user is limited to establishing the node admittance matrix of the unsymmetry expressed in phase coordinates. The paper is completed with two examples showing the application of the method, one fault for which a well known representation exists and one complicated fault situation which has not been treated before for traditional transient stability analysis.

A note on consensus on dual failure modes

F.J. Meyer and D.K. Pradhan (1991) proposed the MS (for "mixed-sum") algorithm to solve the Byzantine Agreement (BA) problem with dual failure modes: arbitrary faults (Byzantine faults) and dormant faults (essentially omission faults and timing faults). Our study indicates that this algorithm uses an inappropriate method to eliminate the effects of dormant faults and that the bound on the number of allowable faulty processors is overestimated. This paper corrects the algorithm and gives a new bound for the allowable faulty processors.

FAULT TOLERANT ROUTING IN HYPERCUBES AND STAR GRAPHS

In this paper, we give two linear time algorithms for node-to-node fault tolerant routing problem in n-dimensional hypercubes Hn and star graphs Gn. The first algorithm, given at most n−1 arbitrary fault nodes and two non-fault nodes s and t in Hn, finds a fault-free path s→t of length at most [Formula: see text] in O(n) time, where d(s, t) is the distance between s and t. Our second algorithm, given at most n−2 fault nodes and two non-fault nodes s and t in Gn, finds a fault-free path s→t of length at most d(Gn)+3 in O(n) time, where [Formula: see text] is the diameter of Gn. When the time efficiency of finding the routing path is more important than the length of the path, the algorithms in this paper are better than the previous ones.

A general procedure for analysing stacking faults and antiphase boundaries in crystals by using diffraction contrast imaging and/or defocus convergent-beam electron diffraction

Abstract A general and systematic procedure is proposed for identifying an arbitrary stacking fault or antiphase boundary in crystals. This procedure is aimed at determining the displacement vector R at the fault plane without knowledge or assumptions about it beforehand and is suitable for both diffraction contrast imaging and defocus convergent-beam electron diffraction techniques. It contains three main points: (i) the extinctive reflection which corresponds to a phase shift of multiples of 2° in a systematic row (g, 2g, 3g,…) is used to determine the fractional part of the dot product g R; (ii) the displacement vector R is determined uniquely from the fractional parts of g R for three reflections g (i = 1, 2, 3), which just form a primitive cell of the reciprocal lattice; (iii) the intrinsic/extrinsic nature of a stacking fault in a face centred cubic crystal is obtained directly from the relationship between R and the foil normal. In addition, based on the second point, all stacking faults and antiph...

Analysis of random sequential complicated faults on a balanced power system

Abstract The most general complicated fault on a power system may involve grounding of some phases, short-circuit between some phases and isolation of some phases. All these faults may be simultaneous or may occur in an arbitrary sequence. This paper presents the most general method for analysing such faults. Two matrices, which may be called 'the terminal voltage coefficient matrix' and 'the ground fault coefficient matrix', are employed for the analysis. Special formats are suggested for them. The elements of these matrices can be written immediately for any state of the system. The method proposed in this paper imposes no restriction, either on the sequence in which the complicated fault develops or on the instants at which the individual faults develop. Actual phase variables are employed for the analysis. Expressions for transient terminal voltages, transient phase currents and transient neutral currents are obtained in closed forms which are applicable to all faults. The flowchart for a computer program for the analysis of any conceivable random sequential fault is given. Finally, the results for an arbitrary fault on a fictitious equivalent generator are presented.

Design of self-testing and on-line fault detection combinational circuits with weakly independent outputs

In this article we propose a structure dependent method for the systematic design of combinational selftesting fault detection circuits that is well adapted to the arbitrarily chosen technical fault model. According to the fault model considered the outputs of the circuit are partitioned into different generally nondisjoint groups of weakly independent outputs. The parities of these groups of weakly independent outputs are compared in test mode as well as in normal operation mode with the corresponding predicted parities by use of a self-checking checker. For on-line detection, the hardware is in normal operation mode, and for testing, it is in test mode. In the test mode, these fault detection circuits guarantee a 100% fault coverage for single stuck-at-0/1 faults and a high fault coverage for arbitrary faults. In normal operation mode all technical faults considered will be detected possibly, with some degree of latency.

Overlapped Subarray Segmentation: An Efficient Test Method for Cellular Arrays

This paper presents a new test approach that is suitable for repetitive structures such as cellular arrays. As such, it is directly applicable to most arithmetic circuits which are generally quite regular. It is based on exhaustive testing of overlapping segments of the array. This approach detects bridging faults in addition to stuck-at faults. Such bridging faults are a significant problem in arithmetic circuits. The ability to detect arbitrary faults involving any cells within a designer selected distance (i.e., the diameter of the subset that is exhaustively tested) is unique to this testing approach. The high coverage of the proposed technique makes it attractive for testing current VLSI and future WSI arrays.

Stress near geometrically complex strike‐slip faults: Application to the San Andreas Fault at Cajon Pass, southern California

Slip on an undulatory strike‐slip fault induces predictable residual stresses in the adjacent crust. Elastic analytic and finite element models are developed to quantify these stresses for arbitrary fault geometries. Across fault‐parallel planes, domains of reverse, normal, right‐lateral and left‐lateral residual stresses are induced near the bends in the fault. These residual stresses increase in magnitude from one slip event to the next, typically reaching failure level after several events. A two‐dimensional analytic elastic plate model for slip on a sinusoidal fault provides general results on the scales and patterns of slip‐induced stresses, and Fourier synthesis allows for the solution with arbitrary but small fault distortions. Maximum fault‐normal residual stress is proportional to the square of the wavenumber of the sinusoidal trace and decays exponentially away from the fault, reduced to 2/e times the maximum value at a distance equal to 1/wavenumber. This fault‐parallel residual shear stress oscillates between dextral and sinistral along the fault, with maximum magnitude adjacent to the maximum excursions in the fault trace. Fault‐parallel residual shear stress is maximum at a distance from the fault of 1/wavenumber, where its magnitude is 1/e times the maximum normal stress on the fault. Two‐ and three‐dimensional finite element analyses extend the analytic model; they account for depth‐decaying fault perturbation amplitude and slip deficit and are valid for large fault undulations. Application of the model to the San Andreas fault in the Cajon Pass region produces the complex distribution of fault‐parallel normal, reverse, right‐lateral and left‐lateral structures recognized near the main trace. Left‐lateral stresses on planes subparallel to the San Andreas fault at the Cajon Pass well are predicted by this model.

Physical design of testable CMOS digital integrated circuits

A methodology for physical testability assessment and enhancement, implemented with a set of test tools, is presented. The methodology, which can improve the physical design of testable CMOS digital ICs, is supported in realistic fault-list generation and classification. Two measures of physical testability, weighted class fault coverage and fault incidence, and one measure of fault hardness are introduced. The testability is evaluated prior to fault simulation; difficult-to-detect faults are located on the layout and correlated with the physical defects which originate them; and suggestions for layout reconfiguration are provided. Several design examples are described, ascertaining the usefulness of the proposed methodology. The proposed methodology demonstrated that stuck-at test sets only partially cover the realistic faults in digital CMOS designs. Moreover, it is shown that classical fault models of arbitrary faults are insufficient to describe the realistic fault set. Simulation results have shown that the fault set strongly depends on the technology and on the layout style.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Consensus with dual failure modes

The problem of achieving consensus in a distributed system is discussed. Systems are treated in which either or both of two types of faults may occur: dormant (essentially omission and timing faults) and arbitrary (exhibiting arbitrary behavior, commonly referred to as Byzantine). Previous results showed that are number of dormant faults may be tolerated when there are no arbitrary faults and that, at most, (n-1/3) arbitrary faults may be tolerated when there are no dormant faults (n is the number of processors). A continuum is established between the previous results: an algorithm exists iff n>f/sub max/+2m/sub max/ and c>f/sub max/+m/sub max/ (where c is the system connectivity), when faults are constrained so that there are at most f/sub max/ and at most m/sub max/ of these that are arbitrary. An algorithm is given and compared to known algorithms. A method is given to establish virtual links so that the communications graph appears completely connected. >

Sequential fault occurrence and reconfiguration in system level diagnosis

In a classical system-level diagnosis model, a complex multiprocessor system is characterized to be uniquely diagnosable under the presence of any arbitrary fault set of size up to t. Fault occurrence, however, is usually a sequential process in real-life systems, i.e. multiple faults occur one after another. Any faulty location is immediately diagnosed and the system is reconfigured before any further fault occurs. Systems which are designed under the assumption of sequential fault occurrences and reconfiguration are discussed and their test interconnection assignment for unique diagnosability is characterized. A theorem is developed for sequential k/t-diagnosability, where the system is allowed to have up to t faults but not more than k of them occur at a time. For most practical cases, k has a value of 1. The t-diagnosability theorem is then a special case of this theorem for k=Kt. The results of this theorem are more useful in the design practical systems where the system is reconfigured after every fault is detected and located, and they do not have to satisfy the constraints n>2<or=t.<<ETX>>

Calculation of currents and voltages in faulted high phase order systems

This paper presents a method for calculating phase and sequence voltage and currents throughout a power system of mixed phase order (i.e. the system is perceived to be divided into an arbitrary number of different phase order subsystems) subjected to an arbitrary fault type at an arbitrary bus in the system. The approach used involves sequence [Z] methods. An example application is provided.

A Class of Redundant Path Multistage Interconnection Networks

A general class of fault-tolerant multistage interconnection networks is presented, wherein fault-tolerance is achieved by providing multiple disjoint paths between every input and output. These networks are derived from the Omega networks and as such retain all the connection properties of the parent networks in the absence of faults. An R-path network in this class can tolerate (R-1) arbitrary faults in the intermediate stages of the network at a cost that is far less than providing R copies of the original network. Different techniques for constructing such networks are presented and relevant properties and control algorithms are investigated.

Random stacking model applied to tetrahedrally bonded amorphous semiconductors: The scattering intensity

In this work we present the results of a careful analysis of a random stacking, or stacking fault, model for tetrahedrally bonded amorphous semiconductors. In this model due originally to Wilson, the structure is characterized by the probability of faulting $\ensuremath{\alpha}(0\ensuremath{\le}\ensuremath{\alpha}\ensuremath{\le}1)$ when close-packed pairs of planes (double layers) are stacked in the direction perpendicular to the planes: adjacent planes are relatively displaced, occupying positions $A$ or $B$ or $C$; complete randomness is achieved for $\ensuremath{\alpha}=\frac{1}{2}$, and a wurtzite or diamond structure for $\ensuremath{\alpha}=0 or 1$, respectively. We modified Wilson's earlier results by taking the limit of an infinite stacking sequence and by separating discrete and continuous parts of the scattering: this facilitates the analytical and numerical application of the model for structures with arbitrary fault probability $\ensuremath{\alpha}$. In the course of our analysis we carefully examined some other recent and more restricted treatments of the random stacking model. We find that the invariant vectors whose existence was pointed out by Betteridge are a consequence only of the relative displacement of adjacent planes and of the maintenance of any fixed interlayer spacing and do not result from the existence of perfect tetrahedral bonds as Betteridge and Heine asserted. Perfect tetrahedral bonding occurs for only one particular ratio of interplane spacing to in-plane spacing: $\frac{c}{a}=\sqrt{\frac{2}{3}}$. Hodges' assertion that the scattering from a completely random stacking structure ($\ensuremath{\alpha}=\frac{1}{2}$) is closer to wurtzite scattering is irrelevant because of his omission of one of the two equivalent three layer sequences from consideration: when both sequences are included the asserted connection disappears. We also give some preliminary results of a numerical calculation of the scattering intensity for various fault probabilities.

Shared Logic Realizations of Dynamically Self-Checked and Fault-Tolerant Logic

Dynamically self-checked or fault-tolerant realizations of switching functions and sequential machines are proposed under a fault model that permits arbitrary logic faults in a single-logic module, where the modules are explicitly defined. These realizations permit considerable logic sharing, organized around an (n, m, r)-basis for decomposing switching functions. The logic sharing permits more economical realizations than can be obtained using classical parity and triple-modular redundancy schemes for obtaining logic circuits with the corresponding property.

Multiple Fault Detection in Combinational Circuits: Algorithms and Computational Results

A new approach is developed for finding multiple fault detection tests under quite arbitrary fault models. Computational results are reported and discussed.

Earthquake mechanism

Important progress has been made in the study of the earthquake mechanism during the Upper Mantle Project, through the establishment of an appropriate mathematical framework which relates the observed seismogram with the slip motion across a fault plane. Since an arbitrary fault slip is described by a function of time and two space coordinates, a complete inversion of the observed seismogram is practically impossible. The only practical inversion method is to describe the kinematics of rupture growth along a fault plane using a small number of source parameters, and then to determine those parameters from the seismograms. A number of kinematic models have been proposed to cover a class of earthquakes. Preliminary attempts have also been made to find dynamic models by solving the problem of spontaneous rupture propagation for given initial conditions. There are a few source parameters, which represent some averaged quantities over the source time and source space and are therefore independent of the details of rupture kinematics. They are : 1. (1) the seismic moment, which is proportional to the total displacement averaged over the fault surface; and 2. (2) the apparent stress, which is proportional to the ratio of total seismic energy to seismic moment. In addition to these, the average stress drop can be approximately calculated from the seismic moment and the fault area, without detailed knowledge of the kinematics. The accuracies of determining these average quantities are discussed for the Parkfield, California earthquake of 1966, one of the best studied earthquakes during the U.M.P. period. Recent results from several well-studied earthquakes are then summarized as: 1. (1) the relation between magnitude and seismic moment; and 2. (2) the relation between stress-drop and magnitude. It was found that the stress drop in shallow earthquakes is 10–100 bar, apparently independent of magnitude for M > 6. Finally, recent evidences for the fault origin of deep-focus earthquakes are presented.