High-performance Electronic Applications Research Articles

Reduced trap state density in AlGaN/GaN HEMTs with low-temperature CVD-grown BN gate dielectric

In this Letter, low-temperature (400 °C) chemical vapor deposition-grown boron nitride (BN) was investigated as the gate dielectric for AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MISHEMTs) on a Si substrate. Comprehensive characterizations using x-ray photoelectron spectroscopy, reflection electron energy loss spectroscopy, atomic force microscope, high-resolution transmission electron microscopy, and time-of-flight secondary ion mass spectrometry were conducted to analyze the deposited BN dielectric. Compared with conventional Schottky-gate HEMTs, the MISHEMTs exhibited significantly enhanced performance with 3 orders of magnitude lower reverse gate leakage current, a lower off-state current of 1 × 10−7 mA/mm, a higher on/off current ratio of 108, and lower on-resistance of 5.40 Ω mm. The frequency-dependent conductance measurement was performed to analyze the BN/HEMT interface, unveiling a low interface trap state density (Dit) on the order of 5 × 1011–6 × 1011 cm−2 eV−1. This work shows the effectiveness of low-temperature BN dielectrics and their potential for advancing GaN MISHEMTs toward high-performance power and RF electronics applications.

Batch production of centimeter-scale monolayer MoS2 with low nucleation by face-to-face metal precursor supply

Transition-metal dichalcogenides (TMDs) show great potential for next-generation semiconductor due to its atomic level thickness, tunable band gap and high carrier mobility. However, high-quality monolayer MoS2 (ML-MoS2) films require stringent growth conditions during preparation. Here, we report a face-to-face metal precursor supply approach during chemical vapor deposition (CVD) to batch production of uniform ML-MoS2 films. Mo foils provide a stable concentration of metal precursors leading to uniform film generation with low nucleation. Comprehensive characterization techniques, including spectroscopic, surface topography and atomic scale analysis confirm the centimeter-scale homogeneity and high crystallographic quality of the monolayer films. Back-gate field effect transistors (FET) fabricated by ML-MoS2 exhibit excellent electrical performance. This methodology provides a pathway for the growth of TMDs, which should promote their applications in high-performance electronics or other fields.

Low-loss carrier stored trench-gate bipolar transistor with split-gate optimization

In the conventional carrier stored trench-gate bipolar transistor (CSTBT) device, a lower conduction voltage drop (Von) can be achieved with higher carrier stored (CS) layer dosage. However, the trench bottom is weakened leading to easier breakdown under high electrical field. In this work, the trench-gate structure of the conventional CSTBT is optimized and split into three components. The bottom and top left components of the split trench structure are equipotential with the emitter, which effectively eliminated the impact of collector on the trench gate with reduced gate charge (Qgc). In addition, another n-type CS layer is formed adjacent to the emitter to further enhance the hole carrier storage effect near emitter. This improves the trade-off between Von and turn-off time (Toff) without breakdown voltage (BV) degradation. The simulation results show that in comparison with the conventional CSTBT, the proposed device exhibits 64.6% reduction in Qgc under the same Von, while the turn-off time (Toff) and the saturation current are reduced by 14.9% and 43.4%, respectively. The short-circuit capability is also studied with 2.83 times improvement. Our proposed device shown here provides a feasible and attractive approach for advanced high-performance power electronics applications.

Sub-5 nm Ultrathin In2O3 Transistors for High-Performance and Low-Power Electronic Applications.

Ultrathin oxide semiconductors are promising candidates for back-end-of-line (BEOL) compatible transistors and monolithic three-dimensional integration. Experimentally, ultrathin indium oxide (In2O3) field-effect transistors (FETs) with thicknesses down to 0.4 nm exhibit an extremely high drain current (104 μA/μm) and transconductance (4000 μS/μm). Here, we employ ab initio quantum transport simulation to investigate the performance limit of sub-5 nm gate length (Lg) ultrathin In2O3 FETs. Based on the International Technology Roadmap for Semiconductors (ITRS) criteria for high-performance (HP) devices, the scaling limit of ultrathin In2O3 FETs can reach 2 nm in terms of on-state current, delay time, and power dissipation. The wide bandgap nature of ultrathin In2O3 (3.0 eV) renders it a suitable candidate for ITRS low-power (LP) electronics with Lg down to 3 nm. Notably, both the HP and LP ultrathin In2O3 FETs exhibit superior energy-delay products as compared to those of other common 2D semiconductors such as monolayer MoS2 and MoTe2. These findings unveil the potential of ultrathin In2O3 in HP and LP nanoelectronic device applications.

EBSD characterization of graphene nano sheet reinforced Sn–Ag solder alloy composites

This research explores the effects of incorporating Graphene Nano Sheets (GNS) on the microstructural characteristics and mechanical behavior of Sn–Ag solder alloys. The research was driven by the need for environmentally friendly, lead-free solder alloys with enhanced mechanical and thermal properties. The methodology involved incorporating graphene into the Sn–Ag alloy through stir casting, followed by a series of surface preparation techniques. The composite samples were then examined using EBSD to analyze crystallographic orientations and SEM/EDS for surface morphology and elemental composition. XRD provided insights into phase transformations and structural changes. Key findings reveal that the addition of GNS significantly refines the grain structure of the Sn–Ag alloy, leading to a bimodal grain size distribution. This refinement is attributed to the role of GNS as a nucleation site during solidification. Moreover, the study demonstrates a pronounced alteration in the texture of the material, with an increase in low-angle grain boundaries post-GNS addition. This texture change is indicative of enhanced mechanical properties. The results also show a shift in the orientation distribution function (ODF), suggesting a stronger crystallographic orientation due to GNS. These findings suggest that GNS incorporation could lead to improved mechanical and thermal properties in Sn–Ag solder, making them suitable for high-performance electronic applications. The study concludes that GNS not only serves as an effective reinforcement in Sn–Ag solder alloys but also significantly alters their microstructural and textural characteristics, contributing to the alloy's potential application in environmentally conscious electronic manufacturing.

Dual-functional perforated metamaterial plate for amplified energy harvesting of both acoustic and flexural waves

Metamaterials with defect states are commonly utilized in energy harvesting from acoustic and elastic waves due to their remarkable ability to localize waves. In this study, a novel piezoelectric energy harvester based on a perforated double-pillars metamaterial plate with a point defect, which offers the advantage of efficiently harvesting both ambient acoustic and flexural wave energy, is proposed. The proposed structure incorporates a locally resonant mechanism that enhances the concentration of vibration energy at the defect band frequency. Then, the amplified wave energy is efficiently converted into electrical energy by attaching a piezoelectric patch at the defect position. To initiate this investigation, the differential quadrature method is employed to theoretically estimate the boundary frequencies of the first band gap. Subsequently, this study investigates how holes size, electrical boundary conditions, and electrical circuit connections affect the energy harvesting of both acoustic and flexural waves. Correspondingly, the mechanisms behind their effects are thoroughly explained. Numerical results demonstrate that the wave energy localization performance can be remarkably amplified with an increasing holes radius, and the harvesters with the 1mm holes radius generate voltages that are approximately 2.12 and 1.44 times higher than those with the 0mm holes radius from acoustic and flexural waves, respectively. Furthermore, variations in the defect band frequency and corresponding wave localization behavior depend on the specific electrical boundary conditions and circuit connection approaches, ultimately leading to distinct results in the output electrical energy. These findings present valuable insights and guidelines for the development of high-performance electronic applications in the context of acoustic and elastic wave energy harvesting.

Analysis and Design of MBCFET and Their Circuit Application in Current Mirror and DRAM

This research paper addresses the challenges associated with transistor downscaling, particularly short channel effects (SCEs) in conventional silicon metal-oxide-semiconductor field-effect transistors (Si MOSFETs), and introduces Multi-Bridge-Channel MOSFETs (MBCFETs) as a potential solution. This study explores their attributes, emphasizing flexibility and faster switching, and comprehensively examines device parameters, fabrication processes, and simulation frameworks, offering a detailed analysis of critical factors influencing MBCFET performance. Investigating the intricate relationship between nanosheet dimensions and device characteristics, the research provides insights for optimized design and integration into future semiconductor technologies. The research looks at how the gate electrode's work function, the nanosheets' thickness and count, and the different types of doping affect important device properties such as transconductance, drive current, OFF-state current, and threshold voltage. Furthermore, the study is being carried out to form a current mirror and DRAM circuit by using the proposed MBCFET. This study demonstrates the transformative potential of MBCFETs in high-performance electronic applications.

Exceptional Thermochemical Stability of Graphene on N-Polar GaN for Remote Epitaxy.

In this study, we investigate the thermochemical stability of graphene on the GaN substrate for metal-organic chemical vapor deposition (MOCVD)-based remote epitaxy. Despite excellent physical properties of GaN, making it a compelling choice for high-performance electronic and light-emitting device applications, the challenge of thermochemical decomposition of graphene on a GaN substrate at high temperatures has obstructed the achievement of remote homoepitaxy via MOCVD. Our research uncovers an unexpected stability of graphene on N-polar GaN, thereby enabling the MOCVD-based remote homoepitaxy of N-polar GaN. Our comparative analysis of N- and Ga-polar GaN substrates reveals markedly different outcomes: while a graphene/N-polar GaN substrate produces releasable microcrystals (μCs), a graphene/Ga-polar GaN substrate yields nonreleasable thin films. We attribute this discrepancy to the polarity-dependent thermochemical stability of graphene on the GaN substrate and its subsequent reaction with hydrogen. Evidence obtained from Raman spectroscopy, electron microscopic analyses, and overlayer delamination points to a pronounced thermochemical stability of graphene on N-polar GaN during MOCVD-based remote homoepitaxy. Molecular dynamics simulations, corroborated by experimental data, further substantiate that the thermochemical stability of graphene is reliant on the polarity of GaN, due to different reactions with hydrogen at high temperatures. Based on the N-polar remote homoepitaxy of μCs, the practical application of our findings was demonstrated in fabrication of flexible light-emitting diodes composed of p-n junction μCs with InGaN heterostructures.

Overcoming the Miscibility Gap of GaN/InN in MBE Growth of Cubic InxGa1-xN.

The lack of internal polarization fields in cubic group-III nitrides makes them promising arsenic-free contenders for next-generation high-performance electronic and optoelectronic applications. In particular, cubic InxGa1-xN semiconductor alloys promise band gap tuning across and beyond the visible spectrum, from the near-ultraviolet to the near-infrared. However, realization across the complete composition range has been deemed impossible due to a miscibility gap corresponding to the amber spectral range. In this study, we use plasma-assisted molecular beam epitaxy (PAMBE) to fabricate cubic InxGa1-xN films on c-GaN/AlN/3C-SiC/Si template substrates that overcome this challenge by careful adjustment of the growth conditions, conclusively closing the miscibility gap. X-ray diffraction reveals the composition, phase purity, and strain properties of the InxGa1-xN films. Scanning transmission electron microscopy reveals a CuPt-type ordering on the atomistic scale in highly alloyed films with x(In) ≈ 0.5. Layers with much lower and much higher indium content exhibit statistical distributions of the cations Ga and In. Notably, this CuPt-type ordering results in a spectrally narrower emission compared to that of statistically disordered zincblende materials. The emission energies of the films range from 3.24 to 0.69 eV and feature a quadratic bowing parameter of b = 2.4 eV. In contrast, the LO-like phonon modes that are observed by Raman spectroscopy exhibit a one-mode behavior and shift linearly from c-GaN to c-InN.

Three-Dimensional Integrated Fan-Out Wafer-Level Package Micro-Bump Electromigration Study.

To meet the demands for miniaturization and multi-functional and high-performance electronics applications, the semiconductor industry has shifted its packaging approach to multi-chip vertical stacking. Among the advanced packaging technologies for high-density interconnects, the most persistent factor affecting their reliability is the electromigration (EM) problem on the micro-bump. The operating temperature and the operating current density are the main factors affecting the EM phenomenon. Therefore, when a micro-bump structure is in the electrothermal environment, the EM failure mechanism of the high-density integrated packaging structure must be studied. To investigate the relationship between loading conditions and EM failure time in micro-bump structures, this study established an equivalent model of the vertical stacking structure of fan-out wafer-level packages. Then, the electrothermal interaction theory was used to carry out numerical simulations in an electrothermal environment. Finally, the MTTF equation was invoked, with Sn63Pb37 as the bump material, and the relationship between the operating environment and EM lifetime was investigated. The results showed that the current aggregation was the location where the bump structure was most susceptible to EM failure. The accelerating effect of the temperature on the EM failure time was more obvious at a current density of 3.5 A/cm2, which was 27.51% shorter than 4.5 A/cm2 at the same temperature difference. When the current density exceeded 4.5 A/cm2, the change in the failure time was not obvious, and the maximum critical value of the micro-bump failure was 4 A/cm2~4.5 A/cm2.

A Performance Optimized CSTBT with Low Switching Loss.

A novel Performance Optimized Carrier Stored Trench Gate Bipolar Transistor (CSTBT) with Low Switching Loss has been proposed. By applying a positive DC voltage to the shield gate, the carrier storage effect is enhanced, the hole blocking capability is improved and the conduction loss is reduced. The DC biased shield gate naturally forms inverse conduction channel to speed up turn-on period. Excess holes are conducted away from the device through the hole path to reduce turn-off loss (Eoff). In addition, other parameters including ON-state voltage (Von), blocking characteristic and short circuit performance are also improved. Simulation results demonstrate that our device exhibits a 35.1% and 35.9% decrease in Eoff and turn-on loss (Eon), respectively, in comparison with the conventional shield CSTBT (Con-SGCSTBT). Additionally, our device achieves a short-circuit duration time that is 2.48 times longer. In high-frequency switching applications, device power loss can be reduced by 35%. It should be noted that the additional DC voltage bias is equivalent to the output voltage of the driving circuit, enabling an effective and feasible approach towards high-performance power electronics applications.

Breathable MOFs Layer on Atomically Grown 2D SnS2 for Stable and Selective Surface Activation.

2D transition metal dichalcogenides (TMDs) have significant research interests in various novel applications due to their intriguing physicochemical properties. Notably, one of the 2D TMDs, SnS2 , has superior chemiresistive sensing properties, including a planar crystal structure, a large surface-to-volume ratio, and a low electronic noise. However, the long-term stability of SnS2 in humid conditions remains a critical shortcoming towards a significant degradation of sensitivity. Herein, it is demonstrated that the subsequent self-assembly of zeolite imidazolate framework (ZIF-8) can be achieved in situ growing on SnS2 nanoflakes as the homogeneous porous materials. ZIF-8 layer on SnS2 allows the selective diffusion of target gas species, while effectively preventing the SnS2 from severe oxidative degradation. Molecular modeling such as molecular dynamic simulation and DFT calculation, further supports the mechanism of sensing stability and selectivity. From the results, the in situ grown ZIF-8 porous membrane on 2D materials corroborates the generalizable strategy for durable and reliable high-performance electronic applications of 2D materials.

Electrical Performance Enhancement and Low-Frequency Noise Estimation of In2O3-Based Thin Film Transistor Based on Doping Engineering

In this work, solution-derived InErO thin films were deposited to act as the channel layers of thin film transistors (TFTs). The effect of Er doping content on the morphology, oxygen defects, optical properties of indium oxide (In2O3) films, and electrical performance of InErO/Al2O3 TFTs was systematically investigated. Based on experimental results, it can be inferred that InErO-TFTs with 5% Er doping content has demonstrated improved electrical performance, including field effect mobility ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {FE}}$ </tex-math></inline-formula> ) of 17.55 cm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{{2}}\,\,\cdot \,\,\text{V}^{-{1}}\,\,\cdot \,\,\text{s}^{-{1}}$ </tex-math></inline-formula> , <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I} _{\text{ON}}/{I} _{\text{OFF}}$ </tex-math></inline-formula> of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.70\times 10^{{7}}$ </tex-math></inline-formula> , a subthreshold swing (SS) of 0.16 V/dec and threshold voltage shift of 0.10 and 0.09 V under positive bias stress (PBS) and negative bias stress (NBS) for 1800 s, respectively. The illumination NBS (NBIS) measurements have indicated the degraded device stability by reducing the light wavelength, which can be due to the ionization of oxygen vacancies. Low-frequency noise (LFN) characterizations on devices have shown that the interfacial density of states of In2O3-based TFTs decreases after Er doping. To demonstrate the potential applications of InErO-TFTs in logic circuits, a resistor-loaded unipolar inverter based on InErO/Al2O3 has been integrated, demonstrating good dynamic response behavior and high gain of 10. These results have indicated the great potential of solution-driven InErO-based TFTs for future applications in low-cost and high-performance electronics.

Coexistence of ferroelectricity and ferromagnetism in hex-GeS nanowires.

The existence of one-dimensional (1D) ferroelectricity and ferromagnetism provides an opportunity to expand the field of research in low-dimensional magnetoelectric and multiferroics and explore the future development of high-performance nanometer devices. Here, we predict a novel 1D ferroelectric hex-GeS nanowire with coexisting ferromagnetism. The electric polarization comes from the atomic displacements between Ge and S atoms, and it exhibits a far-higher than room temperature ferroelectric Curie temperature TEc = 830 K. The ferromagnetism, stemming from the Stoner instability, can be tuned by hole doping and maintained over a wide range of hole concentrations. Additionally, an indirect-direct-indirect band gap transition can be achieved via strain engineering and the bonding nature of the near-band-edge electronic orbitals revealed this transition mechanism. These results offer a platform to investigate 1D ferroelectric and ferromagnetic systems, and the presented hex-GeS nanowire demonstrates the potential for high-performance electronic and spintronic applications.

Origin of p-type conductivity in a WSe2 monolayer.

Transition-metal dichalcogenides have promising potentials for high-performance electronic and optoelectronic applications, which could be deeply influenced by defects, including native defects and dopants. Experiments to date have frequently reported p-type conductivity in the WSe2 monolayer, but the origin remains elusive. Here, using the first-principles calculations, we systematically investigate the point defects in the WSe2 monolayer and show that: (1) no intrinsic point defect is responsible for the p-type doping; (2) hydrogen interstitials (Hi) are possible sources for n-type conductivity; (3) oxygen substitution of Se (OSe) can greatly promote the formation of adjacent W vacancy (VW), and finally make VW relatively shallow acceptors by forming the defect complex nOSe + VW (n = 1 to 6). Our work reveals that nOSe + VW is the origin of the p-type conductivity in the unintentionally doped WSe2 monolayer, given that O is present throughout the synthesis conditions of WSe2.

Characterizing Key Process Strategies for Conductive Submicron Electrohydrodynamic Jet Printing

Compared to conventional electronics fabrication techniques, printed electronics have the advantages of reducing complexity and cost, while increasing material compatibility and design flexibility. Electrohydrodynamic jet (E-jet) printing is a 3D printing process with high-resolution capabilities. While significant progress has been made on printing metal nanoparticles to fabricate micron-scale electrical components, a knowledge gap exists in our understanding of the key process strategies that enable e-jet printing at the submicron-scale. This work highlights the derivation of models for performance estimation and process parameter selection to ensure consistent e-jet printing at the submicron-scale. Using this framework, we demonstrate high-resolution ptinted conductive line patterns suitable for high-performance electronics applications.

Tunable, stable, and reversible n-type doping of MoS2 via thermal treatment in N-methyl-2-pyrrolidone

Here, we report a highly stable and reversible n-type doping of monolayer MoS2 using thermal treatment in N-methyl-2-pyrrolidone (NMP). The Raman and photoluminescence spectroscopic measurements as well as the device performance of the MoS2 transistors suggested a stronger n-type doping effect with increasing time and temperature of the thermal treatment in NMP. Within the given time (5–60 min) and temperature (50 °C–110 °C), the surface treatment in NMP provided an electron concentration from 6 × 1010 to 2 × 1012 cm−2. Owing to the n-type doping effect, the thermal treatment in NMP reduced the contact resistance and enhanced the field-effect mobility of the MoS2 transistors. The n-type doping via thermal treatment in NMP remained effective for more than 12 months in ambient air, and could be completely removed after immersion in isopropanol. These results demonstrate that thermal treatment in NMP can be a facile and effective route to achieve stable and reversible doping of two-dimensional materials including MoS2 for their applications in high-performance electronics and optoelectronics.

Dynamic piezotronic effect modulated AlGaN/GaN HEMTs with HfZrOx gate dielectric

High electron mobility transistors (HEMTs) based on AlGaN/GaN heterojunctions show promising applications in high-performance power electronics. Having to face the limited device performance caused by electrically unstable issues, high-κ gate dielectric has been brought into HEMTs (forming MOS-HEMTs) to make a breakthrough. Impressively, a high-κ HfZrOx (HZO) dielectric has been proved to enable the HEMTs to exhibit enhanced performances, e.g., higher output performance, lower leakage current, and better surface properties. Additionally, by coupling piezoelectric and semiconductor properties, piezotronic effect also provides a novel approach for optimizing HEMTs with the use of external stress. Here, we present dynamic piezotronic effect of AlGaN/GaN HEMTs with HZO gate dielectric in pulse voltage modes. When the GaN layer is suffered from tensile stress, the DC and pulse output characteristics of the MOS-HEMTs show significantly decreased trends, and the gate leakage current shows a slight increase. Moreover, theoretical analysis based on Crosslight simulation and a self-consistent model shows that the applied tensile stress can effectively improve the energy band height of triangular potential well and affect the energy states of defects. This work not only provides an inspiration for the modulated device performance in dynamic piezotronic effect, but also expands the application prospect of HEMTs in a strain-controlled platform.

Carrier Stored Trench-Gate Bipolar Transistor With Stepped Split Trench-Gate Structure

In this work, a stepped split trench-gate (SSG) insulated-gate bipolar transistor (IGBT) employing enhanced carrier storage (CS) technique is proposed. The trench gate is split into two symmetrical gates in a deep trench structure (connected to the emitter). The bottom of the deep trench is embedded into the drift region to reduce the Miller capacitance and improve the breakdown voltage (BV) characteristics simultaneously. Additional arsenic ion implantation is performed during stepped trench formation enabling high doping CS layer. The simulation results show that in comparison with conventional carrier stored trench-gate bipolar transistor (CSTBT), the gate-to-collector charge ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${Q}_{{\mathrm {GC}}}$ </tex-math></inline-formula> ) and ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$E_{\text {OFF }}$ </tex-math></inline-formula> ) of the proposed device are decreased by 51.5% and 35.6%, respectively, with a constant conduction voltage drop ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\mathrm{ON}}$ </tex-math></inline-formula> ) of 1.36 V. In addition, an optimized tradeoff between <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\mathrm{ON}}$ </tex-math></inline-formula> and BV has been achieved. The proposed device shown here can offer an attractive technical approach with compatible manufacturing process toward high-performance power electronics applications.

Peripheral octamethyl-substituted nickel(II)-phthalocyanine-decorated carbon-nanotube electrodes for high-performance all-solid-state flexible symmetric supercapacitors

Construction of advanced electrode materials with unique performance for supercapacitors (SCs) is essential to achieving high implementation in the commercial market. Here, we report a novel peripheral octamethyl-substituted nickel(II) phthalocyanine (NiMe2Pc)-based nanocomposite as the electrode material of all-solid-state SCs. The highly redox-active NiMe2Pc/carboxylated carbon nanotube (CNT-COOH) dendritic nanocomposite provides rapid electron/electrolyte ion-transport pathways and exhibits excellent structural stability, resulting in high-capacity activity and impressive cycling stability. The composite prepared with the optimized weight ratio of NiMe2Pc:CNT-COOH (6:10) showed the highest specific capacitance of 330.5 F g−1 at 0.25 A g−1. The constructed NiMe2Pc/CNT-COOH-based all-solid-state symmetric SC device showed excellent performance with a maximum energy density of 22.8 Wh kg−1 and outstanding cycling stability (111.6% retained after 35,000 cycles). Moreover, flexible carbon cloth significantly enhanced the energy density of the NiMe2Pc/CNT-COOH all-solid-state symmetric device to 52.1 Wh kg−1 with 95.4% capacitance retention after 35,000 cycles, and it could be applied to high-performance flexible electronics applications. These findings provide a novel strategy to design phthalocyanine-based electrode materials for next-generation flexible SC devices.