Application Specific Integrated Circuit Technology Research Articles

Imagers using amorphous silicon thin film on application specific integrated circuit technology

As imaging systems become more demanding, the performance of image sensors has to keep pace with the development of computer components to process and store images. Besides resolution, color reproduction, dynamic range and speed, future image sensors are expected not only to provide raw signals, but to include part of the image processing system on-chip. Unlike charge coupled devices (CCDs) and complementary metal oxide semiconductor (CMOS) imagers, a sensor in thin film application specific integrated circuit (TFA) technology is a vertically integrated device. The thin film detector is fabricated independently of the application specific integrated circuit (ASIC) and is therefore not affected by ASIC scaling. Fill factors are commonly close to 100%. The technology offers high flexibility since an existing ASIC can be supplied with different detector structures for application specific device optimization.

Application specific integrated circuit (ASIC) readout technologies for future ion beam analytical instruments

New possibilities for ion beam analysis (IBA) are afforded by recent developments in detector technology which facilitate the parallel collection of data from a large number of channels. Application specific integrated circuit (ASIC) technologies, which have been widely employed for multi-channel readout systems in nuclear and particle physics, are more net-cost effective (160 /channel for 1000 channels) and a more rational solution for readout of a large number of channels than afforded by conventional electronics. Based on results from existing and on-going chip designs, the possibilities and issues of ASIC readout technology are considered from the IBA viewpoint. Consideration is given to readout chip architecture and how the stringent resolution, linearity and stability requirements for IBA may be met. In addition the implications of the restrictions imposed by ASIC technology are discussed.

Test methodologies and design automation for IBM ASICs

IBM manufactures a very large number of different application-specific integrated circuit (ASIC) chips each year. Although these chips are designed by many different customers having various levels of test experience and all having tight deadlines, IBM ASICs have a reputation for their high quality. This quality is due in large part to the heavy focus on design for test (DFT) and the use of design automation to help ensure that customers' chips can be manufactured, tested, and diagnosed with minimal engineering effort. Prospective customers of IBM ASIC technologies find an explicit set of DFT methodologies to follow which provide a relatively painless, almost push-button approach to the generation of high-quality, “sign-off” test vectors for their chips. This paper discusses the DFT methodologies used for IBM ASICs and the design automation support that enables designers to be so productive with these methodologies. Data are given for several recently processed chips, some designed outside IBM.

ASICs in manufacturing

Uptake of application specific integrated circuit technology in the UK continues to lag behind that of its leading competitor nations. The author looks at the reasons for this slow uptake and proposes a model for technology transfer designed to increase the level of adoption.

Networking Software Copyrights and the Semiconductor Chip Protection Act: A Study of Legal Protection for Application Specific Integrated Circuit Technology

Networking Software Copyrights and the Semiconductor Chip Protection Act: A Study of Legal Protection for Application Specific Integrated Circuit Technology

Readout electronics of multianode photomultiplier tubes for scintillation fiber calorimeter

A readout system of multianode photomultiplier tubes (PMT) was designed for a scintillation fiber calorimeter. A time-invariant method of charge measurement is applied. Key components of this system are a monolithic shaper amplifier using semicustom bipolar ASIC (application-specific integrated circuit) technology and an analogy memory hybrid made of full-custom nMOS VLSI. The readout circuits of a 256-channel readout system of multianode PMTs have also been fabricated and await final check out. Since heat dissipation is a critical issue, a special printed-circuit board, a lamination of an aluminum plate and FR-4, is used to achieve efficient heat removal. >

Semiconductor technology and the newly industrializing countries: The diffusion of ASICs (Application Specific Integrated Circuits)

Within the complex of information technology (IT) industries, the semiconductor (SC) industry plays an extremely important role as provider of the building blocks for IT products and systems. During the mid-1980s, a new revolution was heralded in SCs—the shift to so-called application specific integrated circuits (ASICs). According to some, ASICs represent a move from mass production to flexible specialization in SCs. This paper examines international market and technological trends in ASICs, arguing that the main feature of ASICs is a gradual technological decoupling of SC circuit design technology from manufacturing (or fabrication) technology. One of the effects of decoupling is likely to be the emergence of an important independent design sector which serves the downstream users of SCs. With ASIC technology the crucial SC design task is no longer the sole prerogative of the small oligopoly of large international SC manufacturers. For the more dynamic and well-developed newly industrializing countries (NICs), reductions in the barriers to the design and application of SCs may well improve market opportunities in IT industries such as consumer electronics, computing and telecommunications. Failure to acquire SC design capabilities could lead to competitive disadvantage among IT industries in the NICs. The paper provides an analysis of the likely industrial impact of ASICs at the international level and explores possibilities for policy responses within the NICs.

Special Issue on Computer Architecture for Robotics

In the realization of intelligent robots, highly intelligent manipulation and movement techniques are required such as intelligent man-machine interfaces, intelligent information processing for path planning and problem solutions, practical robot vision, and high-speed sensor signal processing. Thus, very high-speed processing to cope with vast amounts of data as well as the development of various algorithms has become important subjects. To fulfill such requirements, the development of high-performance computer architecture using advanced microelectronics technology is required. For these purposes, the development of implementing computer systems’ for robots will be classified as follows: (a) Use of general-purpose computers As the performance of workstations and personal computers is increased year by year, software development is the major task without requiring hardware development except the interfaces with peripheral equipment. Since current high-level languages and software can be applied, the approach is excellent in case of system development, but the processing performance is limited. (b) Use of commercially available (V) LSI chips This is an approach to design a computer system by the combination of commercially available LSIs. Since the development of both hardware and software is involved in this system development, the development period tends to be longer than in (a). These chips include general-purpose microprocessors, memory chips, digital signal processors (DSPs) and multiply-adder LSIs. Though the kinds of available chips are limited to some degree, the approach can cope with a considerably high-performance specifications because a number of chips can be flexibly used. (c) Design, development and system configuration of VLSI chips This is an approach to develop new special-purpose VLSI chips using ASIC (Application Specific Integrated Circuit) technology, that is, semicustom or full-custom technology. If these attain practical use and are marketed, they will be widely used as high-performance VLSI chips of the level (b). Since a very high-performance specification must be satisfied, the study of very high performance VLSI computer architecture becomes very important. But this approach involving chip development requires a very long period in the design-development from the determination of processor specifications to the system configuration using the fabricated chips. For the above three approaches, the order from the viewpoint of ease of development will be (a), (b) and (c), while that from the viewpoint of performance will be (c), (b) and (a). Each approach is not exclusive but is complementary each other. For example, the development of new chips by (c) can also give new impact as the components of (a) and (b). Further, the common point of these approaches is that performance improvement by highly parallel architecture becomes important. This special edition introduces, from the above standpoint, the latest information on the present state and' future prospects of the computer techniques in Japan. We hope that this edition will contribute to the development of this field.

Prototyping IDTV functions using PGAs (programmable gate arrays)

The utilization of user-programmable gate arrays (PGAs) to build a TV prototype is discussed. Two IDTV prototypes have been constructed in which some image processing algorithms (e.g. interpolation, motion detection, and video signal filtering) have been implemented by PGAs. The PGAs have enabled fast prototype building and testing of various algorithms on the same printed circuit board. Only a memory device must be reprogrammed to change the action of the PGA chip. After algorithms have been implemented and tested by PGAs, they are easily implementable by ASIC (application-specific integrated circuits) technology. >

Real-time DKS on a single chip

The desire to add more intelligent functionality and enhanced real-time Control capability to robotic systems places a heavy demand on computational resources. Nascent application-specific VLSI technology offers an unprecedented opportunity to relieve this computational burden by implementing specific robotic functions directly in hardware. A VLSI architecture, designed to compute the direct kinematic solution (DKS) on a single chip, is described. The DKS chip features fixed-point calculation and on-chip generation of trigonometric functions. The calculation achieves the resolution required for most industrial applications. Innovative modifications of the conventional adder control and the form of the homogeneous transformation matrix have improved throughput. Simulation results indicate that speed improvements of several orders of magnitude in the kinematic computation are achievable with application-specific integrated circuit technology, compared to microprocessor implementation.