Applications In Logic Devices Research Articles

Nitrogen-Doped 3D-Graphene Advances Near-Infrared Photodetector for Logic Circuits and Image Sensors Overcoming 2D Limitations.

The limitations of two-dimensional (2D) graphene in broadband photodetector are overcome by integrating nitrogen (N) doping into three-dimensional (3D) structures within silicon (Si) via plasma-assisted chemical vapor deposition (PACVD) technology. This contributes to the construction of vertical Schottky heterojunction broad-spectrum photodetectors and applications in logic devices and image sensors. The natural nanoscale resonant cavity structure of 3D-graphene enhances photon capture efficiency, thereby increasing photocarrier generation. N-doping can fine-tune the electronic structure, advancing the Schottky barrier height and reducing dark current. The as-fabricated photodetector exhibits exceptional self-driven photoresponse, especially at 1550 nm, with an excellent photoresponsivity (79.6 A/W), specific detectivity (1013 Jones), and rapid response of 130 μs. Moreover, it enables logic circuits, high-resolution pattern image recognition, and broadband spectra recording across the visible to near-infrared range (400-1550 nm). This research will provide new views and technical support for the development and widespread application of high-performance semiconductor-based graphene broadband detectors.

High-Performance 3D-Graphene/GaAs Photodetectors for Applications in Logic Devices and Imaging Sensing

High-Performance 3D-Graphene/GaAs Photodetectors for Applications in Logic Devices and Imaging Sensing

Significant enhancement of spin-orbit torque efficiency by optimizing the interlayer thickness in [Pt/Ru]n/Pt multilayers

Spin–orbit torque (SOT) is a promising strategy for switching magnetization for magnetic random access memory and maintaining magnetization coherent precession for magnetic nano-oscillator or magnon-based logic device applications. Thus, the enhancement of SOT efficiency is the crucial point for the implementation of high-performance SOT devices. Here, we demonstrate that the effective damping-like SOT efficiency ξDL in the periodic [Pt(2 nm)/Ru(1 nm)]nPt(2 nm) multilayers with a low resistivity of ∼40 μΩ cm (comparable to 23 μΩ cm of the pure Pt film) exhibits an over 100% enhancement compared to that of the pure 12 nm thick Pt (ξDL = 0.055) at the periodic number n = 3, even reaches 0.257 (∼360% enhancement) determined by damping dc modulation method at [Pt/Ru] total thickness of 32 nm with n = 10. Our findings will benefit various SOT devices by significantly reducing energy consumption.

Skyrmion motion under temperature gradient and application in logic devices

Under the presence of temperature gradient (TG) on a nanotrack, it is necessary to investigate the skyrmion dynamics in various magnetic systems under the combined effect of forces due to magnonic spin transfer torque thermal STT (), entropic difference as well as thermal induced dipolar field (DF). Hence, in this work, the dynamics of skyrmions in ferromagnets (FM), synthetic antiferromagnets (SAF), and antiferromagnets (AFM) have been studied under different TGs and damping constants (). It is observed that plays a major role in deciding the direction of skyrmion motion either towards the hotter or colder side in different magnetic structures. Later, FM skyrmion based logic device is proposed that consists of a cross-coupled nanotrack, where the skyrmions on horizontal and vertical nanotrack are controlled by exploiting TG and electrical STT (eSTT), respectively by taking the advantages of thermal induced skyrmion Hall effect (SkHE). The proposed device performs AND and OR logic functionalities simultaneously, when the applied current density is Moreover, the proposed device is also able to exhibit the half adder functionality by tuning the applied current density to The total energy consumption for AND and OR logic operation and half adder are 33.63 fJ and 25.06 fJ, respectively. This paves the way for the development of energy-efficient logic devices with ultra-high storage density.

In-plane spin excitation of skyrmion bags

Skyrmion bags are spin structures with arbitrary topological charges, each of which is composed of a big skyrmion and several small skyrmions. In this work, by using an in-plane alternating current (AC) magnetic field, we investigate the spin-wave modes of skyrmion bags, which behave differently from the clockwise (CW) rotation mode and the counterclockwise (CCW) rotation mode of skyrmions because of their complex spin topological structures. The in-plane excitation power spectral density shows that each skyrmion bag possesses four resonance frequencies. By further studying the spin dynamics of a skyrmion bag at each resonance frequency, the four spin-wave modes, i.e., a CCW-CW mode, two CW-breathing modes with different resonance strengths, and an inner CCW mode, appear as a composition mode of outer skyrmion–inner skyrmions. Our results are helpful in understanding the in-plane spin excitation of skyrmion bags, which may contribute to the characterization and detection of skyrmion bags, as well as the applications in logic devices.

Pulsed laser deposited Dy and Ta doped hafnium- zirconium oxide thin films for the high-k applications

Hf0.6Zr0.2Dy0.1Ta0.1O2 thin films were deposited on Si (100) at 600°C using pulsed laser deposition for gate oxide applications because of the compatibility of the elements with the CMOS process. Special emphasis was placed on the properties of Hf0.6Zr0.2Dy0.1Ta0.1O2 thin films within metal-insulator-semiconductor (MIS) structure (Pt/Hf0.6Zr0.2Dy0.1Ta0.1O2/Si) for high-k application in logic devices. The capacitance-voltage and current-voltage measurements are used to determine the electrical characteristics of MIS capacitor structures. The minimum equivalent oxide thickness and maximum dielectric constant of the thin films obtained were as low as 1.2 nm and as high as 35.7 at 10 kHz, respectively. Results on the gate stacks obtained based on the MIS structures appear to be promising as the high-k material for logic devices.

Tunable Multilevel Gate Oxide Capacitance and Flat‐Band Voltage Shift Characteristics by Filament Formation in Double‐Floating‐Gate Metal–Oxide–Semiconductor Capacitors

AbstractTunable multilevel gate oxide capacitance and flat‐band voltage shift characteristics in double‐floating‐gate metal–oxide–semiconductor (DFG‐MOS) capacitors are investigated for non‐volatile memory and programmable logic device applications. The DFG‐MOS capacitor with the structure of Ag(control gate)/CeO2(upper control oxide)/Al(upper FG)/CeO2(lower control oxide)/Pt(lower FG)/HfO2(tunneling oxide) on n‐Si substrate, that is Ag/CeO2/Al/CeO2/Pt/HfO2/n‐Si, exhibits three capacitance states as a result of reversible formation and rupture of conducting filaments at serially stacked Ag/CeO2/Al and Al/CeO2/Pt capacitors upon applying positive and negative gate voltages, respectively. In contrast, the DFG‐MOS capacitor with Ag/CeO2/Pt/HfO2/Pt/HfO2/n‐Si employing inert Pt upper and lower FGs exhibits two capacitance states via the formation and rupture of filament only at the upper Ag/CeO2/Pt stack. Instead, it accompanies a flat‐band voltage shift by electrical charging at the lower FG of Pt. The proposed devices operate with tunable multilevel gate oxide capacitance and flat‐band voltage shift associated with filament formation inside gate stacks and electrical charging with respect to the constituent materials of the FGs. These results pave the way for potential application to non‐volatile memory and programmable MOSFET logic device with tunable gate oxide capacitance, without relying solely on the electrical charging used in the current flash‐type memory.

Theoretical design and electronic properties study of two-dimensional Si2S

The zero band gap and air instability seriously of silicene limit its application in logic devices. By introducing the group VI elements, the band gap and stability of silicene will be adjusted. In this research, we propose a new two-dimensional material, Si2S. Si2S has excellent dynamic stability and thermal stability. AIMD simulations show that Si2S can maintain structural integrity at a temperature of 600 K. Si2S has an indirect band gap of 1.93 eV. The indirect band gap can be transformed into a direct band gap under the uniaxial strain along x direction or biaxial strain. The calculated carrier mobility of Si2S is anisotropic and the highest carrier mobility of Si2S is 182.72 cm2 V−1 S−1. The band gap and carrier mobility of Si2S are comparable with that of monolayer MoS2, which makes it promising to be used in the field of nanoelectronics.

Design of Reconfigurable Spin-Wave Nanochannels Based on Strain-Mediated Multiferroic Heterostructures and Logic Device Applications

A method based on the magnetoelectric effect present in multiferroic heterostructures was used to design a reconfigurable waveguide (WG) channel for spin wave (SW) transmission. The multiferroic heterostructures consisted of a piezoelectric (PZT) layer and an adjacent ferromagnetic (CoFeB) layer within the WG region. By applying voltage to the PZT layer, a piezostrain would be generated and transferred to the ferromagnetic layer, leading to a magnetoelastic field in the latter, which could modulate SW dispersion, including propagation frequency and SW vector. Two applications based on these piezostrain-modulated SW dispersion parameters were explored. A piezostrain-modulated, multiple-shaped WG channel was first proposed to allow specific-frequency SW propagation via control of the applied strain. Then, piezostrain was used to perform a phase shift modulation in the multiferroic SW channel. A <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\pi }$ </tex-math></inline-formula> -phase shift in the propagation of SW was obtained by customizing the length of strain operation for a given frequency. A phase shifter was designed to build an interferometer to fulfill the destruct and construct logic functions based on strain-controlled SWs. These simulation results highlight the considerable potential of strain engineering to control logical and computational reconfigurable SW devices.

Coexistence of memory and threshold switching behaviors in natural milk-based organic memristor

Natural biomaterials have attracted great interest for the fabrication of biocompatible memristors. Here, dense and smooth milk films were deposited on the Pt/SiO2/Si substrate by spin-coating method and resistive switching (RS) devices based milk films with the configuration of Ag/milk/Pt/SiO2/Si are fabricated for the first time. Furthermore, memory RS (MRS) and threshold RS (TRS) effects coexist in the devices, which can be controlled by appropriately setting the compliance current (I cc). The current conduction mechanisms of the devices with MRS and TRS effects are controlled by typical trap-controlled space charge limited current (SCLC) conduction and filamentary conduction mechanism. The good RS performances of the milk-based devices make them promising for sustainable bioelectronics and novel logic device applications.

Rotating edge-field driven processing of chiral spin textures in racetrack devices

Topologically distinct magnetic structures like skyrmions, domain walls, and the uniformly magnetized state have multiple applications in logic devices, sensors, and as bits of information. One of the most promising concepts for applying these bits is the racetrack architecture controlled by electric currents or magnetic driving fields. In state-of-the-art racetracks, these fields or currents are applied to the whole circuit. Here, we employ micromagnetic and atomistic simulations to establish a concept for racetrack memories free of global driving forces. Surprisingly, we realize that mixed sequences of topologically distinct objects can be created and propagated over far distances exclusively by local rotation of magnetization at the sample boundaries. We reveal the dependence between chirality of the rotation and the direction of propagation and define the phase space where the proposed procedure can be realized. The advantages of this approach are the exclusion of high current and field densities as well as its compatibility with an energy-efficient three-dimensional design.

Customizing the Polarity of Single‐Walled Carbon‐Nanotube Field‐Effect Transistors Using Solution‐Based Additives

AbstractPolarity control in semiconducting single‐walled carbon‐nanotube field‐effect transistors (s‐SWNT FETs) is important to promote their application in logic devices. The methods to turn the intrinsically ambipolar s‐SWNT FETs into unipolar devices that have been proposed until now require extra fabrication steps that make preparation longer and more complex. It is demonstrated that by starting from a highly purified ink of semiconducting single‐walled carbon nanotubes sorted by a conjugated polymer, and mixing them with additives, it is possible to achieve unipolar charge transport. The three additives used are benzyl viologen (BV), 4‐(2,3‐dihydro‐1,3‐dimethyl‐1H‐benzimidazol‐2‐yl)‐N,N‐dimethylbenzenamine (N‐DMBI), which give rise to n‐type field‐effect transistors, and 2,3,5,6‐tetrafluoro‐7,7,8,8‐tetracyanoquinodimethane (F4‐TCNQ) which gives rise to p‐type transistors. BV and N‐DMBI transform the s‐SWNTs transistors from ambipolar with mobility of the order of 0.7 cm2 V−1 s−1 to n‐type with mobility up to 5 cm2 V−1 s−1. F4‐TCNQ transform the ambipolar transistors in p‐type with mobility up to 16 cm2 V−1 s−1.

High Mobilities in Layered InSe Transistors with Indium-Encapsulation-Induced Surface Charge Doping.

Tunability and stability in the electrical properties of 2D semiconductors pave the way for their practical applications in logic devices. A robust layered indium selenide (InSe) field-effect transistor (FET) with superior controlled stability is demonstrated by depositing an indium (In) doping layer. The optimized InSe FETs deliver an unprecedented high electron mobility up to 3700 cm2 V-1 s-1 at room temperature, which can be retained with 60% after 1 month. Further insight into the evolution of the position of the Fermi level and the microscopic device structure with different In thicknesses demonstrates an enhanced electron-doping behavior at the In/InSe interface. Furthermore, the contact resistance is also improved through the In insertion between InSe and Au electrodes, which coincides with the analysis of the low-frequency noise. The carrier fluctuation is attributed to the dominance of the phonon scattering events, which agrees with the observation of the temperature-dependent mobility. Finally, the flexible functionalities of the logic-circuit applications, for instance, inverter and not-and (NAND)/not-or (NOR) gates, are determined with these surface-doping InSe FETs, which establish a paradigm for 2D-based materials to overcome the bottleneck in the development of electronic devices.

Effective drive current in steep slope FinFET (vs. conventional FinFET)

With the negative capacitance (NC) effect of ferroelectric materials, a sub-60-mV/decade sub-threshold slope in a conventional field-effect transistor has been theoretically and experimentally demonstrated. In order to utilize the NC for complementary metal-oxide-semiconductor logic device applications, it is necessary to closely examine various parameters for the device performance. Specifically, the analysis of effective drive current (i.e., Ieff = {IDS@[VDS = 0.5VDD, VG = VDD] + IDS@[VDS =VDD, VG = 0.5VDD]}/2) of the NC device is vital. In this work, Ieff of a NC fin field-effect transistor (FinFET), in which a baseline 70 nm FinFET is electrically integrated with a ferroelectric capacitor, is experimentally measured to explore the correlation between hysteresis and Ieff.

Boron nitride as two dimensional dielectric: Reliability and dielectric breakdown

Boron Nitride (BN) is a two dimensional insulator with excellent chemical, thermal, mechanical, and optical properties, which make it especially attractive for logic device applications. Nevertheless, its insulating properties and reliability as a dielectric material have never been analyzed in-depth. Here, we present the first thorough characterization of BN as dielectric film using nanoscale and device level experiments complementing with theoretical study. Our results reveal that BN is extremely stable against voltage stress, and it does not show the reliability problems related to conventional dielectrics like HfO2, such as charge trapping and detrapping, stress induced leakage current, and untimely dielectric breakdown. Moreover, we observe a unique layer-by-layer dielectric breakdown, both at the nanoscale and device level. These findings may be of interest for many materials scientists and could open a new pathway towards two dimensional logic device applications.

Metamorphic AlInAs/GaInAs HEMTs on silicon substrates by MOCVD

Metamorphic Al0.50In0.50As/Ga0.47In0.53As high electron mobility transistors (mHEMTs) grown by Metal Organic Chemical Vapor Deposition (MOCVD) on n-type silicon substrates with introduction of a novel multi-stage buffering stack scheme have been fabricated for the first time. 1.0-μm-gate-length depletion-mode mHEMTs with maximum transconductance up to 613 mS/mm are achieved. The unity current gain cut-off frequency (fT) and the maximum oscillation frequency (fmax) are 36.9 and 55.6 GHz, respectively. This device has the highest fT yet reported for 1.0-μm-gate-length HEMTs grown on silicon by MOCVD. Also, this performance is comparable to that of similar GaAs-based mHEMTs. These are encouraging initial results leading to the manufacturing potential of integrated high-speed metamorphic devices for logic applications on silicon substrates by MOCVD.

Effect of saturable index change on all-optical logic operations in a passive vertical cavity semiconductor saturable absorber

Semiconductor multiple quantum wells (QWs) have saturable absorption and saturable refractive index change properties. When it is embedded within a reflective Fabry-Perot cavity, the device shows forward and inverse saturation reflectivity for a radiation at cavity resonance wavelength with input intensity around the impedance matching point. Consideration of non-linear index change increases the extinction of forward saturation characteristics of the device. However its application in logic devices is very limited. Whereas, the inverse characteristics for which a number of logic devices can be proposed is severely affected in its extinction because of the consideration of non-linear index change. Here the authors optimise the parameters of vertical cavity semiconductor saturable absorber for the static and dynamic device performance of all-optical logic operations based on inverse saturation characteristics with both dispersive and absorptive saturation into consideration. The authors obtain an extinction of almost 77.5% with input intensity of the order of saturation intensity of a multiple QWs. The novelty of this work lies in the observation that the saturation of non-linear index of refraction has enormous effect on the characteristics of logic operations, which is not addressed in earlier reports. It is also observed that the detrimental effect of non-linear index saturation can be overcome by proper absorber parameters.

Carbon Nanotubes for High-Performance Electronics—Progress and Prospect

Carbon nanotube devices offer intrinsic advantages for high-performance logic device applications. The ultrasmall body of a carbon nanotube-the tube diameter-is the key feature that should allow aggressive channel length scaling, while the intrinsic transport properties of the nanotube ensure at the same time high on-currents. In addition, the narrowness of the tube is critical to implementation of novel device concepts like the tunneling transistor. By understanding the unique capabilities of carbon nanotubes and using them in unconventional designs, novel nanoelectronic applications may become feasible. However, much better control of materials quality must be obtained, and new fabrication processes must be developed before such applications can be realized.