Anti-windup Loop Research Articles

Improving the stability region of saturated linear systems controlled by dynamic delayed output feedback through anti-windup strategy

This paper addresses the problem of determination of stability regions, in fact regions of admissible initial state, as large as possible, for linear systems with delayed outputs and subject to input saturation and bounded controlled outputs, through anti-windup strategies. The closed-loop system resulting from the open-loop system with delayed output, the dynamic output controller plus the anti-windup loop is modelled as a linear time-delay system with a dead-zone nonlinearity. Constructive delay-dependent stability condition is then formulated by using a quadratic Lyapunov-Krasovskii functional. The optimization problem for computing the anti-windup gain that maximizes the size of the associated region of stability is directly expressed as the optimization of a convex criterion under LMI constraints.

Delay-Dependent Anti-Windup Loops for Enlarging the Stability Region of Time Delay Systems With Saturating Inputs

This paper addresses the problem of the determination of regions of stability for linear systems with delayed inputs and subject to input saturation through anti-windup strategies. Differently of the most anti-windup techniques, where the design of the anti-windup loop is introduced with the objective of minimizing the performance degradation, we are particularly interested in the synthesis of anti-windup gains in order to guarantee the stability of the closed-loop system for regions of admissible initial states as large as possible. With this aim, due to the presence of delay in the input we propose delay dependent results.

Design and performance of control and long-term stabilization system for the IRI 3 MeV-Van de Graaff electron accelerator

A system for control and stabilization of the IRI 3 MeV Van de Graaff electron accelerator is based on a PI-controller. Parameters are derived from the accelerator open-loop response, and refined by simulation for output of nanosecond multi-ampere pulses and DC current to 1 mA. A switched Anti-Windup Loop (AWL) and variable limiters are incorporated. Long-term voltage stability obtained below the charging belt revolution frequency of 5 Hz is ±0.05%.