Analysis Of Common Mode Voltage Research Articles

Common Mode Voltage Analysis and Reduction Technique for Nine Switch Inverter Fed Dual Load System

Common Mode Voltage Analysis and Reduction Technique for Nine Switch Inverter Fed Dual Load System

Common mode voltage analysis and reduction technique for nine switch inverter fed dual load system

Nine switch inverter (NSI) is a dual output topology that suffers from the common mode voltage (CMV) issues similar to conventional single output drive systems. A significant amount of literature is available to solve CMV in the traditional drive system, but there is a lack of literature on NSI CMV issues. The work presented in this paper serves to unify the understanding of different pulse width modulation (PWM) techniques applied to NSI and their effects on CMV. PWM techniques used in this study include sinusoidal, modified sinusoidal, discontinuous, and space vector PWM. This paper also investigates the possibility of reducing the CMV peak during zero vector states using two more switches in NSI without affecting the output voltage. To validate the proposed concept, an NSI fed dual load system is developed using MATLAB Simulink, and a real-time simulator OPALRT-OP4510 is used to support the findings.

Symmetrical Nine-Phase Drives with a Single Neutral-Point: Common-Mode Voltage Analysis and Reduction

Power converters generate switching common mode voltage (CMV) through the pulse width modulation (PWM). Several problems occur in the drive systems due to the generated CMV. These problems can be dangerous to the insulation and bearings of the electric machine windings. In recent years, many modulation methods have been developed to reduce the CMV in multiphase machines. Symmetrical nine-phase machines with single-neutral are considered in this paper. In this case, conventional PWM uses eight active vectors of different magnitudes in combination with two zero states in a switching cycle, and this generates maximum CMV. This paper proposes two PWM schemes to reduce the CMV in such a system. The first scheme is called active zero state (AZS). It replaces the zero vectors with suitable opposite active vectors. The second scheme uses ten large active vectors during switching and is called SVM-10L. Compared with conventional strategies, the AZS reduces the peak CMV by 22.2%, and the SVM-10L reduces the peak CMV by 88.8%. Moreover, this paper presents a carrier-based implementation of the proposed schemes to simplify the implementation. The proposed schemes are assessed using simulations and experimental studies for an induction motor load under different case studies.

Novel Three and Four Switch Inverters With Wide Input and Output Voltage Range for Renewable Energy Systems

The proposed inverters receive input dc voltage in a wide range and generate output ac voltage in a wide range due to their buck–boost ability. They require only three or four active switches and two inductors. Therefore, the circuit topologies and their operation are simple, and control is easy. The output current of the proposed inverters is continuous, which lowers the output harmonics and filtering capacitor. In the proposed inverters, the output and input voltage sources or capacitors share the same ground, which results in a constant common-mode voltage and negligible leakage current. Of the proposed inverters, an inverter with four active switches and double input voltage sources is analyzed and tested in detail. The circuit operation is discussed, a control strategy is developed, a common-mode voltage analysis is presented, and design guidelines for circuit components selection are given. To verify the theoretical analysis, a 500-W, 40-kHz prototype of the proposed four-switch inverter is designed, fabricated, and tested. An output ac voltage of 110 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{V}_{\mathrm {rms}}$ </tex-math></inline-formula> is generated from an input dc voltage of 100–200 V. A peak efficiency of 97.5% is obtained. The proposed inverter obtains high efficiency due to simple circuit operation, few circuit components in the conduction path, and switching of only one switch at high frequency.

An Interlinking Converter for Renewable Energy Integration Into Hybrid Grids

This letter proposes an interlinking converter architecture, which enables flexibly integrating renewable energy into hybrid grids. The proposed converter has one ac port, and two dc ports, offering a flexible solution to integrating various dc, and ac sources, which can also be versatilely configured as a dc-dc converter, a dc-ac inverter, or a dc-dc/ac multiport converter. The general concept of the architecture, its common-mode voltage analysis, and flexible operation modes are detailed in this letter. Experimental tests are performed on an example converter with a dedicated modulation strategy. The test results confirm the concept in terms of flexible conversion, high power density, low leakage currents, as well as controllable power flow.

Novel Multilevel Inverters Based on AC–AC Converter for Photovoltaic Applications

A novel family of multilevel inverters consisting of three-level (3L) half-bridge, 3L full-bridge, and cascaded modular multilevel inverters for photovoltaic applications is presented in this article. The proposed inverters are based on a buck type ac-ac converter and feature no high-frequency common-mode voltage. They can be isolated from the grid or output load without requiring an external circuitry. The voltage stress of all the high-frequency switches in the proposed half-bridge 3L inverter is half of the input voltage. The proposed cascaded multilevel inverter is highly modular and can reach a high output voltage level using low-voltage-rating devices. In addition, it offers a unique feature in which a faulty or unnecessary unit can be bypassed without disturbing the circuit operation of the remaining healthy units. The derivation of the proposed inverters, modulation strategies, working principles, and common-mode voltage analysis is discussed. A 550-W experimental prototype of the proposed 3L half-bridge inverter and 1.5-kW experimental prototype of the proposed 5L cascaded modular multilevel inverter are constructed and tested. Test results verify the excellent performance of the proposed inverters.

Bidirectional Clamping-Based H5, HERIC, and H6 Transformerless Inverter Topologies With Reactive Power Capability

Transformerless inverters (TLIs) are competently accepted for photovoltaic (PV) applications because of their high efficiency, reduced size, and lower cost. But in the absence of a transformer, there exists a galvanic connection between the PV array to ground and it results in the flow of hazardous leakage current. Several TLI topologies have been proposed in the literature with decoupling circuits to reduce the leakage current. Among those H5, Heric, and H6 topologies are the most popular and widely accepted TLIs. Nevertheless, the effect of switch junction capacitances was not considered in the common-mode voltage analysis, which inevitably causes excess leakage current. Also, reactive power capability cannot be accomplished with traditional pulsewidth modulation (PWM) schemes due to the absence of a bidirectional current path during the freewheeling period. Therefore, in this article, a bidirectional clamping (BDC) based H5, Heric, and H6 TLI topologies are proposed with improved PWM schemes. BDC branch reduces the leakage current by clamping the inverter terminal voltages to half of the dc-link voltage during the freewheeling period and the improved PWM schemes ensure the bidirectional current path while operating in negative power region. The performance of both traditional and proposed topologies is tested with MATLAB simulations and further justified with experimental results.

High‐frequency electric‐motor modelling for conducted CM current prediction in adjustable speed drive system

This study presents a novel high-frequency three-phase permanent magnet synchronous motor (PMSM) model to predict the common-mode (CM) current and CM voltage in a pulse-width modulation inverter-fed adjustable speed drive systems. Parameters of the model are calculated based on the measured CM impedance, applying vector fitting method. The model-calculated CM impedance is compared with the experimental impedance measured on a 3 kW PMSM with the star-winding connection, which has shown considerable accuracy at a frequency range of 100 Hz-10 MHz. The frequency-domain analysis of CM voltage and CM current is then predicted by using the proposed circuit model in MATLAB/Simulink, which gives good agreement between calculated and the measured results.

Analysis and Design of Solar Photo voltaic Grid Connected Inverter

This paper presents common mode voltage analysis of single phase grid connected photovoltaic inverter. Many researchers proposed different grid tie inverters for applications like domestic powering, street lighting, water pumping, cooling and heating applications, however traditional grid tie PV inverter uses either a line frequency or a high frequency transformer between the inverter and grid but losses will increase in the network leading to reduced efficiency of the system. In order to increase the efficiency, with reduced size and cost of the system, the effective solution is to remove the isolation transformer. But common mode (CM) ground leakage current due to parasitic capacitance between the PV panels and the ground making the system unreliable. The common mode current reduces the efficiency of power conversion stage, affects the quality of grid current, deteriorate the electric magnetic compatibility and give rise to the safety threats. In order to eliminate the common mode leakage current in Transformerless PV systm two control algorithms of multi-carrier pwm are implemented and compared for performance analysis.The shoot-through issue that is encountered by traditional voltage source inverter is analyzed for enhanced system reliability. These control algorithms are compared for common mode voltage and THD comparisons. The proposed system is designed using MATLAB/SIMULINK software for analysis.

Analysis of Common-Mode Voltage in Utility-Interactive Fuel Cell Power Conditioners

Fuel cell stacks produce a dc output with a 2:1 voltage variation from no load to full load. It is customary for a utility-scale fuel cell stack to consist of several hundreds of series-connected cells, each producing 0.6 V at full load. A power conditioner consisting of dc-dc and dc-ac converters is required for utility interface, which are operated in high frequency, employing pulsewidth-modulation control for voltage and current regulation. Due to their switch-mode nature, a common-mode voltage with respect to ground is generated. The common-mode voltage, in turn, contributes to the circulating ground current, which can interfere with the ground fault protection system. In addition, it also contributes to the neutral shift and electromagnetic interference. Moreover, the electrostatic potential to ground within the fuel cell stack needs to be limited for safe operation. This paper presents an analysis of common-mode voltage in several fuel-cell-powered converter topologies connected to the electric utility and discusses several mitigation methods suitable for utility-scale generation.

Analysis of common mode voltage-"neutral shift" in medium voltage PWM adjustable speed drive (MV-ASD) systems

In this paper, an analysis of common mode voltage or "neutral lift" in the new emerging voltage source inverter type medium voltage adjustable speed drive (MV-ASD) systems is presented. Both cascaded multilevel (CML) inverter and 3-level NPC inverter topologies are analyzed. An equivalent circuit model to determine the common mode voltage stress is presented. Analysis and simulation results are discussed and worst case common mode voltage excursion is computed for an example 800 hp, 4160 V MV-ASD. It is shown that certain system components are excessively stressed and in the MV-ASD system these data are particularly useful in specifying system components and for proper design of the system. Possible effects of common mode voltage and its dv/dt on medium voltage motor bearings are discussed. A new multilevel PWM strategy is introduced which results in zero common-mode voltage. Simulation results are shown to illustrate the effectiveness of these schemes. Finally, experimental results from a 800 hp, 4160 V, MV-ASD system are presented.