Common mode voltage analysis and reduction technique for nine switch inverter fed dual load system

Abstract

Nine switch inverter (NSI) is a dual output topology that suffers from the common mode voltage (CMV) issues similar to conventional single output drive systems. A significant amount of literature is available to solve CMV in the traditional drive system, but there is a lack of literature on NSI CMV issues. The work presented in this paper serves to unify the understanding of different pulse width modulation (PWM) techniques applied to NSI and their effects on CMV. PWM techniques used in this study include sinusoidal, modified sinusoidal, discontinuous, and space vector PWM. This paper also investigates the possibility of reducing the CMV peak during zero vector states using two more switches in NSI without affecting the output voltage. To validate the proposed concept, an NSI fed dual load system is developed using MATLAB Simulink, and a real-time simulator OPALRT-OP4510 is used to support the findings.