Analog Predistortion Linearizer Research Articles

A Novel Analog Predistortion Linearizer Based on a Schottky diode for Communication Applications

Background and Objectives: In order to compensate the nonlinearity, several linearization approaches such as feedback, feed-forward, and predistortion have been proposed. Among these linearization methods, the analog predistortion (APD) method is very suitable for the power amplifier and TWTA linearization, because it has a good compromise between complexity, linearity improvement and bandwidth. On the other hand, analog predistortion circuit can be added to existing amplifiers as a separate circuit. Many of the reported linearizer circuits are capable of linearizing power amplifiers with high gain and phase variations. However, these circuits are complex and bulky due to the use of distortion producer, phase shifter, adjustable attenuator, combiner/divider, and control unit. The objective of this paper is increasing the dynamic range of the predistorter by a simple proposed circuit. Hence, linearization capability of the linearizer is boosted.Methods: A new analog predistortion linearizer based on a coupler and a Schottky diode is presented. The proposed structure satisfies linearization requirements of the solid-state power amplifiers (SSPAs) and traveling wave tube amplifiers (TWTAs). Using a parallel combination of two Schottky diodes along with transmission line in port 2 and 3 of the coupler, the dynamic range of reflection coefficient of each port is increased compared to using a single diode in each branch. By increasing the range of reflection signal, the linearization capability has been increased to linearize power amplifiers and TWTAs. The AM/AM and AM/PM of the linearizer is controlled by changing the bias voltage of power supply.Results: The simulation results show that about 30° phase shift and 5 dB gain expansion can be compensated for power amplifiers and TWTAs. Because of utilizing two diodes, the linearization capability of the new linearizer is augmented compared to the conventional linearizer.Conclusion: A novel analog predistortion circuit based on the hybrid coupler and Schottky diodes is presented. The suggested topology increases the dynamic range of reflected power from each port. Using the proposed idea, AM/AM and AM/PM characteristics are expanded such that this characteristic can linearize the power amplifier with high linearity.

A 28GHz Power Amplifier with Analog Predistortion Linearizer in 65nm CMOS

This paper proposes that a radio frequency power amplifier is suitable for a 5G millimeter wave. It adopts a three-stage single-ended structure at 28GHz. An analog predistortion linearization method is used to improve the linearity of the power amplifier (PA). As a result, there is a significant improvement in power-added efficiency (PAE) and linearity is achieved. The Ka-band PA is implemented in TSMC 65nm CMOS process. At 1.2V supply voltage, the PA proposed in this paper achieves a saturated output power of 15.9dBm and a PAE of 16%. After linearization, the output power at the 1dB compression point is increased by 2dBm, with efficient gain compensation performance.

Compact Analog Predistorter With Shape Tuning Capability Using Power-Dependent Impedance Matching Network

This brief presents a novel shape tunable reflective analog predistortion (RAPD) linearizer with a simple structure. The power-dependent impedance matching network (PIMN) based on parallel Schottky diode is applied to the RAPD linearizer to achieve the shape tuning function. Influence of the PIMN on the impedance of the nonlinear load is analyzed in detail. Two different types of shape tunable linearizers for the solid state power amplifier (SSPA) and the travelling wave tube amplifier (TWTA) are proposed and simulated. The shape tuning capability has been verified by a fabricated C-band RAPD linearizer. Good linearity improvement has been achieved for a C-band 20 W SSPA with the proposed linearizer.

Analog Predistortion Linearizer With Independently Tunable Gain and Phase Conversions for Ka-Band TWTA

Analog predistortion (APD) is an effective technique to improve the linearity of the traveling-wave tube amplifier (TWTA). This paper presents a novel APD linearizer with independently tunable gain and phase conversions. Based on symmetrical dual-branch vector synthetic topology, which avoids introducing the additional delay line, this linearizer achieves a simple circuit structure. Independent tuning of gain and phase conversions of this linearizer is realized by changing the bias voltages of the two branches. Theoretical analysis and tuning process of this linearizer are discussed in detail. Simulated and measured results are in a good agreement, and both of them verify that this linearizer has the independent tuning ability. Furthermore, a 250-W Ka-band TWTA is linearized by this linearizer, and the measurement results demonstrate the effectiveness of this linearizer in TWTA linearization.

15 GHz Doherty Power Amplifier With RF Predistortion Linearizer in CMOS SOI

A two-stage, high-power symmetric Doherty power amplifier (PA) at 15 GHz is presented. The PA is implemented in 45 nm CMOS silicon on insulator and achieves more than 23 dB power gain with 25.7 dBm saturated output power and 31% peak power added efficiency (PAE). The 6 dB back-off PAE is 25%, which is a 64% improvement compared to ideal class B PA back-off performance. High output power is obtained by employing four-stack multigate devices at the output stage; driver stages employ two-stack devices. A simple analog predistortion linearizer is proposed that effectively corrects the AM–AM response of the Doherty PA and extends the P1dB from 23 to 25.1 dBm. The PA also exhibits excellent AM–PM response. The amplifier has compact dimensions and occupies only 1 mm2 chip area, including pads.

A 700MHz to 2.5GHz Cascode GaAs Power Amplifier for Multi-Band Pico-Cell Achieving 20dB Gain, 40dBm to 45dBm OIP3 and 66% Peak PAE

Recent development and technology advancement in wireless communication systems to accommodate higher data rate poses a great challenge for wideband operation. This is due to the employment of modulation scheme, such as OFDM, which is subject to high peak to average ratio. Hence communication systems, such as LTE have to operate in multiple operating bands at the moment in order to transmit the OFDM signals linearly with high gain. The power amplifier serves as the bottle neck for high gain linear operation over wide bandwidth. This paper addresses this issue and further presents a novel integrated feedback and analog pre-distortion linearization technique as a solution to achieve wideband flat gain and linear output power while preserving the power amplifier’s power added efficiency (PAE). A maximally flat gain is achieved through the dual parallel feedback technique. The analog pre-distorter on the other hand introduces an optimum third order nonlinear signal components cancellation mechanism over wide frequency range. A prototype of 700 MHz to 2.5 GHz power amplifier is implemented in $0.25~\mu \text{m}$ PHEMT. It achieves an input and output return loss of less than −10 dB followed by flat power gain of 20 dB across the operating band, while sustaining an unconditional stability performance up to 20 GHz. With 1-dB compression point output power (P1dB) of 24.0 dBm, the PA delivers an OIP3 of more than 40 dBm with peak PAE of 66%. The fully integrated circuit consumes an area of 0.8 mm2. The proposed circuit serves to be a good solution to be integrated as a part of the wideband transmitter system for picocell application.

A dual-branch vector synthesis millimeter-wave predistortion linearizer

In view of the strong correlation between amplitude and phase characteristics of Traveling Wave Tube Amplifier (TWTA) analog predistortion technology, a dual-branch vector synthesis predistortion linearizer is proposed, which consists of branch line hybrid couplers, an adjustable attenuator and a reflective diode-based predistortion circuit. This linearizer is fabricated and measured according to the theoretical analysis and simulation results. The measurement results show that the linearizer can compensate the nonlinearity of the TWTAs. Once the two branches bias voltages are rationalized, the phase expansion can change 30 degrees, while the change of the amplitude expansion is less than 1 dB, which effectively reduces the correlation between the amplitude and the phase characteristics of the analog predistortion linearizer.

Analog predistortion linearizer on reducing corrected amplitude overshoot

This paper presents a dual-nonlinear branch linearizer for reducing the corrected amplitude overshoot of conventional single nonlinear branch linearizer. Theoretical analysis is carried out, the analysis is verified by simulation, and a prototype of Ka band 25.28∼26.08 GHz dual nonlinear branch linearizer is achieved. It indicates that the corrected amplitude overshoot is less than 0.5 dB, the C/I3 improvement is more than 10 dB related to a single carrier IBO 9 dB, when it is linked and tested for 50 W spacebrone Travelling Wave Tube Amplifier (TWTA).

An Adjustable Linearization for RF Power Amplifier

This paper presented an adjustable analog predistortion linearization method for RF power amplifier. The linearization includes an attenuator, a phase shifter and an anti-parallel Schottky diode pair with DC bias, through adjusting these components, we can adjust predistortion characteristic of the linearization to be complementary to distortion characteristic of RF power amplifier. By cascading this linearization with power amplifier, we can improve linearity of amplifier. Firstly, we simulated the proposed predistortion linearization with software ADS, then the linearization was manufactured and tested together with RF power amplifier PTF080551. Experimental results show that we can adjust predistortion characteristic of the linearization to be closely complementary to distrotion characteristic of power amplifier PTF080551 as desired. After cascading the linearization with power amplifier PTF080551, more than 10dB improvement in IMD3 of the amplifier can be achieved. Furthermore, the linerarizaion is flexible and can be adjusted to linearize different amplifiers.

Analog predistortion linearization of Doherty power amplifiers using bandwidth reduction of error signal

AbstractThis article represents analog predistortion linearization of Doherty power amplifier (DPA) using bandwidth reduction of error signal. To verify our methods, two DPAs are implemented using a push‐pull GaN HEMT and a push‐pull Si LDMOS at 2.14 GHz and tested using the memory‐compensated analog predistorter with transistor‐based error generators and three‐branch nonlinear paths. From the measured four‐carrier WCDMA results, the proposed analog predistortion DPAs show the significant linearity improvement. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 1313–1316, 2010; Published online in Wiley InterScience (www.interscience. wiley.com). DOI 10.1002/mop.25190

Analog Pre-Distortion Linearizer Using Self Base Bias Controlled Amplifier

An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1dB for a 2GHz-band, 10W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3dB for a LDMOS HPA with positive gain deviation for the same application.

Analog Predistortion High Power Amplifier Using Novel Low Memory Matching Topology

This paper represents an analog predistortion linearizer for the high power amplifier with low memory effect. The high power amplifier is implemented using a 90-W peak envelope power(PEP) LDMOSFET at 2.14-GHz and an envelope short matching topology is applied at the active ports to minimize the memory effect. The analog predistortion circuit comprises the fundamental path and the cuber and quintic generating circuits, whose amplitudes and phases can be controlled independently. The predistortion circuit is tested for two-tone and wide-band code division multiple access(WCDMA) 4FA signals. For the WCDMA signal, the adjacent channel leakage ratios(ACLRs) at 5 MHz offset are improved by 12.4 dB at average output powers of 36 dBm and 42 dBm.

Analog predistortion linearizer for high-power RF amplifiers

We have developed an analog predistortion linearizer for a high-power amplifier of a code-division multiple-access (CDMA) base station. To effectively suppress the spectral regrowth in the adjacent channels, the odd-order intermodulation distortions (IMDs) should be cancelled. To accomplish this purpose, we employed a predistorter, which can cancel the third and fifth IMDs independently. The implemented predistorter linearized the RF amplifier with an average power of 45 dBm at 2.37-2.4-GHz band. A 9-dB suppression of spectral regrowth, from 33 to 42 dBc, was achieved for the CDMA signal with an 8.192-Mc/s chip rate over a 30-MHz bandwidth.