Abstract
AbstractThis article represents analog predistortion linearization of Doherty power amplifier (DPA) using bandwidth reduction of error signal. To verify our methods, two DPAs are implemented using a push‐pull GaN HEMT and a push‐pull Si LDMOS at 2.14 GHz and tested using the memory‐compensated analog predistorter with transistor‐based error generators and three‐branch nonlinear paths. From the measured four‐carrier WCDMA results, the proposed analog predistortion DPAs show the significant linearity improvement. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 1313–1316, 2010; Published online in Wiley InterScience (www.interscience. wiley.com). DOI 10.1002/mop.25190
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