Analog Layout Research Articles

A fast, single-layer, area router for semi-custom analogue circuits

This paper describes the router developed for ALPS, the analogue layout prototyping system. the ALPS router employs some classic techniques and contributes a new, fast implementation of a maze-running algorithm and a new algorithm for finding two disjoint paths in a graph (the so-called ‘two path problem’). Discussion of these points is coupled with a review of existing routing algorithms and techniques, and comparisons where possible.

KOAN/ANAGRAM II: new tools for device-level analog placement and routing

The authors describe KOAN and ANAGRAM II, new tools for device-level analog placement and routing. Analog layout tools that merely apply known digital macrocell techniques fall short of achieving the density and performance of handcrafted analog cells. KOAN and ANAGRAM II differ from previous approaches by using general algorithmic techniques to find critical device-level layout optimizations rather than relying on a large library of fixed-topology module generators. New placement algorithms implemented in KOAN handle complex layout symmetries, dynamic merging and abutment of individual devices, and flexible generation of wells and bulk constants. New routing algorithms implemented in ANAGRAM II handle arbitrary gridless design rules in addition to over-the-device, crosstalk-avoiding, mirror-symmetric, and self-symmetric wiring. Examples of CMOS and BiCMOS analog cell layouts produced by these tools are presented.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Cell libraries and assembly tools for analog/digital CMOS and BiCMOS application-specific integrated circuit design

Reviews the use of cell libraries and assembly tools for application-specific integrated circuits (ASIC's). To illustrate the design process the authors describe the construction of cells suitable for 1.2-3- mu m CMOS and BiCMOS IC's, and the use of silicon assembly tools for use with these libraries. The digital library discussed was developed from an existing set of 3- mu m standard cells, data-path cells, and logic macrocells which were modified and augmented with analog cells. The library is compatible with public-domain software for logic synthesis, place and route, simulation, and layout. The authors compare the use of these tools with other commercial systems suitable for mixed analog/digital CMOS IC design. Analog library construction utilizes a set of prototype tools to reduce the time spent in the design, layout, and simulation cycle. The authors compare and contrast this approach to the use of analog compilation tools to assemble analog layout directly. They review present and suggest new techniques to realize high-performance analog circuits for mixed analog/digital IC's. >

ILAC: an automated layout tool for analog CMOS circuits

ILAC (interactive layout of analog CMOS circuits) is a process-independent tool that automatically generates geometrical layout for analog CMOS cells from a circuit description. ILAC handles typical analog layout constraints such as device matching, symmetry, and distance and coupling constraints. ILAC supports user-specified constraints on cell height and input/output pin locations. Together with the design tool IDAC (interactive design for analog circuits), ILAC makes a fully functional analog CMOS cell compiler that automatically produces geometrical layout from functional specifications for a library of circuits including amplifiers, voltage and current references, comparators, oscillators, and A/D (analog-to-digital) converters.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

IDAC: an interactive design tool for analog CMOS circuits

A design system has been developed which is able to design transconductance amplifiers, operational amplifiers, low-noise BIMOS amplifiers, voltage and current references, quartz oscillators, comparators, and oversampled A/D converters including their digital decimation filter starting from building-block and technology specifications. This design system, called Interactive Design for Analog Circuits (IDAC), is able to size a library of analog schematics (actually more than 40) as a function of technology (p-well and n-well CMOS) and desired building-block specifications. IDAC also generates a complete data sheet, an input file for SPICE2, and an input file for the analog layout program ILAC.