Analog Input Research Articles

Radiation testing of low cost, commercial off the shelf microcontroller board

The impact of gamma radiation on a commercial off the shelf microcontroller board has been investigated. Three different tests have been performed to ascertain the radiation tolerance of the device from a nuclear decommissioning deployment perspective. The first test analyses the effect of radiation on the output voltage of the on-board voltage regulator during irradiation. The second test evaluated the effect of gamma radiation on the voltage characteristics of analogue and digital inputs and outputs. The final test analyses the functionality of the microcontroller when using an external, shielded voltage regulator instead of the on-board voltage regulator. The results suggest that a series of latch-ups occurs in the microcontroller during irradiation, causing increased current drain which can damage the voltage regulator if it does not have short-circuit protection. The analogue to digital conversion functionality appears to be more sensitive to gamma radiation than digital and analogue output functionality. Using an external, shielded voltage regulator can prove beneficial when used for certain applications. The collected data suggests that detaching the voltage regulator can extend the lifespan of the platform up to approximately 350 Gy.

Design and Fabrication of Small-Scale Potato Peeling Machine with Lye Method

Peeling or removing the skin is one of the main post-harvest processes in fruits and vegetables. At present, most of the peeling of fruits and vegetables is done manually using sharp objects / knives. This method of peeling causes more fruit flesh to be wasted, especially fruits / vegetables with thin skins. Therefore, the design of a machine that can peel thin-skinned fruits / vegetables using the lye peeling method is needed. The purpose of this study was to design and fabrication a machine that can peel fruits and vegetables after the pre-treatment process of soaking in hot NaOH. The way this machine works is by spraying pressurized water on the fruit soaked in hot NaOH solution. In this study, the object was potatoes. Control of water pressure coming out of the nozzle is done using the pulse width modulation (PWM) method with a potentiometer. The treatments were carried out using three duty cycle values with the analogue input setting value on the microcontroller which resulted in three variations of water pressure coming out of the nozzle, namely: 60% (4.2038 Pa); 80% (5.6051 Pa); and 100% (7, 0065 Pa). Respectively for low, medium and high levels. Treatment concentrations of NaOH were 9%, 11% and 13%. The results obtained were the percentage of perfectly peeled skin close to 100% was obtained at 11% NaOH with a duty cycle value of 60% and 80%; and 13% NaOH with a duty cycle value of 80%. The calculation of the smallest percentage weight loss is 14.96% at 9% NaOH duty cycle 100% and the highest percentage weight loss is 35.89% at 13% NaOH 80% duty cycle.

SRIF: Scalable and Reliable Integrate and Fire Circuit ADC for Memristor-Based CIM Architectures

Emerging computation-in-memory (CIM) paradigm offers processing and storage of data at the same physical location, thus alleviating critical memory-processor communication bottlenecks suffered by conventional von-Neumann architecture. Storage of data in a CIM architecture is analog in nature and therefore computation is performed in analog domain i.e. inputs and outputs are analog values. Since the outside computing environment is digital, analog-to-digital converters (ADC) are utilized to perform the output data conversion. However, ADC designs are bulky, power-hungry circuits that are prone to design variations and therefore, play an important role in determining the computing efficiency of CIM architectures. In this paper, we present a scalable and reliable integrate and fire circuit ADC (SRIF-ADC) design for CIM architectures, suitable for stringent power and area constraints. We devise a technique to stabilize the node receiving analog inputs that allows more rows to be activated at the same time, thereby increasing the operand size of input vectors. This allows better scalability in terms of higher parallelism of operations. We employ a self-timed variation-aware design approach and design measures to drastically reduce read disturb of memristor devices that address reliability issues related to the ADC design. In addition, we present a compact, built-in sample-and-hold circuit to replace the large-sized capacitance and built-in weighting technique to alleviate the need for post-processing. For multiply-and-accumulate (MAC) operation, our simulation results show that we can improve the computational parallelism by 3X as well as ADC conversion speed and energy efficiency are improved by 2X and 11.6X, respectively, compared to the state-of-the-art design.

Energy Measurement of Solar Through Cloud Source Using Arduino

This project's aim is to use Arduino Board technology to create measurements of solar energy. Temperature, light, voltage, and current and the four parameters are measured in this analysis. The temperature sensor is used to measure temperature. The intensity of light is calculated using a LDR sensor. Since the voltage provided by the solar panel is too high to be used as a receiver for the Arduino, a voltage divider was used to determine the voltage. Finally, acs712 module was used to calculate the current, which can detect the current generated by the solar panel.
 These parameters were shown on the LCD screen as the Arduino's input and output values. The values are all displayed on the LCD panel and mobile phone through the cloud. Arduino's goal is to convert the parameter's analog input to a digital output and display it on an LCD, as well as on a smartphone. Aside from that, this project often involves a plan that ensure the device case is easy.

Design of Low cost Data Acquisition Circuit with Feature Extraction

Single channel Electrooculogram (EOG) data acquisition system is designed to observe the patterns of signal to confirm the presence of disease or disorder. Tracking the movements of the eyes are done for controlling applications such as wheelchair control, blink detection, word speller, etc for people with complete or partial disability. With the help of signals generated from the eyes, the pattern is studied. This paper lay upon designing of highly precised instrumentation part of single channel EOG with miniaturized circuit and low cost. Different amplifiers are used to remove noise and increase the gain of the signal. Arduino UNO will read the EOG signal as analog input and the signal is recorded using PLX DAQ software which is interfaced with Arduino. The EOG signal is taken for 15 adults and it is tested for the working of the circuit. The signal is further amplified and filtered using MATLAB software and thus the eye movements are visualized. The set of basic mathematical feature are derived for the filtered signal which can be used for future applications for differentiating various eye problems.

Adaptive Spatial Hybrid Nulling of Extremely Strong Interfering Signals

This article describes and examines a method of spatial suppression of extremely strong interfering signals (ISs) capable of complete desensitization and even damage of victim receivers’ input circuits. This method not only protects victim receivers but also allows them to reliably receive desired signals in the presence of such ISs, using adaptive hybrid nulling whose first stage is performed at the receivers’ analog inputs and the second stage is carried out in the receivers’ digital portions.

Modeling of a Reciprocating Engine-Generator Set for Controller-Hardware-in-the-Loop Testing of Island Microgrid Control Systems

This article demonstrates the modeling of a real engine-generator set (genset) based on manufacturer data for use in controller-hardware-in-the-loop testing of microgrid control systems. The simulation environment used is RTDS Technologies' real time digital simulator using PB5 cards. In addition, this article provides detail on integration of a commercially available controller with the simulator analog and digital inputs and outputs for control of the simulated genset. Testing of the developed model is performed to validate the standard parameters of the synchronous generator and the dynamic performance of the genset during starting, load acceptance, and load sharing between multiple gensets. By integrating controller hardware, time spent on modeling the genset frequency, voltage, and load sharing controls is avoided and valuable simulator processing capacity is saved. The result of this investigation is a genset model that exhibits the characteristics of real equipment and may be used in the validation of controller hardware and software for the derisking of microgrid control systems.

The Quench Detection System Based on Programmable FPGA and Its Application at IMP

The High Intensity heavy ion Accelerator Facility (HIAF) and Low Energy heavy ion Accelerator Facility (LEAF) of IMP are under construction. They will comprise many superconducting devices and components, such as magnets and current leads, with the superconducting materials covering NbTi, Nb <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> Sn and HTS. On the other hand, most of the superconducting devices have a high energy density and complex structure, requiring a targeted and active protection. In previous quench protection systems implemented at IMP, the quench detection was implemented in software or as microcontroller-based equipment, where power supplies in superconducting circuit provided quench detection functionality as well. These systems have some disadvantages, such as limited functionalities, poor reliability and high susceptibility to interference. Therefore, a new type of quench detection system (QDS) based on programmable FPGA and Isolated analogue input front-ends was developed to overcome these challenges. It is important to note that in the test facilities, there is no ionizing radiation, the QDS does not require radiation tolerance, thus a commercial programmable FPGA product was chosen as the development platform. The QDS is currently being put into operation, and some good results have been obtained in the cold tests of MCBRDP2 (belongs to HL-LHC, NbTi magnet) and FECR (belongs to LEAF, Nb <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> Sn magnet). Based on these successful applications, the new QDS has proven its functionality. The recorded data and practical experience also provided relevant information for the detection algorithms and functional upgrades.

Integrating Non-spiking Interneurons in Spiking Neural Networks.

Researchers working with neural networks have historically focused on either non-spiking neurons tractable for running on computers or more biologically plausible spiking neurons typically requiring special hardware. However, in nature homogeneous networks of neurons do not exist. Instead, spiking and non-spiking neurons cooperate, each bringing a different set of advantages. A well-researched biological example of such a mixed network is a sensorimotor pathway, responsible for mapping sensory inputs to behavioral changes. This type of pathway is also well-researched in robotics where it is applied to achieve closed-loop operation of legged robots by adapting amplitude, frequency, and phase of the motor output. In this paper we investigate how spiking and non-spiking neurons can be combined to create a sensorimotor neuron pathway capable of shaping network output based on analog input. We propose sub-threshold operation of an existing spiking neuron model to create a non-spiking neuron able to interpret analog information and communicate with spiking neurons. The validity of this methodology is confirmed through a simulation of a closed-loop amplitude regulating network inspired by the internal feedback loops found in insects for posturing. Additionally, we show that non-spiking neurons can effectively manipulate post-synaptic spiking neurons in an event-based architecture. The ability to work with mixed networks provides an opportunity for researchers to investigate new network architectures for adaptive controllers, potentially improving locomotion strategies of legged robots.

Greenhouse automation: smart watering system for plants in greenhouse using programmable logic control (PLC)

Automation is a technology used to carry out work processes or procedures without human assistance. Greenhouse automation is carried out related to the many operational activities in the greenhouse that involve many human repetitive activities. Some of them are related to fertilizing, watering, spraying pesticides and others. In the current era of the industrial revolution 4.0, manual activities that use human labor began to diminish and were replaced with automated systems and devices in order to streamline the operation of a work field,. PLCs can be defined as a micro-computer based controllers that use instructions stored in memory that can be programmed to implement logic, sequencing, timing, counting and arithmetic functions through digital or analog input / output (I / O) modules, to control machines and processes. This PLC is commonly used in the industrial world as an automation tool for production machines. PLC can be implemented as an automation tool in a greenhouse in this case as an automatic watering system for plants. This research resulted in a prototype of an automatic watering system on a clock based and combined clock-sensor based greenhouse that can run simultaneously on the same PLC.

Reading and processing of analog signals of the software complex “Automated control system for the technological process of the associated production of concentrates of nanostructures MD1 and MD2”

In this paper, the main order to automate the control of the technological process of the associated production of concentrates of nanostructures MD1 and MD2 is presented. The algorithm has been developed for processing incoming raw integer data into a real format in the parameter range, which is implemented in software and hardware at the level of the analog input module. The configuration of the algorithm is performed by specifying the input data using the program. The developed algorithms make it possible to implement an effective automated control system for further implementation in production.

Li memristor-based MOSFET synapse for linear I–V characteristic and processing analog input neuromorphic system

In this research, we propose a method that can significantly improve the linearity of current–voltage characteristics (L–IV) of synapse devices. Considering that analog input data are dependent on the L–IV, synapse devices having non-linear current–voltage characteristics can result in drastic conductance variations during inference operations. It means that the L–IV is one of the key parameters in the synapse device. To improve the L–IV, a triode region of a metal oxide semiconductor field effect transistor (MOSFET) was utilized with a Li-ion-based memristor as a gate voltage divider, which results in gradual channel conductance changes (analog synaptic weights). The channel conductance of the MOSFET can be selectively controlled based on Li-ion intercalation and de-intercalation. A notably improved L–IV and analog synaptic weights were achieved, which enhanced the MNIST data set recognition accuracy from 35.8% to 92.03%.

A Foreground Calibration for M-Channel Time-Interleaved Analog-to-Digital Converters Based on Genetic Algorithm

The time-interleaved analog-to-digital converter has shown to be a key component of the latest ultra-wide band systems. Unfortunately, the sub-analog-to-digital converters are prone to parameter deviations caused by process-voltage-temperature, which can affect the output linearity. This article presents a foreground time-interleaved analog-to-digital converter mismatch calibration, which is one of the few available in the literature that can be adapted to any interleaving factor and calibrate overall frequency-dependent mismatches. Moreover, the proposed scheme is highly suited to state-of-the-art transceivers without the need for extra analog expensive circuitry or input signal purity. The foreground signal and correction structure complexity are greatly alleviated due to the developed mismatch detection and genetic algorithm logic. Numerical simulations and measurement results are presented. A commercial 3.6-GS/s time-interleaved analog-to-digital converter was utilized to verify the algorithm performance and experimental issues regarding mixed mismatches are addressed.

Solar Panel Measurement System using Arduino with Bluetooth

This project aims to develop a measurement of solar energy using Arduino. In this research, two parameters that been measured are light intensity and the voltage. The light intensity was measured using light dependent resistor (LDR) sensor. The voltage was measured using the voltage divider because the voltage generated by the solar panel are large for the Arduino as receiver. These parameters as the input value for the Arduino and the output was display at the Arduino Bluetooth Controller. The Arduino Bluetooth controller display output of the light intensity and the voltage value. The purpose of using Arduino is to convert the analog input of parameter to the digital output and display via Bluetooth .

Design and Implementation of an Automated Lighting System

A programmable logic controller is a digitally operated system used in an industrial environment that uses a programmable memory to implement specific functions to control through digital or analogue inputs and outputs of various types of machines. This report used a typical application for PLC's lighting control in a building for an office environment. The proposed design must define an appropriate office with various areas or rooms needing lighting with multiple control signals, the lighting controlled by a Siemens LOGO PLC (type 6ED1 052-1MD00-0BA5). The design has four relay outputs and eight digital inputs configured as analogue inputs. The scheme designed must be unique to meet the minimum requirements, including a provision for emergency evacuation if the radiation levels exceed a critical threshold. The system must use both analogue inputs but used for different purposes, and the analogue input level ranges must be significantly different. The relay logic has controlled by rules derived from an original relay logic using an embedded computer system. It optimises the control tasks to perform rugged designs to withstand vibrations, temperature, humidity, and electrical noise designs that allow a vast expansion. This circuit will be developed and simulated using the LOGO comfort software and then implemented on the PLC hardware. It includes diagrams and a description that clearly describes how the system should operate.

Dams Gate Control Using Programmable Logic Controller and SCADA

This paper is focused on the automation of gates of dam with using the current smart technologies of Programmable Logic Controller (PLC) and SCADA. A dam is an artificial reservoir made to collect a huge volume of water across a river or water body and use it for the purpose of generation of electricity, irrigation, water conservation and stream regulation. Due to uneven rainfall in India, it is not possible for some areas to get regular supply of water or due to their geographical conditions a huge amount of water runoff. So, water collected in the dam is very essential for these areas. Hence, it is necessary to make dams gates automatic for the wise use of available water resource, and increase efficiency of dams that would result in best commercial, agricultural and social benefits. A large number of dams in the world still uses manual system for the controlling of gates of dam, which employs humans for the desired operation, that may have the chances of human error resulting in improper regulation of the stream and also decreases the overall efficiency. To overcome these problems an Automation system is essential that comprises of PLC and SCADA to control the gates of dam by using a single system operation. The operations of dam gates are based on the feedback signals from the level sensors (Digital Input) and float sensor (Analog Input). The forward and reverse operation of dc motor of gates is achieved with the PLC.Ladder programming is used to implement the wholeoperations of this system. SCADA is used for remote monitoring for a number of dams from a central controlling station.

A Background Correlation-Based Timing Skew Estimation Method for Time-Interleaved ADCs

This paper presents a correlation-based all-digital background estimation method for timing skew mismatches in time-interleaved analog-to-digital converters (TI-ADCs). Exploiting the first-order approximation of an autocorrelation function of the digital output of each Sub-ADC, the timing skew mismatch between adjacent channels is identified, which can be used for analog or digital correction methods. The proposed estimation method has a low computation complexity and a simple implementation structure, because it basically only requires multiply-accumulate and average operations. In addition, the proposed method is not limited in the number of channels, does not need any pilot injection, is basically suitable for any bandlimited analog input signal, possess a large estimation range of mismatches and is immune against gain and offset mismatches to a certain extent. Simulation results of a four-channel TI-ADC behavioral model and measurement results from a commercial 12-bit 3.6-GS/s TI-ADC show the effectiveness and superiority of the proposed estimation method.

On Full-Duplex Radios With Modulo-ADCs

Wireless full-duplex (FD) transceivers have become more commonplace in the recent years, enabled by improvements in hardware as well as in signal processing algorithms dedicated to self-interference (SI) mitigation. A key design target for any FD radio is to limit the analog-to-digital converter (ADC) quantization noise affecting the signal of interest (SoI), which results from the difference in dynamic range between the SI and the SoI at the input of the ADC. Indeed, when using conventional ADCs, since the SI power is much larger than that of the SoI, the SI spans most of the ADC's dynamic range and the SoI becomes distorted by a large quantization noise. Reducing the power of the SI before the ADC, for example via analog domain SI cancellation, is so far the only means to mitigate this undesired effect. In this paper we consider the use of so-called modulo ADCs as a new tool to reduce the quantization noise that affects the SoI in the presence of SI. We demonstrate theoretically and numerically that by substituting the conventional ADCs with modulo-ADCs, which fold the analog input signal before analog-to-digital conversion, and by using appropriately designed analog gain control and digital-domain SI cancellation, one can reduce the quantization noise that affects the SoI. As such, the work in this paper provides a new technique for counteracting the detrimental effect of SI in analog-to-digital conversion and, thus, provides a new route to be explored in order to enhance the performance of FD radios.

Development of a data acquisition program to measure the exhaust time of a pneumatic valve

This paper deals with development of a data acquisition program to measure the exhaust time of a mechanical actuated pneumatic valve. The volume, which will be exhausted is determined by a so-called end of line testing procedure. The data acquisition unit is an Advantech ADAM 4117 8 channel analogue input module. The measuring and logging program is developed in LabVIEW software. The program provides the data in comma separated value file format for postprocessing opportunities.

Spiking Neural Networks With Time-to-First-Spike Coding Using TFT-Type Synaptic Device Model

In hardware-based spiking neural networks (SNNs), the conversion of analog input data into the arrival time of an input pulse is regarded as a good candidate for the encoding method due to its bio-plausibility and power-efficiency. In this work, we trained an SNN encoded by time to first spike (TTFS) and performed an inference process using the behavior of the fabricated TFT-type flash synaptic device. The exponentially decaying synaptic current model required in the inference process was implemented by reading devices in the subthreshold region using triangle pulses. In a high-level system simulation, the TTFS-SNN (two-layer MLP with 512 hidden neurons) reached a high accuracy of 97.94%. Compared to conventional rate-encoded SNNs, TTFS-SNN made 2.9 times faster judgment and consumed ~10 times less energy in the inference process. Additionally, to use the network in a more stable condition, we propose a method to operate it using a rectangle pulse in the saturation region of the synaptic device. The distortion caused by this approximation was minimized by shortening the pulse width. As a result, the modified inference system showed an accuracy of 97.36%, and the prediction time and energy consumption were reduced 3.97- and 83.04-times when compared to those of the rate-SNN. Finally, we analyzed the sensitivity of the network performance due to unexpected issues that may occur in the hardware system and thus explained the competitiveness of the proposed synaptic behavior in the saturation region.