Analog Fault Research Articles

Thermal efficiency of stick slip events along experimental analog faults

Most of the elastic energy released by earthquakes is believed to convert into heat; however, the reported experimental thermal efficiencies, defined as the ratio of frictional heat to elastic energy, are largely scattering, i.e., 50% or 90%. In this study, we conducted double direct shear experiments using halite powders as fault gouge under normal stresses of 10, 20, 30, 40, and 50 MPa to investigate the thermal efficiency of stick slip events. The results revealed two types of temperature changes during stick slip, resulting from stress drop and frictional heating. The temperature change caused by stress drop reduced thermal efficiency by 10%–20%. The scaling relationships between the friction heat, displacement and normal stress were also determined, which bridge the gap between the previous experimental conditions with only low and high normal stresses. The thermal efficiency was 50%–85%, and the specific value was inversely proportional to the fraction of stress drop. The thermal efficiencies was not a constant value and was closely related to the coseismic stress variation. The findings of this study suggest that the widely assumed 90% earthquake heat fraction is a consequence of specific stress change conditions.

An evolution strategy of GAN for the generation of high impedance fault samples based on Reptile algorithm

In a distribution system, sparse reliable samples and inconsistent fault characteristics always appear in the dataset of neural network fault detection models because of high impedance fault (HIF) and system structural changes. In this paper, we present an algorithm called Generative Adversarial Networks (GAN) based on the Reptile Algorithm (GANRA) for generating fault data and propose an evolution strategy based on GANRA to assist the fault detection of neural networks. First, the GANRA generates enough high-quality analogous fault data to solve a shortage of realistic fault data for the fault detection model’s training. Second, an evolution strategy is proposed to help the GANRA improve the fault detection neural network’s accuracy and generalization by searching for GAN’s initial parameters. Finally, Convolutional Neural Network (CNN) is considered as the identification fault model in simulation experiments to verify the validity of the evolution strategy and the GANRA under the HIF environment. The results show that the GANRA can optimize the initial parameters of GAN and effectively reduce the calculation time, the sample size, and the number of learning iterations needed for dataset generation in the new grid structures.

The Role of Fault Rock Fabric in the Dynamics of Laboratory Faults

AbstractFault stability is inherently linked to the frictional and healing properties of fault rocks and associated fabrics. Their complex interaction controls how the stored elastic energy is dissipated, that is, through creep or seismic motion. In this work, we focus on the relevance of fault fabrics in controlling the reactivation and slip behavior of dolomite‐anhydrite analog faults. We designed a set of laboratory experiments where we first develop fault rocks characterized by different grain size reduction and localization at normal stresses of σN = 15, 35, 60, and 100 MPa and second, we reload and reactivate these fault rocks at the frictional stability transition, achieved at σN = 35 MPa by reducing the machine stiffness. If normal stress is lowered this way, reactivation occurs with relatively large stress drops and large peak‐slip velocities. Subsequent unstable behavior produces slow stick‐slip events with low stress drop and with either asymmetric or Gaussian slip velocity function depending on the inherited fault fabric. If normal stress is raised, deformation is accommodated within angular cataclasites promoting stable slip. The integration of microstructural data (showing brittle reworking of preexisting textures) with mechanical data (documenting restrengthening and dilation upon reactivation) suggests that frictional and chemically assisted healing, which is common in natural faults during the interseismic phase, can be a relevant process in developing large instabilities. We also conclude that fault rock heterogeneity (fault fabric) modulates the slip velocity function and thus the dynamics of repeating stick‐slip cycles.

Adaptation of a Real-Time Deep Learning Approach With an Analog Fault Detection Technique for Reliability Forecasting of Capacitor Banks Used in Mobile Vehicles

The reliability of DC-link capacitor-banks (CBs) encounters many challenges due to their usage in electric vehicles. Heavy shocks may damage the internal capacitors without shutting down the CB. The fundamental development obstacles of CBs are: lack of considering capacitor degradation in reliability assessment, the impact of unforeseen sudden internal capacitor faults in forecasting CB lifetime, and the faults consequence on CB degradation. The sudden faults change the CB capacitance, which leads to reliability change. To more accurately estimate the reliability, the type of the fault needs to be detected for predicting the correct post-fault capacitance. To address these practical problems, a new CB model and reliability assessment formula covering all fault types are first presented, then, a new analog fault-detection method is presented, and a combination of online-learning long short-term memory (LSTM) and fault-detection method is subsequently performed, which adapt the sudden internal CB faults with the LSTM to correctly predict the CB degradation. To confirm the correct LSTM operation, four capacitors degradation is practically recorded for 2000-hours, and the off-line faultless degradation values predicted by the LSTM are compared with the actual data. The experimental findings validate the applicability of the proposed method. All experimental codes-data are attached.

A Fault Diagnosis Method of Modular Analog Circuit Based on SVDD and D-S Evidence Theory.

In the actual fault diagnosis process of an analog circuit, there is often a problem due to the lack of fault samples, leading to the low-accuracy of diagnostic models. Therefore, using positive samples that are easy to obtain to establish diagnostic models became a research hotspot in the field of analog circuit fault diagnosis. This paper proposes a method based on Support Vector Data Description (SVDD) and Dempster–Shafer evidence theory (D–S evidence theory) for fault diagnosis of modular analog circuit. Firstly, the principle of circuit module partition is proposed to divide the analog circuit under test, and the output port of each module is selected as test point. Secondly, the paper extracts the feature of the time-domain and frequency-domain output signals of the circuit module through Principal Component Analysis (PCA). Thirdly, four state detection models based on SVDD are established to judge the working state of each circuit module, including TSG, TSP, FSG, and FSP state detection model. Finally, the D–S theory is introduced to integrate the test results of each model for locating fault circuit module. To verify the effectiveness of the proposed method, the dual bandpass filter circuit is selected for simulation and hardware experiment. The results show that the proposed method can locate the analog fault effectively and has a higher diagnosis accuracy.

Effect of Permeability Evolution in Fault Damage Zones on Earthquake Recurrence

AbstractMicro‐crack density, porosity, and permeability in fault damage zones play an important role in the pore fluid diffusion process. During long‐term earthquake cycles, those properties change with time as a result of either physical damage or chemical/physical healing. Hence, the evolution of permeability can affect the recurrence of earthquakes by either delaying or accelerating the weakening of the fault core through controlling the pore pressure distribution and changing the effective normal stress. In this study, we use a single degree of freedom spring slider analog fault model to simulate the earthquake sequences, considering permeability as a decreasing function of the effective normal stress and thus an increasing function of pore pressure; we also examine its evolution resulting from coseismic damage and interseismic healing. Our simulation results show that different permeability evolution, controlled by various physical conditions, could result in a variety of fault slipping histories, which demonstrates the importance of incorporating the permeability evolution into earthquake modeling, especially when assessing the long‐term effects.

Design of Sand‐Based, 3‐D‐Printed Analog Faults With Controlled Frictional Properties

AbstractLaboratory experiments with surrogate materials play an important role in fault mechanics. They can improve the current state of knowledge by testing various scientific hypotheses in a repeatable and controlled way. Central in these experiments is the selection of appropriate analog, rock‐like materials. Here, we investigated the frictional properties of sand‐based, 3‐D‐printed materials. We performed uniaxial compression tests, direct shear, and inclined plane tests in order to determine a) the main bulk mechanical parameters of this new analog material, b) its viscous behavior, c) its frictional properties, and d) the influence of some printing parameters. Complete stress‐strain/apparent friction‐displacement curves were presented including the post‐peak, softening behavior, which is a key factor in earthquake instability. Going a step further, we printed rock‐like interfaces of custom frictional properties. Based on a simple analytical model, we designed the a) maximum, minimum, and residual apparent frictional properties, b) characteristic slip distance, c) evolution of the friction coefficient with slip, and d) dilatancy of the printed interfaces. This model was experimentally validated using interfaces following a sinusoidal pattern, which led to an oscillating evolution of the apparent friction coefficient with slip. Our approach could be used for simulating earthquake‐like instabilities in the laboratory and mimic the periodical rupture and healing of fault sections. Additionally, our tests showed the creation of a gouge‐like layer due to granular debonding during sliding, whose properties were quantified. The experimental results and the presented methodology make it possible to design new surrogate laboratory experiments for fault mechanics and geomechanics.

Wheel flat analogue fault detector verification study under dynamic testing conditions using a scaled bogie test rig

ABSTRACT Advanced health monitoring of unpowered heavy haul and general freight railway wagons is still an emerging field, limited by the lack of electrical power on-board the vehicles and the cost of instrumenting massive fleets. This paper presents a dynamic verification of an on-board wheel flat detection technique that, using analogue signal processing, reduces the power consumption and hardware costs of condition monitoring sensor nodes. A 1:4 scale bogie test rig was used to record bearing adapter acceleration signals of healthy and defective wheelsets. The data were then used to verify the wheel flat detection technique, which effectively distinguished between healthy and defective acceleration signals, using analogue computing only, without the need for software or a complex algorithm and corresponding hardware. This technique is promising for further development of low-cost and ultra-low power sensor nodes systems that require numerous sensor nodes, such as heavy haul and general freight railway applications.

A Methodology for Identification of Internal Nets for Improving Fault Coverage in Analog and Mixed Signal Circuits

Traditional literature on analog testing deals with the propagation of faults to the output ports of a circuit. Often the percentage of detected faults remains low because suitable stimuli cannot be found for propagating certain faults to the outputs. Existing technology supports monitoring internal nets of a circuit, thereby improving fault detection by observing their effect on internal nets. However, this approach is feasible only if the number of internal nets probed by the built-in test structure is limited. This paper presents a structured approach that identifies a small well-chosen subset of internal nets which, when probed, can increase the coverage of analog faults. Further, it describes a formal methodology to identify distinct sub-circuits in a given design, that could be independently probed for detection of faults. Thus, for a given fault universe, the complexity of simulations can be reduced significantly by simulating only the sub-circuits rather than the entire design. We utilize the speed of DC analysis, some common features of analog signals, and partitioning of the transistor netlist using a Channel Connected Graph to accomplish this outcome. We report significant improvement in fault coverage on several circuits including some Analog/Mixed-Signal benchmarks.

Cohesional Slip on a Plate Subduction Boundary During a Large Earthquake

AbstractThe frontal part of the Japan Trench plate boundary fault, which slipped during the 2011 Tohoku‐Oki earthquake (Mw 9.0), is enriched in smectite and is intrinsically weak owing to the high swelling pressure of this mineral. Our rheometric experiments using analog fault materials demonstrate that “cohesional slip,” rather than frictional slip, is a realistic faulting process in the studied fault zone. The cohesional slip can be described by the Bingham plastic model. Consequently, the coseismic shear stress is described by the yield stress and plastic viscosity. Comparison of the results with the average shear stress derived from a previous study suggests that the slip zone thickness for cohesional slip is ~1.3 cm or less. This finding is consistent with textures characterized by discrete slip planes of comparable thickness observed in the recovered fault rocks, suggesting that these slip planes were activated during the Tohoku‐Oki earthquake.

The impact of weathering upon the roughness characteristics of a splay of the active fault system responsible for the massive 2016 seismic sequence of the Central Apennines, Italy

AbstractFault roughness constitutes a key element in the understanding of earthquake nucleation, and surficial asperities on the fault plane play a critical role in slip dynamics and frictional behavior during the seismic cycle. Since it is not generally feasible to recover fault roughness profiles or maps directly at the seismogenic sources, faults at the Earth’s surface are typically used as analogues. However, these analogue fault surfaces are often subjected to weathering and erosion, which in turn, reduces their representativeness as seismogenic faults. Rupture along active faults episodically exposes “fresh” fault planes at the Earth’s surface, which represent the best available targets for the evaluation of fault roughness generated at seismogenic depths.Here we present a study conducted on a splay of the Mt. Vettore fault system in the Central Apennines, Italy, along a vertical transect that includes both a weathered and freshly exposed portion of the fault. The latter was exposed after the dramatic Mw 6.5 shock that hit the area on 30 October 2016. We have produced a highly detailed model (i.e., point cloud) of a section of the fault using structure from motion-multiview stereo photogrammetry to assess its roughness parameters (i.e., the Hurst fractal parameter) and to determine the extent to which these parameters are affected by weathering assuming that they had similar fractal characteristics when reaching the surface.Our results show that weathering can modify the value of the fractal parameters. In particular, by independently analyzing different patches of the fault, we have observed that the smoother and recently exposed portions have an average Hurst exponent of 0.52 while the average Hurst exponent of zones with more prolonged exposure times is 0.64. Accordingly, we conclude that by using high-resolution point clouds, it is possible to recognize patches of faults having a similar intensity of deterioration attributable to weathering.

Structural interpretation of thrust fault-related landforms on Mercury using Earth analogue fault models

The Yakima Fold Province has often been referenced as an Earth analogue to thrust fault-related landforms on many solar system bodies including Mars, the Moon, and Mercury. The asymmetric ridges of deformed flood basalts in this region evoke the morphology and topographic expression of the landforms observed in the Smooth Plains units of Mercury. Observed similarities have supported the interpretation that thrust faults and folds comprise both sets of landforms; however, this is an incomplete analogy. Recent modeling efforts have revealed that the terrestrial landforms developed over millions of years with vertical uplift associated with each landform accumulating on multiple faults and accommodated by large folds. These studies highlight the important role that folding plays in accommodating crustal shortening. Work presented here uses the structural geometries and folding styles from the Yakima Fold Province as a framework for constructing ten three-dimensional models of thrust fault-related landforms in Smooth Plains units near Suisei Planitia on Mercury, which traditionally would have been classified as “wrinkle ridges” based on appearance and some aspects of morphology. Forward modeling of topography revealed that multiple faults and folds are necessary to reproduce complex topographic features. Folding was found to account for >50% of vertical uplift associated with the landforms and without considering folding, shortening accommodated by the landforms was underestimated by 61 to 88%. Studies which use thrust fault-related landforms as proxies for stress and strain must therefore consider the effect of folding on these estimates and their associated effect on tectonic and thermal histories.

Assessing the Effectiveness of Different Test Approaches for Power Devices in a PCB

Power electronic systems using printed circuit boards (PCBs) are broadly used in many applications, including some safety-critical ones. Several standards (e.g., ISO26262 for the automotive sector and DO-178 for avionics) mandate the adoption of effective test procedures for all electronic systems. However, the metrics to be used to compute the effectiveness of the adopted test procedures are not so clearly defined for power devices and systems. In the past years, some commercial fault simulation tools (e.g., DefectSim by Mentor Graphics and TestMAX by Synopsys) for analog circuits have been introduced, together with some new fault models. With these new tools, systematic analog fault simulation finally became practically feasible. The aim of this article is twofold: first, we propose a method to extend the usage of the new analog fault models to power devices, thus allowing to compute a fault coverage figure for a given test. Second, we adopt the method on a case study, for which we quantitatively evaluate the effectiveness of some test procedures commonly used at the PCB level for the detection of faults inside power devices. A typical power supply unit (PSU) used in industrial products, including power transistors and power diodes, is considered. The analysis of the gathered results shows that using the new method we can identify the main points of strength/weakness of the different test solutions in a quantitative and deterministic manner and pinpoint the faults escaping to each one.

Ultra-Low Power Sensor Node for On-Board Railway Wagon Monitoring

Continuous real-time monitoring of unpowered railway vehicles such as general freight and heavy haul wagons is still limited by hardware scalability and power consumption challenges. This paper proposes an innovative sensor node hardware architecture that reduces power consumption and hardware costs by introducing an Analogue Fault Detector based on analogue signal processing. This technique allows data intensive fault detection and condition monitoring algorithms to be run by simple microcontrollers, reducing memory, execution time and computational requirements. An on-board wheel flat detection sensor node was tested in laboratory conditions using a hardware-in-the-loop setup, to quantify the improvements and explore the viability of the proposed sensor node architecture approach. The power required to detect a wheel flat defect in a simulated acceleration signal was reduced by one order of magnitude and the memory requirement was reduced by three orders of magnitude for the data acquisition and processing stage, compared to traditional sensor node hardware architectures. This is particularly relevant in data intensive applications using accelerometers for monitoring railway vehicles. The improvements delivered by the introduction of an Analogue Fault Detector in a sensor node hardware architecture are promising for further development of on-board ultra-low power condition monitoring sensor nodes for railway applications.

Simplified Dynamic Modeling of Faulted Turbidite Reservoirs: A Deep-Learning Approach to Recovery-Factor Forecasting for Exploration

Summary Faults are geological features that are essential in considering the development of hydrocarbon reservoirs. Significant resources (appraisal costs and manpower) are often deployed to locate them and assess their connectivity more accurately so that adequate investment decisions can be made. Early in a project's life, data might be sparse or the time that can be dedicated to data processing might be limited. An estimate of the impact of faults can be derived by considering the impact of analogous fault patterns in similar reservoir environments. A significant number of discoveries consist of channelized turbidite reservoirs draped over deepwater toe–thrust anticlines. To understand the effects of various fault patterns on the recovery factors of structurally complex turbidite reservoirs, we first perform extensive flow–simulation–based multidimensional sensitivity studies using realistic channelized stratigraphic architectures. Many of these reservoirs contain high–porosity, high–permeability channels, light oil, limited aquifer drive, and a limited number of fault populations. To constrain the potential impacts of the faults, a generic reservoir model was constructed and simulated with varying reservoir and fault properties. Because the input parameters are known (e.g., fault–zone thickness and permeability, shale–drape coverage, and oil viscosity), the relative importance of each variable can be quantified. The simulation results show that the impacts of the faults on reservoir performance vary systematically with the fault length and orientation, the undeformed–reservoir permeability, and the fault permeability. The recovery factors are relatively insensitive to fault–zone thickness, net/gross ratio, and porosity. The time–delay effect of the faults is significant in reservoirs with a permeability of approximately 100 md but not in darcy–quality reservoirs. In most fault scenarios, the recovery factors from simulations with high–permeability faults range from approximately 30% in 100–md reservoirs to approximately 45% in 3,000–md reservoirs, equivalent to 75 to 96% of the recovery factors of the unfaulted reservoirs. In comparison, assuming the most likely fault permeabilities, the recovery factors decrease to circa 20% in 100–md reservoirs and circa 41% in 3,000–md reservoirs, equivalent to 40 to 85% of the values in unfaulted reservoirs. To learn and predict the effects of faults on the recovery factor in a very fast and reasonably generic fashion in deepwater toe–thrust anticlines, we have developed an accurate deep–learning (DL) based surrogate model that predicts the structure connectivity factors as a function of recovery time. These factors are then used for discounting the recovery factors computed by simpler and easier–to–construct unfaulted models. The surrogate model is a very fast and advanced proxy for the multidimensional structure connectivity factor function and operates without resorting to any new flow simulation with a faulted model. We describe the novel DL architecture used for constructing the surrogate model and quantitatively prove its effectiveness. We finally demonstrate an example real–life application of the surrogate model on an exploration–stage prospect–ranking exercise.

Analog Gross Fault Identification in RF Circuits Using Neural Models and Constrained Parameter Extraction

The demand and relevance of efficient analog fault diagnosis methods for modern RF and microwave-integrated circuits increase with the growing need and complexity of analog and mixed-signal circuitry. The well-established digital fault diagnosis methods are insufficient for analog circuitry due to the intrinsic complexity in analog faults and their corresponding identification process. In this paper, we present an artificial neural network (ANN) modeling approach to efficiently emulate the injection of analog faults in RF circuits. The resulting metamodel is used for fault identification by applying an optimization-based process using a constrained parameter extraction formulation. A generalized neural modeling formulation to include auxiliary measurements in the circuit is proposed. This generalized formulation significantly increases the uniqueness of the faults identification process. The proposed methodology is illustrated by two faulty analog circuits: a CMOS RF voltage amplifier and a reconfigurable bandpass microstrip filter.

Time-efficient fault detection and diagnosis system for analog circuits

Time-efficient fault analysis and diagnosis of analog circuits are the most important prerequisites to achieve online health monitoring of electronic equipments, which are involving continuing challenges of ultra-large-scale integration, component tolerance, limited test points but multiple faults. This work reports an FPGA (field programmable gate array)-based analog fault diagnostic system by applying two-dimensional information fusion, two-port network analysis and interval math theory. The proposed system has three advantages over traditional ones. First, it possesses high processing speed and smart circuit size as the embedded algorithms execute parallel on FPGA. Second, the hardware structure has a good compatibility with other diagnostic algorithms. Third, the equipped Ethernet interface enhances its flexibility for remote monitoring and controlling. The experimental results obtained from two realistic example circuits indicate that the proposed methodology had yielded competitive performance in both diagnosis accuracy and time-effectiveness, with about 96% accuracy while within 60 ms computational time.

Design of a Radiation Hardened Power-ON-Reset

In this paper, the design of a power-ON-reset intellectual property (IP) block for the RD53 collaboration, a radiation hardening by design circuit to withstand the High-Luminosity Large Hadron Collider tracker radiation environment, is presented. In this environment, the performance of the IP block under radiation must be ensured for a total ionizing dose up to 500 Mrad and possible ions interaction for a linear energy transfer of 15 MeV/cm2/mg. To verify the radiation hardness of the presented circuit, an automatic single-event effect sensitivity tool (Analog Fault Tolerant University of Seville Hardware Debugging System) has been used to perform a complete analysis over it, and also several experiments have been performed to test the designed blocks and obtain the final IP qualification.

Improving Time-Efficiency of Fault-Coverage Simulation for MOS Analog Circuit

In analog fault simulation, the number one challenge is that simulation time could grow rapidly and become prohibitive as the circuit size becomes large. This paper proposes a systematic method to significantly improve the time efficiency in estimating the fault coverage for analog fault simulation. In the proposed method, a circuit under test (CUT) is first partitioned into independent sub-circuits. This is accomplished through mapping the circuit into a graph, decomposing the graph into strongly connected components (SCCs), and generating a sub-circuit for each SCC. The impacts of potential faults directly entering a sub-circuit are then simulated and recorded using the sub-circuits, which is expected to be much more time efficient than fault simulation using the whole circuit, which is much larger in size. Finally, the fault detectability at the given test points is evaluated based on the fault impacts and sensitivity among different sub-circuits. As a first step toward quick estimation of fault coverage, this paper focuses on dc tests. Simulation results show that the fault coverage of dc tests can be estimated sufficiently accurately with simulation time being reduced by 10X for the benchmark circuit, or by approximately the number of SCCs. For a much larger circuit, the number of SCCs is expected to be much larger and the time-saving factor will be much larger.

A novel binary bat algorithm with chaos and Doppler effect in echoes for analog fault diagnosis

A novel modified binary bat algorithm (MBBA) with chaos and Doppler effect in echoes is presented in this paper to deal with the fault diagnosis problem of analog circuits with tolerance. The proposed method focuses on further mimicking the bats' behaviors and improving the binary bat algorithm (BBA) in view of biology. The proposed algorithm utilizes the bats' self-adaptive compensation for Doppler effect in echoes and the chaotic optimization method to improve the BBA. The elitist strategy is also used to store all the possible global best solutions, which will provide us with more possible choices in practice. Since single feature extraction method has limitations during fault diagnosis of analog circuits with tolerance, several kinds of feature extraction methods are used together to build a big feature set firstly in our method, and then, the new proposed MBBA is used to select the optimal feature subset simultaneously optimize the classifier parameters for the analog fault diagnosis. Three analog circuits' examples are given to demonstrate the effectiveness and generalization ability of our method, and other methods are also used to do comparisons. The results indicate that combining different kinds of feature extraction method together to optimally select the feature subset simultaneously optimize the classifier parameters by MBBA can obtain better performance in dealing with analog fault diagnosis problems, and our proposed method provides a better tradeoff between fault diagnosis accuracy and total cost, which is superior to other methods. Therefore, it is an effective method for analog fault diagnosis and has broad application prospects in practice.