Design of a Radiation Hardened Power-ON-Reset

Abstract

In this paper, the design of a power-ON-reset intellectual property (IP) block for the RD53 collaboration, a radiation hardening by design circuit to withstand the High-Luminosity Large Hadron Collider tracker radiation environment, is presented. In this environment, the performance of the IP block under radiation must be ensured for a total ionizing dose up to 500 Mrad and possible ions interaction for a linear energy transfer of 15 MeV/cm2/mg. To verify the radiation hardness of the presented circuit, an automatic single-event effect sensitivity tool (Analog Fault Tolerant University of Seville Hardware Debugging System) has been used to perform a complete analysis over it, and also several experiments have been performed to test the designed blocks and obtain the final IP qualification.