a-IGZO Thin-film Transistors Research Articles

Trap Assessment and Mobility Simulation of Amorphous Indium Gallium Zinc Oxide Thin Film Transistors

Ultra-broadband photoconduction (UBPC) is used to measure the sub-gap trap density of amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) across the bandgap, from the valence band mobility edge to within 0.15 eV (~6kBT) of the conduction band mobility edge. Figure (a) is a plot of the total integrated trap density (Ntraps, green) and the sub-gap density of states (dNtraps/dE, blue) as measured by UBPC for traps located just below the conduction band mobility edge (E-EC = 0). Three Gaussian sub-gap states are observed with peak energies of 0.9, 0.7, and 0.4 eV below the conduction band mobility edge. Note that the width of the 0.4 eV peak (180 meV) is much larger than that of the other two deeper peaks (45 meV). All three of these peaks are likely associated with oxygen vacancies, but it is unclear why the 0.4 eV trap is so much broader than all the other deeper oxygen vacancy derived donor trap states.The black dotted curves included in Figure (b) are experimental EKV mobility (μEKV) versus overvoltage (VG-VON) plots obtained at three different temperatures (0 °, 20 °, and 100 °C). The red dashed curves are simulated mobility curves obtained assuming that only conduction band tail states act as electron traps to degrade the mobility. Since these red simulated curves grossly overestimate the experimental mobility, other traps must be operative in establishing the black experimental mobility curves. In fact, the inclusion of the 0.4 eV trap measured by UBPC in addition to the conduction band tail states in the simulation (blue curves) leads to excellent agreement between experimental and simulated mobility for all three temperatures (0 °, 20 °, and 100 °C). In summary, it is demonstrated how the mobility of a-IGZO can be simulated by including the experimentally observed DoS of a 0.4 eV centered Gaussian trap state.

Sputtered AlOx interlayer for improving performance of a-InGaZnO TFTs: A study on hydrogen diffusion mitigation and electron modulation

In this study, we developed an a-InGaZnO (a-IGZO) thin film transistor (TFT) structure that inserts a sputtered AlOx intermediate layer (IL) within the active layer. The IL not only effectively blocks hydrogen (H) diffusion from the gate insulation (GI) layer to the upper region of a-IGZO but also modifies the energy band structure of the bottom channel region and creates a locally low electron concentration that counteracts the excess electron donated by diffused H. Compared to conventional TFTs, the TFT with the IL exhibits impressive electrical characteristics, including a high saturation mobility (μsat) of 14.5 cm2 V−1 s−1, an on/off current ratio (Ion/Ioff) of 6.2 × 108, and a low subthreshold swing (SS) of 0.16 V/dec. Furthermore, this structure exhibits remarkable stability under negative bias stress and negative bias illumination stress, with ΔVth values of 1.1 and 1.5 V, respectively. The integration of the IL provides a promising approach for enhancing the performance of a-IGZO TFTs, paving the way for next-generation display technologies.

Interfacial thermal resistance effect in self-aligned top-gate a-IGZO thin film transistors

This study investigates the interfacial thermal resistance effect, primarily associated with the bottom-gate stack, in self-aligned top-gate amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs). We analyze self-heating and heat transfer characteristics across three different a-IGZO TFT configurations: single-gate, dual-gate type 1, and dual-gate type 2. Temperature maps, corresponding to various bias conditions, are acquired using infrared thermal microscopy. The extracted values of thermal resistance reveal a significant disparity between single- and dual-gate configurations. This suggests that the bottom-gate stack in a-IGZO TFTs, including the interfaces, notably impedes heat dissipation. These findings offer crucial insights into the power dissipation aspects of TFT technology, highlighting the importance of interfacial design for thermal management in advanced electronic devices.

Mobility and current boosting of In-Ga-Zn-O thin-film transistors with metal capping layer oxidation

This study investigates the effect of an oxidized Ta capping layer on the boosting of field-effect mobility (μ FE) of amorphous In-Ga-Zn-O (a-IGZO) Thin-film transistors (TFTs). The oxidation of Ta creates additional oxygen vacancies on the a–IGZO channel surface, leading to increased carrier density. We investigate the effect of increasing Ta coverage on threshold voltage (V th), on-state current, μ FE and gate bias stress stability of a-IGZO TFTs. A significant increase in μ FE of over 8 fold, from 16 cm2 Vs−1 to 140 cm2 Vs−1, was demonstrated with the Ta capping layer covering 90% of the channel surface. By partial leaving the a-IGZO uncovered at the contact region, a potential barrier region was created, maintaining the low off-state current and keeping the threshold voltage near 0 V, while the capped region operated as a carrier-boosted region, enhancing channel conduction. The results reported in this study present a novel methodology for realizing high-performance oxide semiconductor devices. The demonstrated approach holds promise for a wide range of next-generation device applications, offering new avenues for advancement in metal oxide semiconductor TFTs.

Dual-bootstrapping gate driver circuit design using IGZO TFTs

To promote the integration of thin-film transistor (TFT) gate driver circuit technology into high-resolution large-size display application with narrow bezel, achieving high speed is a critical challenge. This paper proposed a dual-bootstrapping TFT integrated gate driver circuit for large-size display. The over-drive voltage of the driving TFT was increased both at the rising and falling edges of the output waveforms. To validate the circuit feasibility, the proposed circuit was fabricated using amorphous indium-gallium-zinc-oxide (a-IGZO) TFT technology and measured in terms of transient response with cascaded stages and reliability tests over long operating time. Compared to conventional approaches, the proposed gate driver demonstrates a 39 % reduction in the falling time as well as compact layout. Therefore, the proposed gate driver schematic is well-suited for large-size display applications that involves heavy resistance–capacitance (RC) loadings and require high resolution above 8 K.

Improved high voltage operation of amorphous In–Ga–Zn–O thin film transistor by carrier density enhancement

We report on improved high voltage operation of amorphous-In–Ga–Zn–O (a-IGZO) thin film transistors (TFTs) by increasing carrier density and distributing the high bias field over the length of the device which utilizes an off-set drain structure. By decreasing the O2 partial pressure during sputter deposition of IGZO, the channel carrier density of the high voltage a-IGZO TFT (HiVIT) was increased to ∼1018 cm−3. Which reduced channel resistance and therefore the voltage drop in the ungated offset region during the on-state. To further decrease the electric field in the offset region, we applied Ta capping and subsequent oxidation to locally increase the oxygen vacancy levels in the offset region thereby increasing local carrier density. The reduction of the drain field in the offset region from 1.90 V μm−1 to 1.46 V μm−1 at 200 V drain voltage, significantly improved the operational stability of the device by reducing high field degradation. At an extreme drain voltage of 500 V, the device showed an off-state current of ∼10−11 A and on-state current of ∼1.59 mA demonstrating that with further enhancements the HiVIT may be applicable to thin-film form, low leakage, high voltage control applications.

Temperature Dependent Anomalous Threshold Voltage Modulation of a-IGZO TFT by Incorporating Variant Gate Stresses

Amorphous indium gallium zinc oxide (a-IGZO) has recently made significant advancement as a key material for electronic component design owing to its compatibility with complementary metal oxide semiconductor technologies. A comprehensive analysis of reliability-related issues is required to determine the true potential of a-IGZO-based devices for next-generation electronics applications. To address this objective, we electrically characterize scaled-channel a-IGZO thin film transistors (TFTs) under positive bias (temperature) stress (PB(T)S). Both PBS and PBTS are characterized by positive and negative Vth shift, respectively, during the various gate stresses. In particular, the negative Vth shift is explained by the generation of donor-like traps stimulated by ionization of oxygen vacancy/hydrogen at elevated temperature. The TFTs exhibit relatively decent stability during the PBS operation. The analysis of devices with variant channel dimensions implies that long-channel devices exhibit relatively higher stability and performance compared to the short-channel ones. We also observe that the Vth can be controllably adjusted by employing the top gate (TG) with bottom gate sweep. Moreover, the stress-induced partial recovery mechanism is experimentally observed owing to detrapping of charges. Generally, the reported results infer a perceptive understanding of scaled-channel a-IGZO-TFTs which helps with shaping performance-enhancement strategies.

Low-Voltage IGZO Field-Effect Ultraviolet Photodiode

Abstract In the era of Internet of Things (IoTs), an energy-efficient ultraviolet (UV) photodetector (PD) is highly desirable considering the massive usage scenarios such as environmental sterilization, fire alarm and corona discharge monitoring. So far, common self-powered UV PDs are mainly based on metal-semiconductor hetero-structures or p–n heterojunctions, where the limited intrinsic built-in electric field restricts further enhancement of the photoresponsivity. In this work, an extremely low-voltage field-effect UV PD is proposed using a gate-drain shorted amorphous IGZO (a-IGZO) thin film transistor (TFT) architecture. A combined investigation of the experimental measurements and technology computer-aided design (TCAD) simulations suggests that the reverse current (I R) of field-effect diode (FED) is highly related with the threshold voltage (V th) of the parental TFT, implying an enhancement-mode TFT is preferable to fabricate the field-effect UV PD with low dark current. Driven by a low bias of −0.1 V, decent UV response has been realized including large UV/visible (R 300/R 550) rejection ratio (1.9 × 103), low dark current (1.15 × 10−12 A) as well as high photo-to-dark current ratio (PDCR, ∼ 103) and responsivity (1.89 A/W). This field-effect photodiode provides a new platform to construct UV PDs with well-balanced photoresponse performance at a low bias, which is attractive for designs of large-scale smart sensor networks with high energy efficiency.

The Enhanced Performance of Oxide Thin-Film Transistors Fabricated by a Two-Step Deposition Pressure Process.

It is usually difficult to realize high mobility together with a low threshold voltage and good stability for amorphous oxide thin-film transistors (TFTs). In addition, a low fabrication temperature is preferred in terms of enhancing compatibility with the back end of line of the device. In this study, α-IGZO TFTs were prepared by high-power impulse magnetron sputtering (HiPIMS) at room temperature. The channel was prepared under a two-step deposition pressure process to modulate its electrical properties. X-ray photoelectron spectra revealed that the front-channel has a lower Ga content and a higher oxygen vacancy concentration than the back-channel. This process has the advantage of balancing high mobility and a low threshold voltage of the TFT when compared with a conventional homogeneous channel. It also has a simpler fabrication process than that of a dual active layer comprising heterogeneous materials. The HiPIMS process has the advantage of being a low temperature process for oxide TFTs.

Enhancing the Carrier Mobility and Bias Stability in Metal-Oxide Thin Film Transistors with Bilayer InSnO/a-InGaZnO Heterojunction Structure.

In this study, the electrical performance and bias stability of InSnO/a-InGaZnO (ITO/a-IGZO) heterojunction thin-film transistors (TFTs) are investigated. Compared to a-IGZO TFTs, the mobility (µFE) and bias stability of ITO/a-IGZO heterojunction TFTs are enhanced. The band alignment of the ITO/a-IGZO heterojunction is analyzed by using X-ray photoelectron spectroscopy (XPS). A conduction band offset (∆EC) of 0.5 eV is observed in the ITO/a-IGZO heterojunction, resulting in electron accumulation in the formed potential well. Meanwhile, the ∆EC of the ITO/a-IGZO heterojunction can be modulated by nitrogen doping ITO (ITON), which can affect the carrier confinement and transport properties at the ITO/a-IGZO heterojunction interface. Moreover, the carrier concentration distribution at the ITO/a-IGZO heterointerface is extracted by means of TCAD silvaco 2018 simulation, which is beneficial for enhancing the electrical performance of ITO/a-IGZO heterojunction TFTs.

Influence of RF power in the sputter deposition of amorphous InGaZnO film on the transient drain current of amorphous InGaZnO thin-film transistors

The device electrical and transient current characteristics of the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) are comprehensively investigated according to the radio-frequency (RF) power during the sputter-deposition of IGZO active film. The RF power dependencies of the oxygen vacancy (VO) concentration in IGZO and the surface morphology of IGZO film are analyzed through X-ray photoelectron spectroscopy (XPS) and atomic force microscope (AFM). According to the RF power change in the range of 100 ∼ 250 W, the optimal point in terms of threshold voltage (VT), ON current (Ion), field-effect mobility in the linear region (μFE_lin), hysteresis voltage (VHys), and the VT shift under current stress (ΔVT) is found to be 200 W. The existence of the optimal power condition originates from the RF-power dependencies of the electron carrier concentration, the density of electron traps in gate insulator (GI), and the interface trap density related to surface roughness.Furthermore, compared to the direct current (DC) current stress (CS) condition, it is found that when VGS rises rapidly, a total transient current ΔID can be decomposed into three components, i.e., ΔIOS, ΔIBOOST, ΔIDEG. While ΔIOS is attributed to the non-quasi static Fermi-level rising, ΔIBOOST and ΔIDEG result from the donor creation in IGZO and the electron trapping into GI and interface. Noticeably, the occurrence level of each component changes sensitively according to RF power.Our result suggests that the 200 W device has the least overshoot of transient current and shows the best reliability in terms of deterioration due to transient current characteristics.

Origin of the High Density of Oxygen Vacancies at the Back Channel of Back-Channel-Etched a-InGaZnO Thin-Film Transistors.

This study reveals the pronounced density of oxygen vacancies (Vo) at the back channel of back-channel-etched (BCE) a-InGaZnO (a-IGZO) thin-film transistors (TFTs) results from the sputtered deposition rather than the wet etching process of the source/drain metal, and they are distributed within approximately 25 nm of the back surface. Furthermore, the existence and distribution depth of the high density of Vo defects are verified by means of XPS spectra analyses. Then, the mechanism through which the above Vo defects lead to the instability of BCE a-IGZO TFTs is elucidated. Lastly, it is demonstrated that the device instability under high-humidity conditions and negative bias temperature illumination stress can be effectively alleviated by etching and thus removing the surface layer of the back channel, which contains the high density of Vo defects. In addition, this etch method does not cause a significant deterioration in the uniformity of electrical characteristics and is quite convenient to implement in practical fabrication processes. Thus, a novel and effective solution to the device instability of BCE a-IGZO TFTs is provided.

Strengthening Multi-Factor Authentication Through Physically Unclonable Functions in PVDF-HFP-Phase-Dependent a-IGZO Thin-Film Transistors.

For enhanced security in hardware-based security devices, it is essential to extract various independent characteristics from a single device to generate multiple keys based on specific values. Additionally, the secure destruction of authentication information is crucial for the integrity of the data. Doped amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) using poly(vinylidene fluoride-co-hexafluoropropylene) (PVDF-HFP) induce a dipole doping effect through a phase-transition process, creating physically unclonable function (PUF) devices for secure user information protection. The PUF security key, generated at VGS = 20V in a 20×10 grid, demonstrates uniformity of 42% and inter-Hamming distance (inter-HD) of 49.79% in the β-phase of PVDF-HFP. However, in the γ-phase, the uniformity drops to 22.5%, and inter-HD decreases to 35.74%, indicating potential security key destruction during the phase transition. To enhance security, a multi-factor authentication (MFA) system is integrated, utilizing five security keys extracted from various TFT parameters. The security keys from turn-on voltage (VON), VGS = 20V, VGS = 30V, mobility, and threshold voltage (Vth) exhibit near-ideal uniformities and inter-HDs, with the highest values of 58% and 51.68%, respectively. The dual security system, combining phase transition and MFA, establishes a robust protection mechanism for privacy-sensitive user information.

Design and simulation of a nano biosensor based on amorphous indium gallium zinc oxide (a-IGZO) thin film transistor

In this study, a biosensor utilizing a dielectric-modulated amorphous indium gallium zinc oxide (a-IGZO) thin film transistor (TFT) is introduced. TFT biosensors have garnered significant attention due to their heightened sensitivity, scalable nature, low power consumption, rapid electrical detection capabilities, and cost-effective means of mass production. By embedding a nano-cavity within the gate insulator of the TFT, biomolecules can accumulate within. As each biomolecule possesses its own dielectric constant, it modulates the effective gate capacitance and, subsequently, changes the channel conductance. To assess the sensitivity of the biosensor, variation in saturation current after the absorption of biomolecules with respect to the drain current in the case of an air-filled cavity has been considered as a precise measure. The efficient operation of a biosensor is contingent upon the sensitivity being highly dependent on the dielectric constant of the biomolecules that are accumulated within the nano-cavity. Consequently, a comprehensive evaluation has been conducted to ascertain the impact of critical design parameters which have the potential to affect the sensitivity of the biosensor. Additionally, a statistical analysis based on coefficient of variation measure has been performed to evaluate the susceptibility of the biosensor’s sensitivity to variations in geometrical and physical design parameters. The utilization of label-free detection methodology in this device presents a notable advantage due to its compatibility with the fundamental CMOS processing technology and its cost-effective potential for macro production.

Bi-directional threshold voltage shift of amorphous InGaZnO thin film transistors under alternating bias stress

Amorphous InGaZnO (a-IGZO) has attracted a lot of attention as a high-mobility channel material for thin film transistors (TFTs). However, the instability mechanism involving threshold voltage and subthreshold swing (SS) in a-IGZO TFTs still requires further investigation. In this study, we investigated the electrical instability of amorphous InGaZnO TFTs subjected to alternating positive and negative bias stresses. Based on the respective mechanisms under positive and negative bias stresses, including ionization and spatial movement of oxygen vacancies, bi-directional threshold voltage shifts were observed under alternating bias stress. The SS values vary with the bias stress polarity, reflecting the presence and distribution of oxygen vacancies. Our findings reveal a complementary mechanism based on oxygen vacancies, elucidating the behavior under complex bias stress schemes and extending our understanding of instability mechanisms beyond monotonous bias stress.

Stability and gap states of amorphous In-Ga-Zn-Ox thin film transistors: Impact of sputtering configuration and post-annealing on device performance

Stability of amorphous In-Ga-Zn-Ox (a-IGZO) thin-film-transistors (TFTs) is studied from a viewpoint of gap states, associated with oxygen-related defects and structural disordering. The a-IGZO gap states are controlled through the film preparation by magnetron sputtering under two different configurations and post-annealing in oxygen atmosphere. The distribution of gap states is then evaluated from the subgap absorption spectrum, which is measured by a constant photocurrent measurement technique. With this known distribution, a-IGZO TFTs are fabricated, and the stability of the TFT performances is examined through the negative bias induced stability (NBIS) experiments. The results suggest that a negative threshold voltage shift, induced by NBIS, is improved by reducing the density of gap states, i.e., narrowing the gap state distribution. The reduction of gap states also contributes to the improvement of subthreshold swing.

Tailoring Subthreshold Swing in A-IGZO Thin-Film Transistors for Amoled Displays: Impact of Conversion Mechanism on Peald Deposition Sequences.

Amorphous IGZO (a-IGZO) thin-film transistors (TFTs) are standard backplane electronics to power active-matrix organic light-emitting diode (AMOLED) televisions due to their high carrier mobility and negligible low leakage characteristics. Despite their advantages, limitations in color depth arise from a steep subthreshold swing (SS) (≤ 0.1 V/decade), necessitating costly external compensation for IGZO transistors. For mid-size mobile applications such as OLED tablets and notebooks, it is important to ensure controllable SS value (≥ 0.3 V/decade). In this study, a conversion mechanism during plasma-enhanced atomic layer deposition (PEALD) is proposed as a feasible route to control the SS. When a pulse of a diethylzinc (DEZn) precursor is exposed to the M2O3 (M = In or Ga) surface layer, partial conversion of the underlying M2O3 to ZnO is predicted on the basis of density function theory calculations. Notably, significant distinctions between In-Ga-Zn (Case I) and In-Zn-Ga (Case II) films are observed: Case II exhibits a lower growth rate and larger Ga/In ratio. Case II TFTs with a-IGZO (subcycle ratio of In:Ga:Zn = 3:1:1) show reasonable SS values (313mV decade-1) and high mobility (µFE) of 29.3cm2 Vs-1 (Case I: 84mV decade-1 and 33.4cm2 Vs-1). The rationale for Case II's reasonable SS values is discussed, attributing it to the plausible formation of In-Zn defects, supported by technology computer-aided design (TCAD) simulations.

Improvement of the electrical properties of amorphous indium-gallium-zinc oxide thin-film transistors by cross-linked CYTOP passivation

In this study, we investigated the effect of a cross-linked CYTOP passivation layer on the electrical properties of amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs). Cross-linked CYTOP passivation showed a deeper fluorine diffusion depth than CYTOP passivation owing to the chemical reaction between the cross-linking agent and IGZO layer. The cross-linking agent reduces the weakly bonded oxygen in the IGZO layer via a chemical reaction, enhancing fluorine diffusion into the IGZO layer. Therefore, the effect of fluorine on the IGZO layer was enhanced by using cross-linked CYTOP as a passivation layer. The diffused fluorine reduced the defect states by passivating the oxygen-related defects such as oxygen vacancies and weakly bonded oxygen and increased the carrier concentration by replacing metal–oxygen bonds with metal-fluorine bonds. IGZO TFTs with cross-linked CYTOP passivation exhibited a threshold voltage of −0.35 V, saturation mobility of 1.93 cm2/V∙s, and subthreshold swing of 0.53 V/dec. Using a cross-linked passivation layer also improved the reliability under positive gate bias stress. Consequently, a cross-linked CYTOP passivation layer can effectively improve the electrical properties of IGZO TFTs by incorporating fluorine atoms into the IGZO layer.

355 nm Nanosecond Ultraviolet Pulsed Laser Annealing Effects on Amorphous In-Ga-ZnO Thin Film Transistors.

Bottom-gate thin-film transistors (TFTs) with n-type amorphous indium-gallium-zinc oxide (a-IGZO) active channels and indium-tin oxide (ITO) source/drain electrodes were fabricated. Then, an ultraviolet (UV) nanosecond pulsed laser with a wavelength of 355 nm was scanned to locally anneal the active channel at various laser powers. After laser annealing, negative shifts in the threshold voltages and enhanced on-currents were observed at laser powers ranging from 54 to 120 mW. The energy band gap and work function of a-IGZO extracted from the transmittance and ultraviolet photoelectron spectroscopy (UPS) measurement data confirm that different energy band structures for the ITO electrode/a-IGZO channel were established depending on the laser annealing conditions. Based on these observations, the electron injection mechanism from ITO electrodes to a-IGZO channels was analyzed. The results show that the selective laser annealing process can improve the electrical performance of the a-IGZO TFTs without any thermal damage to the substrate.

A 1.25-V Power Source Based on Solid-State Battery and Low Dropout Regulator Integrated With E-Mode a-IGZO and D-Mode ITO Thin-Film Transistors

A 1.25-V Power Source Based on Solid-State Battery and Low Dropout Regulator Integrated With E-Mode a-IGZO and D-Mode ITO Thin-Film Transistors