In this work, we demonstrated the high switching uniformity and 50 fJ/bit energy consumption in an amorphous silicon-based resistive switching (RS) device by inserting the AgInSbTe (AIST) layer between the silicon insulating layer and Ag top electrodes. The improved RS performance is attributed to the introduction of an Ag ion reservoir layer, which helps to suppress conducting filament overgrowth. After insertion of the AIST layer, the cumulative probability of low/high resistance states decreased from 176.8%/46.2% to 3.1%/11.9%, respectively. The advantages of promoting Ag dissolution enable the realization of fast switching speed (<50 ns) and low set voltage (∼70 mV), which gives our device low energy consumption (∼50 fJ/bit). Moreover, the multi-step of set/reset analytical model of our dual-layer RS device was developed based on the formation and dissolution of the Ag-ion-based conductive filaments. Our work presents an effective method for obtaining high-performance Si-based memory for practical applications.